| /kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw88/ |
| D | sar.c | 5 #include "sar.h"
12 const struct rtw_sar *sar = &hal->sar; in rtw_query_sar() local
14 switch (sar->src) { in rtw_query_sar()
16 rtw_warn(rtwdev, "unknown SAR source: %d\n", sar->src); in rtw_query_sar()
21 return sar->cfg[arg->path][arg->rs].common[arg->sar_band]; in rtw_query_sar()
28 struct rtw_sar *sar = &hal->sar; in rtw_apply_sar() local
30 if (sar->src != RTW_SAR_SOURCE_NONE && new->src != sar->src) { in rtw_apply_sar()
31 rtw_warn(rtwdev, "SAR source: %d is in use\n", sar->src); in rtw_apply_sar()
35 *sar = *new; in rtw_apply_sar()
41 static s8 rtw_sar_to_phy(struct rtw_dev *rtwdev, u8 fct, s32 sar, in rtw_sar_to_phy() argument
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | nau8824.txt | 29 - nuvoton,sar-threshold-num: Number of buttons supported
30 …- nuvoton,sar-threshold: Impedance threshold for each button. Array that contains up to 8 buttons …
31 SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R)
32 …igured by 'nuvoton,micbias-voltage', SAR_VOLTAGE is configured by 'nuvoton,sar-voltage', R - butto…
35 - nuvoton,sar-hysteresis: Button impedance measurement hysteresis.
37 - nuvoton,sar-voltage: Reference voltage for button impedance measurement.
47 - nuvoton,sar-compare-time: SAR compare time
53 - nuvoton,sar-sampling-time: SAR sampling time
80 nuvoton,sar-threshold-num = <4>;
81 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
[all …]
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| D | nau8825.txt | 33 - nuvoton,sar-threshold-num: Number of buttons supported
34 …- nuvoton,sar-threshold: Impedance threshold for each button. Array that contains up to 8 buttons …
35 SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R)
36 …igured by 'nuvoton,micbias-voltage', SAR_VOLTAGE is configured by 'nuvoton,sar-voltage', R - butto…
39 - nuvoton,sar-hysteresis: Button impedance measurement hysteresis.
41 - nuvoton,sar-voltage: Reference voltage for button impedance measurement.
51 - nuvoton,sar-compare-time: SAR compare time
57 - nuvoton,sar-sampling-time: SAR sampling time
92 nuvoton,sar-threshold-num = <4>;
93 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/mvebu/ |
| D | orion.c | 28 static u32 __init mv88f5181_get_tclk_freq(void __iomem *sar) in mv88f5181_get_tclk_freq() argument
30 u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) & in mv88f5181_get_tclk_freq()
45 static u32 __init mv88f5181_get_cpu_freq(void __iomem *sar) in mv88f5181_get_cpu_freq() argument
47 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_cpu_freq()
59 static void __init mv88f5181_get_clk_ratio(void __iomem *sar, int id, in mv88f5181_get_clk_ratio() argument
62 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_clk_ratio()
98 static u32 __init mv88f5182_get_tclk_freq(void __iomem *sar) in mv88f5182_get_tclk_freq() argument
100 u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) & in mv88f5182_get_tclk_freq()
113 static u32 __init mv88f5182_get_cpu_freq(void __iomem *sar) in mv88f5182_get_cpu_freq() argument
115 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) & in mv88f5182_get_cpu_freq()
[all …]
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| D | kirkwood.c | 25 * (6180 has different SAR layout than other Kirkwood SoCs)
86 static u32 __init kirkwood_get_tclk_freq(void __iomem *sar) in kirkwood_get_tclk_freq() argument
88 u32 opt = (readl(sar) >> SAR_KIRKWOOD_TCLK_FREQ) & in kirkwood_get_tclk_freq()
108 static u32 __init kirkwood_get_cpu_freq(void __iomem *sar) in kirkwood_get_cpu_freq() argument
110 u32 opt = SAR_KIRKWOOD_CPU_FREQ(readl(sar)); in kirkwood_get_cpu_freq()
127 void __iomem *sar, int id, int *mult, int *div) in kirkwood_get_clk_ratio() argument
132 u32 opt = SAR_KIRKWOOD_L2_RATIO(readl(sar)); in kirkwood_get_clk_ratio()
139 u32 opt = (readl(sar) >> SAR_KIRKWOOD_DDR_RATIO) & in kirkwood_get_clk_ratio()
155 static u32 __init mv88f6180_get_cpu_freq(void __iomem *sar) in mv88f6180_get_cpu_freq() argument
157 u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) & SAR_MV88F6180_CLK_MASK; in mv88f6180_get_cpu_freq()
[all …]
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| D | common.h | 28 u32 (*get_tclk_freq)(void __iomem *sar);
29 u32 (*get_cpu_freq)(void __iomem *sar);
30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div);
31 u32 (*get_refclk_freq)(void __iomem *sar);
32 bool (*is_sscg_enabled)(void __iomem *sar);
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| D | armada-39x.c | 45 static u32 __init armada_39x_get_tclk_freq(void __iomem *sar) in armada_39x_get_tclk_freq() argument
49 tclk_freq_select = ((readl(sar + SARL) >> SARL_A390_TCLK_FREQ_OPT) & in armada_39x_get_tclk_freq()
68 static u32 __init armada_39x_get_cpu_freq(void __iomem *sar) in armada_39x_get_cpu_freq() argument
72 cpu_freq_select = ((readl(sar + SARL) >> SARL_A390_CPU_DDR_L2_FREQ_OPT) & in armada_39x_get_cpu_freq()
92 void __iomem *sar, int id, int *mult, int *div) in armada_39x_get_clk_ratio() argument
110 static u32 __init armada_39x_refclk_ratio(void __iomem *sar) in armada_39x_refclk_ratio() argument
112 if (readl(sar + SARH) & SARH_A390_REFCLK_FREQ) in armada_39x_refclk_ratio()
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| D | armada-38x.c | 20 * SAR[14:10] : Ratios between PCLK0, NBCLK, HCLK and DRAM clocks
22 * SAR[15] : TCLK frequency
37 static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) in armada_38x_get_tclk_freq() argument
41 tclk_freq_select = ((readl(sar) >> SAR_A380_TCLK_FREQ_OPT) & in armada_38x_get_tclk_freq()
54 static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) in armada_38x_get_cpu_freq() argument
58 cpu_freq_select = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_cpu_freq()
99 void __iomem *sar, int id, int *mult, int *div) in armada_38x_get_clk_ratio() argument
101 u32 opt = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_clk_ratio()
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| D | armada-370.c | 45 static u32 __init a370_get_tclk_freq(void __iomem *sar) in a370_get_tclk_freq() argument
49 tclk_freq_select = ((readl(sar) >> SARL_A370_TCLK_FREQ_OPT) & in a370_get_tclk_freq()
64 static u32 __init a370_get_cpu_freq(void __iomem *sar) in a370_get_cpu_freq() argument
69 cpu_freq_select = ((readl(sar) >> SARL_A370_PCLK_FREQ_OPT) & in a370_get_cpu_freq()
114 void __iomem *sar, int id, int *mult, int *div) in a370_get_clk_ratio() argument
116 u32 opt = ((readl(sar) >> SARL_A370_FAB_FREQ_OPT) & in a370_get_clk_ratio()
135 static bool a370_is_sscg_enabled(void __iomem *sar) in a370_is_sscg_enabled() argument
137 return !(readl(sar) & SARL_A370_SSCG_ENABLE); in a370_is_sscg_enabled()
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| D | armada-xp.c | 48 static u32 __init axp_get_tclk_freq(void __iomem *sar) in axp_get_tclk_freq() argument
68 static u32 __init axp_get_cpu_freq(void __iomem *sar) in axp_get_cpu_freq() argument
73 cpu_freq_select = ((readl(sar + SARL) >> SARL_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
77 * located in the high part of the SAR registers in axp_get_cpu_freq()
79 cpu_freq_select |= (((readl(sar + SARH) >> SARH_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
124 void __iomem *sar, int id, int *mult, int *div) in axp_get_clk_ratio() argument
126 u32 opt = ((readl(sar + SARL) >> SARL_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
130 * located in the high part of the SAR registers in axp_get_clk_ratio()
132 opt |= (((readl(sar + SARH) >> SARH_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
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| D | dove.c | 87 static u32 __init dove_get_tclk_freq(void __iomem *sar) in dove_get_tclk_freq() argument
89 u32 opt = (readl(sar) >> SAR_DOVE_TCLK_FREQ) & in dove_get_tclk_freq()
106 static u32 __init dove_get_cpu_freq(void __iomem *sar) in dove_get_cpu_freq() argument
108 u32 opt = (readl(sar) >> SAR_DOVE_CPU_FREQ) & in dove_get_cpu_freq()
126 void __iomem *sar, int id, int *mult, int *div) in dove_get_clk_ratio() argument
131 u32 opt = (readl(sar) >> SAR_DOVE_L2_RATIO) & in dove_get_clk_ratio()
139 u32 opt = (readl(sar) >> SAR_DOVE_DDR_RATIO) & in dove_get_clk_ratio()
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| /kernel/linux/linux-5.10/drivers/clk/mvebu/ |
| D | orion.c | 28 static u32 __init mv88f5181_get_tclk_freq(void __iomem *sar) in mv88f5181_get_tclk_freq() argument
30 u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) & in mv88f5181_get_tclk_freq()
45 static u32 __init mv88f5181_get_cpu_freq(void __iomem *sar) in mv88f5181_get_cpu_freq() argument
47 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_cpu_freq()
59 static void __init mv88f5181_get_clk_ratio(void __iomem *sar, int id, in mv88f5181_get_clk_ratio() argument
62 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_clk_ratio()
98 static u32 __init mv88f5182_get_tclk_freq(void __iomem *sar) in mv88f5182_get_tclk_freq() argument
100 u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) & in mv88f5182_get_tclk_freq()
113 static u32 __init mv88f5182_get_cpu_freq(void __iomem *sar) in mv88f5182_get_cpu_freq() argument
115 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) & in mv88f5182_get_cpu_freq()
[all …]
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| D | kirkwood.c | 25 * (6180 has different SAR layout than other Kirkwood SoCs)
86 static u32 __init kirkwood_get_tclk_freq(void __iomem *sar) in kirkwood_get_tclk_freq() argument
88 u32 opt = (readl(sar) >> SAR_KIRKWOOD_TCLK_FREQ) & in kirkwood_get_tclk_freq()
108 static u32 __init kirkwood_get_cpu_freq(void __iomem *sar) in kirkwood_get_cpu_freq() argument
110 u32 opt = SAR_KIRKWOOD_CPU_FREQ(readl(sar)); in kirkwood_get_cpu_freq()
127 void __iomem *sar, int id, int *mult, int *div) in kirkwood_get_clk_ratio() argument
132 u32 opt = SAR_KIRKWOOD_L2_RATIO(readl(sar)); in kirkwood_get_clk_ratio()
139 u32 opt = (readl(sar) >> SAR_KIRKWOOD_DDR_RATIO) & in kirkwood_get_clk_ratio()
155 static u32 __init mv88f6180_get_cpu_freq(void __iomem *sar) in mv88f6180_get_cpu_freq() argument
157 u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) & SAR_MV88F6180_CLK_MASK; in mv88f6180_get_cpu_freq()
[all …]
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| D | common.h | 28 u32 (*get_tclk_freq)(void __iomem *sar);
29 u32 (*get_cpu_freq)(void __iomem *sar);
30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div);
31 u32 (*get_refclk_freq)(void __iomem *sar);
32 bool (*is_sscg_enabled)(void __iomem *sar);
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| D | armada-39x.c | 45 static u32 __init armada_39x_get_tclk_freq(void __iomem *sar) in armada_39x_get_tclk_freq() argument
49 tclk_freq_select = ((readl(sar + SARL) >> SARL_A390_TCLK_FREQ_OPT) & in armada_39x_get_tclk_freq()
68 static u32 __init armada_39x_get_cpu_freq(void __iomem *sar) in armada_39x_get_cpu_freq() argument
72 cpu_freq_select = ((readl(sar + SARL) >> SARL_A390_CPU_DDR_L2_FREQ_OPT) & in armada_39x_get_cpu_freq()
92 void __iomem *sar, int id, int *mult, int *div) in armada_39x_get_clk_ratio() argument
110 static u32 __init armada_39x_refclk_ratio(void __iomem *sar) in armada_39x_refclk_ratio() argument
112 if (readl(sar + SARH) & SARH_A390_REFCLK_FREQ) in armada_39x_refclk_ratio()
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| D | armada-38x.c | 20 * SAR[14:10] : Ratios between PCLK0, NBCLK, HCLK and DRAM clocks
22 * SAR[15] : TCLK frequency
37 static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) in armada_38x_get_tclk_freq() argument
41 tclk_freq_select = ((readl(sar) >> SAR_A380_TCLK_FREQ_OPT) & in armada_38x_get_tclk_freq()
54 static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) in armada_38x_get_cpu_freq() argument
58 cpu_freq_select = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_cpu_freq()
99 void __iomem *sar, int id, int *mult, int *div) in armada_38x_get_clk_ratio() argument
101 u32 opt = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_clk_ratio()
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| D | armada-370.c | 45 static u32 __init a370_get_tclk_freq(void __iomem *sar) in a370_get_tclk_freq() argument
49 tclk_freq_select = ((readl(sar) >> SARL_A370_TCLK_FREQ_OPT) & in a370_get_tclk_freq()
64 static u32 __init a370_get_cpu_freq(void __iomem *sar) in a370_get_cpu_freq() argument
69 cpu_freq_select = ((readl(sar) >> SARL_A370_PCLK_FREQ_OPT) & in a370_get_cpu_freq()
114 void __iomem *sar, int id, int *mult, int *div) in a370_get_clk_ratio() argument
116 u32 opt = ((readl(sar) >> SARL_A370_FAB_FREQ_OPT) & in a370_get_clk_ratio()
135 static bool a370_is_sscg_enabled(void __iomem *sar) in a370_is_sscg_enabled() argument
137 return !(readl(sar) & SARL_A370_SSCG_ENABLE); in a370_is_sscg_enabled()
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| D | armada-xp.c | 48 static u32 __init axp_get_tclk_freq(void __iomem *sar) in axp_get_tclk_freq() argument
68 static u32 __init axp_get_cpu_freq(void __iomem *sar) in axp_get_cpu_freq() argument
73 cpu_freq_select = ((readl(sar + SARL) >> SARL_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
77 * located in the high part of the SAR registers in axp_get_cpu_freq()
79 cpu_freq_select |= (((readl(sar + SARH) >> SARH_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
124 void __iomem *sar, int id, int *mult, int *div) in axp_get_clk_ratio() argument
126 u32 opt = ((readl(sar + SARL) >> SARL_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
130 * located in the high part of the SAR registers in axp_get_clk_ratio()
132 opt |= (((readl(sar + SARH) >> SARH_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | nuvoton,nau8824.yaml | 64 nuvoton,sar-threshold-num:
72 nuvoton,sar-threshold:
76 configuration. SAR value is calculated as
77 SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R) where MICBIAS is
79 'nuvoton,sar-voltage', R - button impedance.
88 nuvoton,sar-hysteresis:
94 nuvoton,sar-voltage:
109 nuvoton,sar-compare-time:
112 SAR compare time.
120 nuvoton,sar-sampling-time:
[all …]
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| D | nuvoton,nau8825.yaml | 78 nuvoton,sar-threshold-num:
86 nuvoton,sar-threshold:
90 configuration. SAR value is calculated as
91 SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R) where MICBIAS is
93 'nuvoton,sar-voltage', R - button impedance.
102 nuvoton,sar-hysteresis:
108 nuvoton,sar-voltage:
123 nuvoton,sar-compare-time:
126 SAR compare time.
134 nuvoton,sar-sampling-time:
[all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw89/ |
| D | sar.c | 9 #include "sar.h"
21 "center freq: %u to SAR subband is unhandled\n", in rtw89_sar_get_subband()
70 /* Since 6GHz SAR subbands are not edge aligned, some cases span two SAR
91 struct rtw89_sar_cfg_common *rtwsar = &rtwdev->sar.cfg_common; in rtw89_query_sar_config_common()
116 "center_freq %u: SAR subband {%u, %u}\n", in rtw89_query_sar_config_common()
148 _d->sar._cfg_name = *(_cfg_data); \
149 _d->sar.src = _s; \
189 const enum rtw89_sar_sources src = rtwdev->sar.src; in rtw89_query_sar()
228 const enum rtw89_sar_sources src = rtwdev->sar.src; in rtw89_print_sar()
239 seq_puts(m, "no SAR is applied\n"); in rtw89_print_sar()
[all …]
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-driver-intc_sar | 7 Specific Absorption Rate (SAR) regulatory mode is typically
11 the current SAR regulatory mode on the Dynamic SAR driver using
14 from the Dynamic SAR driver.
32 This sysfs entry is used to retrieve Dynamic SAR information
33 emitted/maintained by a BIOS that supports Dynamic SAR.
44 level using the Band/Antenna/SAR table index information.
48 given host. The regulatory mode configured on Dynamic SAR
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| /kernel/linux/linux-6.6/drivers/platform/x86/intel/int1092/ |
| D | Kconfig | 7 M.2 modem to regulate the RF power based on SAR data obtained from the
9 to SAR driver. The front end application in userspace will interact with SAR
11 SAR table index and use available communication like MBIM interface to enable
13 given platform needs to support "Dynamic SAR" configuration for a modem available
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| /kernel/linux/linux-6.6/arch/parisc/kernel/ |
| D | perf_asm.S | 154 shrpd ret0,%r0,%sar,%r1
178 shrpd ret0,%r0,%sar,%r1
274 shrpd ret0,%r0,%sar,%r1
286 shrpd ret0,%r0,%sar,%r1
322 shrpd ret0,%r0,%sar,%r1
358 shrpd ret0,%r0,%sar,%r1
370 shrpd ret0,%r0,%sar,%r1
466 shrpd ret0,%r0,%sar,%r1
478 shrpd ret0,%r0,%sar,%r1
514 shrpd ret0,%r0,%sar,%r1
[all …]
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| /kernel/linux/linux-5.10/arch/parisc/kernel/ |
| D | perf_asm.S | 154 shrpd ret0,%r0,%sar,%r1
178 shrpd ret0,%r0,%sar,%r1
274 shrpd ret0,%r0,%sar,%r1
286 shrpd ret0,%r0,%sar,%r1
322 shrpd ret0,%r0,%sar,%r1
358 shrpd ret0,%r0,%sar,%r1
370 shrpd ret0,%r0,%sar,%r1
466 shrpd ret0,%r0,%sar,%r1
478 shrpd ret0,%r0,%sar,%r1
514 shrpd ret0,%r0,%sar,%r1
[all …]
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