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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Drenesas,sdhi.yaml4 $id: http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#
7 title: Renesas SDHI SD/MMC controller
16 - const: renesas,sdhi-sh73a0 # R-Mobile APE6
18 - const: renesas,sdhi-r7s72100 # RZ/A1H
20 - const: renesas,sdhi-r7s9210 # SH-Mobile AG5
22 - const: renesas,sdhi-r8a73a4 # R-Mobile APE6
24 - const: renesas,sdhi-r8a7740 # R-Mobile A1
27 - renesas,sdhi-r8a7778 # R-Car M1
28 - renesas,sdhi-r8a7779 # R-Car H1
29 - const: renesas,rcar-gen1-sdhi # R-Car Gen1
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Drenesas,sdhi.yaml4 $id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#"
7 title: Renesas SDHI SD/MMC controller
19 - const: renesas,sdhi-sh73a0 # R-Mobile APE6
21 - const: renesas,sdhi-r7s72100 # RZ/A1H
23 - const: renesas,sdhi-r7s9210 # SH-Mobile AG5
25 - const: renesas,sdhi-r8a73a4 # R-Mobile APE6
27 - const: renesas,sdhi-r8a7740 # R-Mobile A1
30 - renesas,sdhi-r8a7778 # R-Car M1
31 - renesas,sdhi-r8a7779 # R-Car H1
32 - const: renesas,rcar-gen1-sdhi # R-Car Gen1
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Drenesas_sdhi_sys_dmac.c3 * DMA support use of SYS DMAC with SDHI SD/SDIO controller
72 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
73 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
74 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
75 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
76 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
77 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
78 { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, },
79 { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, },
80 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
[all …]
Drenesas_sdhi_internal_dmac.c3 * DMA support for Internal DMAC with SDHI SD/SDIO controller
62 * - Since this SDHI DMAC register set has 16 but 32-bit width, we
69 * On R-Car H3 ES1.* and M3-W ES1.0, when multiple SDHI channels use
120 { .compatible = "renesas,sdhi-r7s9210", .data = &of_rza2_compatible, },
121 { .compatible = "renesas,sdhi-mmc-r8a77470", .data = &of_rcar_gen3_compatible, },
122 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
123 { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
124 { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
366 MODULE_DESCRIPTION("Renesas SDHI driver for internal DMAC");
Drenesas_sdhi_core.c3 * Renesas SDHI
1010 /* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */ in renesas_sdhi_probe()
1035 * All SDHI blocks support 2-byte and larger block sizes in 4-bit in renesas_sdhi_probe()
1041 * All SDHI blocks support SDIO IRQ signalling. in renesas_sdhi_probe()
1045 /* All SDHI have CMD12 control bit */ in renesas_sdhi_probe()
1048 /* All SDHI have SDIO status bits which must be 1 */ in renesas_sdhi_probe()
1058 /* GEN2_SDR104 is first known SDHI to use 32bit block count */ in renesas_sdhi_probe()
1062 /* One Gen2 SDHI incarnation does NOT have a CBSY bit */ in renesas_sdhi_probe()
/kernel/linux/linux-6.6/drivers/mmc/host/
Drenesas_sdhi_sys_dmac.c3 * DMA support use of SYS DMAC with SDHI SD/SDIO controller
75 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
76 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
77 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
78 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
79 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
80 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
81 { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, },
82 { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, },
83 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
[all …]
Drenesas_sdhi_internal_dmac.c3 * DMA support for Internal DMAC with SDHI SD/SDIO controller
70 * - Since this SDHI DMAC register set has 16 but 32-bit width, we
77 * ES1.0, when multiple SDHI channels use RX DMAC simultaneously, sometimes
278 { .compatible = "renesas,sdhi-r7s9210", .data = &of_rza2_compatible, },
279 { .compatible = "renesas,sdhi-mmc-r8a77470", .data = &of_rcar_gen3_compatible, },
280 { .compatible = "renesas,sdhi-r8a7795", .data = &of_r8a7795_compatible, },
281 { .compatible = "renesas,sdhi-r8a77961", .data = &of_r8a77961_compatible, },
282 { .compatible = "renesas,sdhi-r8a77965", .data = &of_r8a77965_compatible, },
283 { .compatible = "renesas,sdhi-r8a77970", .data = &of_r8a77970_compatible, },
284 { .compatible = "renesas,sdhi-r8a77990", .data = &of_r8a77990_compatible, },
[all …]
Drenesas_sdhi_core.c3 * Renesas SDHI
1002 /* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */ in renesas_sdhi_probe()
1026 * All SDHI blocks support 2-byte and larger block sizes in 4-bit in renesas_sdhi_probe()
1032 * All SDHI blocks support SDIO IRQ signalling. in renesas_sdhi_probe()
1036 /* All SDHI have CMD12 control bit */ in renesas_sdhi_probe()
1039 /* All SDHI have SDIO status bits which must be 1 */ in renesas_sdhi_probe()
1042 /* All SDHI support HW busy detection */ in renesas_sdhi_probe()
1052 /* GEN2_SDR104 is first known SDHI to use 32bit block count */ in renesas_sdhi_probe()
1056 /* One Gen2 SDHI incarnation does NOT have a CBSY bit */ in renesas_sdhi_probe()
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh2a/
Dsetup-sh7203.c36 /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */
37 ROMDEC, FLCTL, SDHI, RTC, RCAN0, RCAN1, enumerator
122 INTC_IRQ(SDHI, 228), INTC_IRQ(SDHI, 229),
123 INTC_IRQ(SDHI, 230),
160 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } },
Dsetup-sh7264.c42 NFMC, SDHI, RTC, enumerator
160 INTC_IRQ(SDHI, 292), INTC_IRQ(SDHI, 293),
161 INTC_IRQ(SDHI, 294),
213 { 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { NFMC, SDHI, RTC, 0 } },
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7366.c265 SDHI, CMT, TSIF, SIU, enumerator
296 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
297 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
356 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } },
Dsetup-sh7343.c323 IRDA, SDHI, CMT, TSIF, SIU, enumerator
358 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
359 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
417 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } },
Dsetup-sh7722.c544 SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI, enumerator
571 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
572 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
633 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, 0, 0, SDHI } },
Dsetup-sh7734.c362 SDHI, enumerator
437 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2),
467 SDHI, /* SDHI 0-2 */
503 { TMU30, TMU60, RTC, SDHI } },
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7366.c265 SDHI, CMT, TSIF, SIU, enumerator
296 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
297 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
356 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } },
Dsetup-sh7343.c323 IRDA, SDHI, CMT, TSIF, SIU, enumerator
358 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
359 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
417 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } },
Dsetup-sh7722.c544 SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI, enumerator
571 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
572 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
633 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, 0, 0, SDHI } },
Dsetup-sh7734.c362 SDHI, enumerator
437 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2),
467 SDHI, /* SDHI 0-2 */
503 { TMU30, TMU60, RTC, SDHI } },
/kernel/linux/linux-6.6/arch/arm64/boot/dts/renesas/
Dr9a09g011.dtsi73 compatible = "renesas,sdhi-r9a09g011",
74 "renesas,rcar-gen3-sdhi";
89 compatible = "renesas,sdhi-r9a09g011",
90 "renesas,rcar-gen3-sdhi";
105 compatible = "renesas,sdhi-r9a09g011",
106 "renesas,rcar-gen3-sdhi";
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh2a/
Dsetup-sh7203.c36 /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */
37 ROMDEC, FLCTL, SDHI, RTC, RCAN0, RCAN1, enumerator
122 INTC_IRQ(SDHI, 228), INTC_IRQ(SDHI, 229),
123 INTC_IRQ(SDHI, 230),
160 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } },
Dsetup-sh7264.c42 NFMC, SDHI, RTC, enumerator
160 INTC_IRQ(SDHI, 292), INTC_IRQ(SDHI, 293),
161 INTC_IRQ(SDHI, 294),
213 { 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { NFMC, SDHI, RTC, 0 } },
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dr8a7779.dtsi389 compatible = "renesas,sdhi-r8a7779",
390 "renesas,rcar-gen1-sdhi";
399 compatible = "renesas,sdhi-r8a7779",
400 "renesas,rcar-gen1-sdhi";
409 compatible = "renesas,sdhi-r8a7779",
410 "renesas,rcar-gen1-sdhi";
419 compatible = "renesas,sdhi-r8a7779",
420 "renesas,rcar-gen1-sdhi";
Dr8a7778.dtsi405 compatible = "renesas,sdhi-r8a7778",
406 "renesas,rcar-gen1-sdhi";
415 compatible = "renesas,sdhi-r8a7778",
416 "renesas,rcar-gen1-sdhi";
425 compatible = "renesas,sdhi-r8a7778",
426 "renesas,rcar-gen1-sdhi";
/kernel/linux/linux-6.6/arch/arm/boot/dts/renesas/
Dr8a7779.dtsi455 compatible = "renesas,sdhi-r8a7779",
456 "renesas,rcar-gen1-sdhi";
465 compatible = "renesas,sdhi-r8a7779",
466 "renesas,rcar-gen1-sdhi";
475 compatible = "renesas,sdhi-r8a7779",
476 "renesas,rcar-gen1-sdhi";
485 compatible = "renesas,sdhi-r8a7779",
486 "renesas,rcar-gen1-sdhi";
Dr8a7778.dtsi408 compatible = "renesas,sdhi-r8a7778",
409 "renesas,rcar-gen1-sdhi";
418 compatible = "renesas,sdhi-r8a7778",
419 "renesas,rcar-gen1-sdhi";
428 compatible = "renesas,sdhi-r8a7778",
429 "renesas,rcar-gen1-sdhi";

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