Home
last modified time | relevance | path

Searched full:v1 (Results 1 – 25 of 5528) sorted by relevance

12345678910>>...222

/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/
Dmapfile.csv15 0x00000000410fd020,v1,arm/cortex-a34,core
16 0x00000000410fd030,v1,arm/cortex-a53,core
17 0x00000000420f1000,v1,arm/cortex-a53,core
18 0x00000000410fd040,v1,arm/cortex-a35,core
19 0x00000000410fd050,v1,arm/cortex-a55,core
20 0x00000000410fd060,v1,arm/cortex-a65-e1,core
21 0x00000000410fd4a0,v1,arm/cortex-a65-e1,core
22 0x00000000410fd070,v1,arm/cortex-a57-a72,core
23 0x00000000410fd080,v1,arm/cortex-a57-a72,core
24 0x00000000410fd090,v1,arm/cortex-a73,core
[all …]
/kernel/linux/linux-6.6/Documentation/driver-api/media/drivers/ccs/
Dccs-regs.asc13 # v1.1 defined in version 1.1
103 analog_linear_gain_min 0x0094 16 v1.1
104 analog_linear_gain_max 0x0096 16 v1.1
105 analog_linear_gain_step_size 0x0098 16 v1.1
106 analog_exponential_gain_min 0x009a 16 v1.1
107 analog_exponential_gain_max 0x009c 16 v1.1
108 analog_exponential_gain_step_size 0x009e 16 v1.1
158 emb_data_ctrl 0x0122 v1.1
176 analog_linear_gain_global 0x0206 16 v1.1
177 analog_exponential_gain_global 0x0208 16 v1.1
[all …]
/kernel/linux/linux-6.6/net/ceph/
Dmessenger_v1.c112 BUG_ON(con->v1.out_skip); in con_out_kvec_reset()
114 con->v1.out_kvec_left = 0; in con_out_kvec_reset()
115 con->v1.out_kvec_bytes = 0; in con_out_kvec_reset()
116 con->v1.out_kvec_cur = &con->v1.out_kvec[0]; in con_out_kvec_reset()
122 int index = con->v1.out_kvec_left; in con_out_kvec_add()
124 BUG_ON(con->v1.out_skip); in con_out_kvec_add()
125 BUG_ON(index >= ARRAY_SIZE(con->v1.out_kvec)); in con_out_kvec_add()
127 con->v1.out_kvec[index].iov_len = size; in con_out_kvec_add()
128 con->v1.out_kvec[index].iov_base = data; in con_out_kvec_add()
129 con->v1.out_kvec_left++; in con_out_kvec_add()
[all …]
/kernel/linux/linux-5.10/arch/powerpc/lib/
Dxor_vmx.c44 #define XOR(V1, V2) \ argument
46 V1##_0 = vec_xor(V1##_0, V2##_0); \
47 V1##_1 = vec_xor(V1##_1, V2##_1); \
48 V1##_2 = vec_xor(V1##_2, V2##_2); \
49 V1##_3 = vec_xor(V1##_3, V2##_3); \
55 DEFINE(v1); in __xor_altivec_2()
60 LOAD(v1); in __xor_altivec_2()
62 XOR(v1, v2); in __xor_altivec_2()
63 STORE(v1); in __xor_altivec_2()
65 v1 += 4; in __xor_altivec_2()
[all …]
/kernel/linux/linux-6.6/arch/powerpc/lib/
Dxor_vmx.c44 #define XOR(V1, V2) \ argument
46 V1##_0 = vec_xor(V1##_0, V2##_0); \
47 V1##_1 = vec_xor(V1##_1, V2##_1); \
48 V1##_2 = vec_xor(V1##_2, V2##_2); \
49 V1##_3 = vec_xor(V1##_3, V2##_3); \
56 DEFINE(v1); in __xor_altivec_2()
61 LOAD(v1); in __xor_altivec_2()
63 XOR(v1, v2); in __xor_altivec_2()
64 STORE(v1); in __xor_altivec_2()
66 v1 += 4; in __xor_altivec_2()
[all …]
/kernel/linux/linux-6.6/arch/s390/include/asm/
Dvx-insn-asm.h97 .ifc \vxr,%v1
198 * @v1: First vector register designated operand
203 .macro RXB rxb v1 v2=0 v3=0 v4=0
205 .if \v1 & 0x10
222 * @v1: First vector register designated operand (for RXB)
227 .macro MRXB m v1 v2=0 v3=0 v4=0
229 RXB rxb, \v1, \v2, \v3, \v4
237 * @v1: First vector register designated operand (for RXB)
242 .macro MRXBOPC m opc v1 v2=0 v3=0 v4=0
243 MRXB \m, \v1, \v2, \v3, \v4
[all …]
/kernel/linux/linux-5.10/arch/s390/include/asm/
Dvx-insn.h94 .ifc \vxr,%v1
195 * @v1: First vector register designated operand
200 .macro RXB rxb v1 v2=0 v3=0 v4=0
202 .if \v1 & 0x10
219 * @v1: First vector register designated operand (for RXB)
224 .macro MRXB m v1 v2=0 v3=0 v4=0
226 RXB rxb, \v1, \v2, \v3, \v4
234 * @v1: First vector register designated operand (for RXB)
239 .macro MRXBOPC m opc v1 v2=0 v3=0 v4=0
240 MRXB \m, \v1, \v2, \v3, \v4
[all …]
/kernel/linux/linux-6.6/arch/arm64/crypto/
Daes-ce-ccm-core.S22 eor v1.16b, v1.16b, v1.16b
26 ins v1.b[0], w7
27 ext v1.16b, v1.16b, v1.16b, #1 /* rotate in the input bytes */
30 eor v0.16b, v0.16b, v1.16b
57 ld1 {v1.16b}, [x1], #16 /* load next input block */
58 eor v0.16b, v0.16b, v1.16b /* xor with mac */
76 9: ext v1.16b, v1.16b, v1.16b, #1
79 91: eor v0.16b, v0.16b, v1.16b
94 ld1 {v1.16b}, [x1] /* load 1st ctriv */
103 aese v1.16b, v4.16b
[all …]
/kernel/linux/linux-6.6/arch/loongarch/lib/
Dxor_template.c17 unsigned long * __restrict v1,
24 LD_INOUT_LINE(v1)
26 ST_LINE(v1)
27 : : [v1] "r"(v1), [v2] "r"(v2) : "memory"
30 v1 += LINE_WIDTH / sizeof(unsigned long);
36 unsigned long * __restrict v1,
44 LD_INOUT_LINE(v1)
47 ST_LINE(v1)
48 : : [v1] "r"(v1), [v2] "r"(v2), [v3] "r"(v3) : "memory"
51 v1 += LINE_WIDTH / sizeof(unsigned long);
[all …]
/kernel/linux/linux-5.10/arch/arm64/crypto/
Daes-ce-ccm-core.S23 eor v1.16b, v1.16b, v1.16b
27 ins v1.b[0], w7
28 ext v1.16b, v1.16b, v1.16b, #1 /* rotate in the input bytes */
31 eor v0.16b, v0.16b, v1.16b
58 ld1 {v1.16b}, [x1], #16 /* load next input block */
59 eor v0.16b, v0.16b, v1.16b /* xor with mac */
77 9: ext v1.16b, v1.16b, v1.16b, #1
80 91: eor v0.16b, v0.16b, v1.16b
95 ld1 {v1.16b}, [x1] /* load 1st ctriv */
104 aese v1.16b, v4.16b
[all …]
/kernel/linux/linux-5.10/arch/s390/crypto/
Dcrc32le-vx.S98 * V1..V4: Data for CRC computation.
130 VLM %v1,%v4,0,%r3 /* 64-bytes into V1..V4 */
131 VPERM %v1,%v1,%v1,CONST_PERM_LE2BE
136 VX %v1,%v0,%v1 /* V1 ^= CRC */
152 * Perform a GF(2) multiplication of the doublewords in V1 with
155 * stored in V1. Repeat this step for the register contents
158 VGFMAG %v1,CONST_R2R1,%v1,%v5
171 * Fold V1 to V4 into a single 128-bit value in V1. Multiply V1 with R3
175 VGFMAG %v1,CONST_R4R3,%v1,%v2
176 VGFMAG %v1,CONST_R4R3,%v1,%v3
[all …]
/kernel/linux/linux-6.6/arch/s390/crypto/
Dcrc32le-vx.S100 * V1..V4: Data for CRC computation.
132 VLM %v1,%v4,0,%r3 /* 64-bytes into V1..V4 */
133 VPERM %v1,%v1,%v1,CONST_PERM_LE2BE
138 VX %v1,%v0,%v1 /* V1 ^= CRC */
154 * Perform a GF(2) multiplication of the doublewords in V1 with
157 * stored in V1. Repeat this step for the register contents
160 VGFMAG %v1,CONST_R2R1,%v1,%v5
173 * Fold V1 to V4 into a single 128-bit value in V1. Multiply V1 with R3
177 VGFMAG %v1,CONST_R4R3,%v1,%v2
178 VGFMAG %v1,CONST_R4R3,%v1,%v3
[all …]
/kernel/linux/linux-6.6/tools/testing/selftests/powerpc/math/
Dvmx_asm.S9 # Should be safe from C, only touches r4, r5 and v0,v1,v2
16 vcmpequd. v1,v0,v20
17 vmr v2,v1
21 vcmpequd. v1,v0,v21
22 vand v2,v2,v1
26 vcmpequd. v1,v0,v22
27 vand v2,v2,v1
31 vcmpequd. v1,v0,v23
32 vand v2,v2,v1
36 vcmpequd. v1,v0,v24
[all …]
/kernel/linux/linux-5.10/tools/testing/selftests/powerpc/math/
Dvmx_asm.S9 # Should be safe from C, only touches r4, r5 and v0,v1,v2
16 vcmpequd. v1,v0,v20
17 vmr v2,v1
21 vcmpequd. v1,v0,v21
22 vand v2,v2,v1
26 vcmpequd. v1,v0,v22
27 vand v2,v2,v1
31 vcmpequd. v1,v0,v23
32 vand v2,v2,v1
36 vcmpequd. v1,v0,v24
[all …]
/kernel/linux/linux-6.6/include/pcmcia/
Ddevice_id.h24 #define PCMCIA_DEVICE_PROD_ID1(v1, vh1) { \ argument
26 .prod_id = { (v1), NULL, NULL, NULL }, \
39 #define PCMCIA_DEVICE_PROD_ID12(v1, v2, vh1, vh2) { \ argument
42 .prod_id = { (v1), (v2), NULL, NULL }, \
45 #define PCMCIA_DEVICE_PROD_ID13(v1, v3, vh1, vh3) { \ argument
48 .prod_id = { (v1), NULL, (v3), NULL }, \
51 #define PCMCIA_DEVICE_PROD_ID14(v1, v4, vh1, vh4) { \ argument
54 .prod_id = { (v1), NULL, NULL, (v4) }, \
57 #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \ argument
61 .prod_id = { (v1), (v2), (v3), NULL },\
[all …]
/kernel/linux/linux-5.10/include/pcmcia/
Ddevice_id.h24 #define PCMCIA_DEVICE_PROD_ID1(v1, vh1) { \ argument
26 .prod_id = { (v1), NULL, NULL, NULL }, \
39 #define PCMCIA_DEVICE_PROD_ID12(v1, v2, vh1, vh2) { \ argument
42 .prod_id = { (v1), (v2), NULL, NULL }, \
45 #define PCMCIA_DEVICE_PROD_ID13(v1, v3, vh1, vh3) { \ argument
48 .prod_id = { (v1), NULL, (v3), NULL }, \
51 #define PCMCIA_DEVICE_PROD_ID14(v1, v4, vh1, vh4) { \ argument
54 .prod_id = { (v1), NULL, NULL, (v4) }, \
57 #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \ argument
61 .prod_id = { (v1), (v2), (v3), NULL },\
[all …]
/kernel/linux/linux-5.10/tools/arch/x86/lib/
Dx86-opcode-map.txt28 # (v1): this opcode only supports 128bit VEX.
349 # Many AVX instructions lack v1 superscript, according to Intel AVX-Prgramming
351 10: vmovups Vps,Wps | vmovupd Vpd,Wpd (66) | vmovss Vx,Hx,Wss (F3),(v1) | vmovsd Vx,Hx,Wsd (F2),(v1)
352 … vmovups Wps,Vps | vmovupd Wpd,Vpd (66) | vmovss Wss,Hx,Vss (F3),(v1) | vmovsd Wsd,Hx,Vsd (F2),(v1)
353 12: vmovlps Vq,Hq,Mq (v1) | vmovhlps Vq,Hq,Uq (v1) | vmovlpd Vq,Hq,Mq (66),(v1) | vmovsldup Vx,Wx (…
354 13: vmovlps Mq,Vq (v1) | vmovlpd Mq,Vq (66),(v1)
357 16: vmovhps Vdq,Hq,Mq (v1) | vmovlhps Vdq,Hq,Uq (v1) | vmovhpd Vdq,Hq,Mq (66),(v1) | vmovshdup Vx,W…
358 17: vmovhps Mq,Vq (v1) | vmovhpd Mq,Vq (66),(v1)
382 …s Vps,Qpi | cvtpi2pd Vpd,Qpi (66) | vcvtsi2ss Vss,Hss,Ey (F3),(v1) | vcvtsi2sd Vsd,Hsd,Ey (F2),(v1)
384 …tps2pi Ppi,Wps | cvttpd2pi Ppi,Wpd (66) | vcvttss2si Gy,Wss (F3),(v1) | vcvttsd2si Gy,Wsd (F2),(v1)
[all …]
/kernel/linux/linux-5.10/arch/x86/lib/
Dx86-opcode-map.txt28 # (v1): this opcode only supports 128bit VEX.
349 # Many AVX instructions lack v1 superscript, according to Intel AVX-Prgramming
351 10: vmovups Vps,Wps | vmovupd Vpd,Wpd (66) | vmovss Vx,Hx,Wss (F3),(v1) | vmovsd Vx,Hx,Wsd (F2),(v1)
352 … vmovups Wps,Vps | vmovupd Wpd,Vpd (66) | vmovss Wss,Hx,Vss (F3),(v1) | vmovsd Wsd,Hx,Vsd (F2),(v1)
353 12: vmovlps Vq,Hq,Mq (v1) | vmovhlps Vq,Hq,Uq (v1) | vmovlpd Vq,Hq,Mq (66),(v1) | vmovsldup Vx,Wx (…
354 13: vmovlps Mq,Vq (v1) | vmovlpd Mq,Vq (66),(v1)
357 16: vmovhps Vdq,Hq,Mq (v1) | vmovlhps Vdq,Hq,Uq (v1) | vmovhpd Vdq,Hq,Mq (66),(v1) | vmovshdup Vx,W…
358 17: vmovhps Mq,Vq (v1) | vmovhpd Mq,Vq (66),(v1)
382 …s Vps,Qpi | cvtpi2pd Vpd,Qpi (66) | vcvtsi2ss Vss,Hss,Ey (F3),(v1) | vcvtsi2sd Vsd,Hsd,Ey (F2),(v1)
384 …tps2pi Ppi,Wps | cvttpd2pi Ppi,Wpd (66) | vcvttss2si Gy,Wss (F3),(v1) | vcvttsd2si Gy,Wsd (F2),(v1)
[all …]
/kernel/linux/linux-6.6/arch/x86/lib/
Dx86-opcode-map.txt28 # (v1): this opcode only supports 128bit VEX.
349 # Many AVX instructions lack v1 superscript, according to Intel AVX-Prgramming
351 10: vmovups Vps,Wps | vmovupd Vpd,Wpd (66) | vmovss Vx,Hx,Wss (F3),(v1) | vmovsd Vx,Hx,Wsd (F2),(v1)
352 … vmovups Wps,Vps | vmovupd Wpd,Vpd (66) | vmovss Wss,Hx,Vss (F3),(v1) | vmovsd Wsd,Hx,Vsd (F2),(v1)
353 12: vmovlps Vq,Hq,Mq (v1) | vmovhlps Vq,Hq,Uq (v1) | vmovlpd Vq,Hq,Mq (66),(v1) | vmovsldup Vx,Wx (…
354 13: vmovlps Mq,Vq (v1) | vmovlpd Mq,Vq (66),(v1)
357 16: vmovhps Vdq,Hq,Mq (v1) | vmovlhps Vdq,Hq,Uq (v1) | vmovhpd Vdq,Hq,Mq (66),(v1) | vmovshdup Vx,W…
358 17: vmovhps Mq,Vq (v1) | vmovhpd Mq,Vq (66),(v1)
382 …s Vps,Qpi | cvtpi2pd Vpd,Qpi (66) | vcvtsi2ss Vss,Hss,Ey (F3),(v1) | vcvtsi2sd Vsd,Hsd,Ey (F2),(v1)
384 …tps2pi Ppi,Wps | cvttpd2pi Ppi,Wpd (66) | vcvttss2si Gy,Wss (F3),(v1) | vcvttsd2si Gy,Wsd (F2),(v1)
[all …]
/kernel/linux/linux-6.6/tools/arch/x86/lib/
Dx86-opcode-map.txt28 # (v1): this opcode only supports 128bit VEX.
349 # Many AVX instructions lack v1 superscript, according to Intel AVX-Prgramming
351 10: vmovups Vps,Wps | vmovupd Vpd,Wpd (66) | vmovss Vx,Hx,Wss (F3),(v1) | vmovsd Vx,Hx,Wsd (F2),(v1)
352 … vmovups Wps,Vps | vmovupd Wpd,Vpd (66) | vmovss Wss,Hx,Vss (F3),(v1) | vmovsd Wsd,Hx,Vsd (F2),(v1)
353 12: vmovlps Vq,Hq,Mq (v1) | vmovhlps Vq,Hq,Uq (v1) | vmovlpd Vq,Hq,Mq (66),(v1) | vmovsldup Vx,Wx (…
354 13: vmovlps Mq,Vq (v1) | vmovlpd Mq,Vq (66),(v1)
357 16: vmovhps Vdq,Hq,Mq (v1) | vmovlhps Vdq,Hq,Uq (v1) | vmovhpd Vdq,Hq,Mq (66),(v1) | vmovshdup Vx,W…
358 17: vmovhps Mq,Vq (v1) | vmovhpd Mq,Vq (66),(v1)
382 …s Vps,Qpi | cvtpi2pd Vpd,Qpi (66) | vcvtsi2ss Vss,Hss,Ey (F3),(v1) | vcvtsi2sd Vsd,Hsd,Ey (F2),(v1)
384 …tps2pi Ppi,Wps | cvttpd2pi Ppi,Wpd (66) | vcvttss2si Gy,Wss (F3),(v1) | vcvttsd2si Gy,Wsd (F2),(v1)
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/
Dmapfile.csv2 GenuineIntel-6-(97|9A|B7|BA|BF),v1.21,alderlake,core
3 GenuineIntel-6-BE,v1.21,alderlaken,core
8 GenuineIntel-6-55-[56789ABCDEF],v1.19,cascadelakex,core
9 GenuineIntel-6-9[6C],v1.04,elkhartlake,core
11 GenuineIntel-6-7A,v1.01,goldmontplus,core
12 GenuineIntel-6-B6,v1.00,grandridge,core
13 GenuineIntel-6-A[DE],v1.01,graniterapids,core
16 GenuineIntel-6-7[DE],v1.19,icelake,core
17 GenuineIntel-6-6[AC],v1.21,icelakex,core
22 GenuineIntel-6-A[AC],v1.04,meteorlake,core
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/
Dinterlaken-lac-portals.dtsi39 compatible = "fsl,interlaken-lac-portal-v1.0";
44 compatible = "fsl,interlaken-lac-portal-v1.0";
49 compatible = "fsl,interlaken-lac-portal-v1.0";
54 compatible = "fsl,interlaken-lac-portal-v1.0";
59 compatible = "fsl,interlaken-lac-portal-v1.0";
64 compatible = "fsl,interlaken-lac-portal-v1.0";
69 compatible = "fsl,interlaken-lac-portal-v1.0";
74 compatible = "fsl,interlaken-lac-portal-v1.0";
79 compatible = "fsl,interlaken-lac-portal-v1.0";
84 compatible = "fsl,interlaken-lac-portal-v1.0";
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dinterlaken-lac-portals.dtsi39 compatible = "fsl,interlaken-lac-portal-v1.0";
44 compatible = "fsl,interlaken-lac-portal-v1.0";
49 compatible = "fsl,interlaken-lac-portal-v1.0";
54 compatible = "fsl,interlaken-lac-portal-v1.0";
59 compatible = "fsl,interlaken-lac-portal-v1.0";
64 compatible = "fsl,interlaken-lac-portal-v1.0";
69 compatible = "fsl,interlaken-lac-portal-v1.0";
74 compatible = "fsl,interlaken-lac-portal-v1.0";
79 compatible = "fsl,interlaken-lac-portal-v1.0";
84 compatible = "fsl,interlaken-lac-portal-v1.0";
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h67 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
69 FN(reg, f1), v1,\
72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
74 FN(reg, f1), v1,\
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
80 FN(reg, f1), v1,\
85 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
88 FN(reg, f1), v1,\
94 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
97 FN(reg, f1), v1,\
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h67 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
69 FN(reg, f1), v1,\
72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
74 FN(reg, f1), v1,\
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
80 FN(reg, f1), v1,\
85 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
88 FN(reg, f1), v1,\
94 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
97 FN(reg, f1), v1,\
[all …]

12345678910>>...222