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/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dmsm8996-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
17 drive-strength = <2>; /* 2 mA */
18 bias-pull-down; /* pull down */
19 input-enable;
32 drive-strength = <16>;
33 bias-disable;
34 output-low;
44 drive-strength = <16>;
45 bias-pull-down;
[all …]
Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 /delete-node/ &hyp_mem;
24 /delete-node/ &xbl_mem;
25 /delete-node/ &aop_mem;
26 /delete-node/ &sec_apps_mem;
27 /delete-node/ &tz_mem;
35 reserved-memory {
[all …]
Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
18 compatible = "qcom,sc7180-idp", "qcom,sc7180";
28 stdout-path = "serial0:115200n8";
40 /delete-node/ &hyp_mem;
41 /delete-node/ &xbl_mem;
42 /delete-node/ &aop_mem;
43 /delete-node/ &sec_apps_mem;
[all …]
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
26 stdout-path = "serial0:115200n8";
30 compatible = "pwm-backlight";
32 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
33 power-supply = <&ppvar_sys>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&ap_edp_bklten>;
[all …]
Dqcs404-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 stdout-path = "serial0";
20 vph_pwr: vph-pwr-regulator {
21 compatible = "regulator-fixed";
22 regulator-name = "vph_pwr";
23 regulator-always-on;
24 regulator-boot-on;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dqcom-apq8064-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 sdc4_gpios: sdc4-gpios {
11 sdcc1_pins: sdcc1-pin-active {
14 drive-strengh = <16>;
15 bias-disable;
20 drive-strengh = <10>;
21 bias-pull-up;
26 drive-strengh = <10>;
27 bias-pull-up;
31 sdcc3_pins: sdcc3-pin-active {
[all …]
Dqcom-apq8060-dragonboard.dts23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
26 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
27 #include "qcom-msm8660.dtsi"
31 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
38 stdout-path = "serial0:115200n8";
42 compatible = "simple-bus";
45 vph: regulator-fixed {
46 compatible = "regulator-fixed";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-apq8064-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 sdc4_gpios: sdc4-gpios {
11 sdcc1_pins: sdcc1-pin-active {
14 drive-strengh = <16>;
15 bias-disable;
20 drive-strengh = <10>;
21 bias-pull-up;
26 drive-strengh = <10>;
27 bias-pull-up;
31 sdcc3_pins: sdcc3-pin-active {
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dti,da850-pupd.txt1 * Pin configuration for TI DA850/OMAP-L138/AM18x
3 These SoCs have a separate controller for setting bias (internal pullup/down).
4 Bias can only be selected for groups rather than individual pins.
8 - compatible: Must be "ti,da850-pupd"
9 - reg: Base address and length of the memory resource used by the pullup/down
17 - groups: An array of strings, each string containing the name of a pin group.
20 The pin configuration parameters use the generic pinconf bindings defined in
21 pinctrl-bindings.txt in this directory. The supported parameters are
22 bias-disable, bias-pull-up, bias-pull-down.
26 -------
[all …]
Dbrcm,iproc-gpio.txt1 Broadcom iProc GPIO/PINCONF Controller
5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
[all …]
Dbrcm,nsp-gpio.txt1 Broadcom Northstar plus (NSP) GPIO/PINCONF Controller
4 - compatible:
5 Must be "brcm,nsp-gpio-a"
7 - reg:
11 - #gpio-cells:
16 - gpio-controller:
19 - ngpios:
23 - interrupts:
26 - interrupt-controller:
29 - gpio-ranges:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dti,da850-pupd.txt1 * Pin configuration for TI DA850/OMAP-L138/AM18x
3 These SoCs have a separate controller for setting bias (internal pullup/down).
4 Bias can only be selected for groups rather than individual pins.
8 - compatible: Must be "ti,da850-pupd"
9 - reg: Base address and length of the memory resource used by the pullup/down
17 - groups: An array of strings, each string containing the name of a pin group.
20 The pin configuration parameters use the generic pinconf bindings defined in
21 pinctrl-bindings.txt in this directory. The supported parameters are
22 bias-disable, bias-pull-up, bias-pull-down.
26 -------
[all …]
Dpinctrl-single.txt1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
Dbrcm,iproc-gpio.txt1 Broadcom iProc GPIO/PINCONF Controller
5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
[all …]
Dxlnx,zynq-pinctrl.txt4 - compatible: "xlnx,zynq-pinctrl"
5 - syscon: phandle to SLCR
6 - reg: Offset and length of pinctrl space in SLCR
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 parameters, such as pull-up, slew rate, etc.
19 pinconf options. Those nodes can be pinmux nodes or pinconf nodes.
25 - groups: A list of pinmux groups.
26 - function: The name of a pinmux function to activate for the specified set
31 - pins: a list of pin names
32 - groups: A list of pinmux groups.
[all …]
Dpinctrl-zx.txt10 GMII_RXD3 ---+
12 DVI1_HS ---+----------------------------- GMII_RXD3 (TOP pin)
14 BGPIO16 ---+ ^
15 | pinconf
25 v | pinconf
26 KEY_ROW2 ---+ v
27 PORT1_LCD_TE ---+ |
28 | AGPIO10 ---+------ KEY_ROW2 (AON pin)
29 I2S0_DOUT3 ---+ |
30 |-----------------------+
[all …]
Dbrcm,nsp-gpio.txt1 Broadcom Northstar plus (NSP) GPIO/PINCONF Controller
4 - compatible:
5 Must be "brcm,nsp-gpio-a"
7 - reg:
11 - #gpio-cells:
16 - gpio-controller:
19 - ngpios:
23 - interrupts:
26 - interrupt-controller:
29 - gpio-ranges:
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/actions/
Dowl-s500-roseapplepi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright (C) 2020-2021 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
8 /dts-v1/;
10 #include "owl-s500.dtsi"
22 stdout-path = "serial2:115200n8";
30 syspwr: regulator-5v0 {
31 compatible = "regulator-fixed";
32 regulator-name = "SYSPWR";
33 regulator-min-microvolt = <5000000>;
34 regulator-max-microvolt = <5000000>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/actions/
Ds700-cubieboard7.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
19 stdout-path = "serial3:115200n8";
35 pinctrl-names = "default";
36 pinctrl-0 = <&i2c0_default>;
41 pinctrl-names = "default";
42 pinctrl-0 = <&i2c1_default>;
47 pinctrl-names = "default";
48 pinctrl-0 = <&i2c2_default>;
57 pinconf {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/actions/
Ds700-cubieboard7.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
19 stdout-path = "serial3:115200n8";
35 pinctrl-names = "default";
36 pinctrl-0 = <&i2c0_default>;
41 pinctrl-names = "default";
42 pinctrl-0 = <&i2c1_default>;
47 pinctrl-names = "default";
48 pinctrl-0 = <&i2c2_default>;
57 pinconf {
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/bcm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
10 select PINCONF
21 bool "Broadcom BCM2835 GPIO (with PINCONF) driver"
24 select PINCONF
33 bool "Broadcom iProc GPIO (with PINCONF) driver"
36 select PINCONF
42 The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
47 the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
59 All above SoCs GPIO controllers support basic PINCONF functions such
60 as bias pull up, pull down, and drive strength configurations, when
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhikey970-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/pinctrl/hisi.h>
10 range: gpio-range {
11 #pinctrl-single,gpio-range-cells = <3>;
15 compatible = "pinctrl-single";
17 #pinctrl-cells = <1>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
22 pinctrl-single,gpio-range = <&range 0 82 0>;
[all …]
/kernel/linux/linux-6.6/drivers/pinctrl/bcm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
10 select PINCONF
21 tristate "Broadcom BCM2835 GPIO (with PINCONF) driver"
24 select PINCONF
36 select PINCONF
44 If compiled as module it will be called pinctrl-bcm4908.
49 select PINCONF
110 bool "Broadcom iProc GPIO (with PINCONF) driver"
113 select PINCONF
119 The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
[all …]
/kernel/linux/linux-6.6/drivers/pinctrl/
Dpinconf-generic.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
21 #include <linux/pinctrl/pinconf.h>
22 #include <linux/pinctrl/pinconf-generic.h>
25 #include "pinconf.h"
26 #include "pinctrl-utils.h"
30 PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false),
31 PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false),
32 PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false),
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinconf-generic.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
21 #include <linux/pinctrl/pinconf.h>
22 #include <linux/pinctrl/pinconf-generic.h>
25 #include "pinconf.h"
26 #include "pinctrl-utils.h"
30 PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false),
31 PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false),
32 PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false),
[all …]

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