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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Daltera_tse.txt1 * Altera Triple-Speed Ethernet MAC driver (TSE)
4 - compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should
5 be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.
8 - reg: Address and length of the register set for the device. It contains
9 the information of registers in the same order as described by reg-names
10 - reg-names: Should contain the reg names
18 - interrupts: Should contain the TSE interrupts and it's mode.
19 - interrupt-names: Should contain the interrupt names
22 - rx-fifo-depth: MAC receive FIFO buffer depth in bytes
23 - tx-fifo-depth: MAC transmit FIFO buffer depth in bytes
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Daltr,tse.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Maxime Chevallier <maxime.chevallier@bootlin.com>
15 - const: altr,tse-1.0
16 - const: ALTR,tse-1.0
18 - const: altr,tse-msgdma-1.0
23 interrupt-names:
25 - const: rx_irq
26 - const: tx_irq
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/kernel/linux/linux-5.10/arch/nios2/boot/dts/
D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
10 compatible = "altr,niosii-max10";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "altr,nios2-1.1";
22 interrupt-controller;
23 #interrupt-cells = <1>;
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/kernel/linux/linux-6.6/arch/nios2/boot/dts/
D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
10 compatible = "altr,niosii-max10";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "altr,nios2-1.1";
22 interrupt-controller;
23 #interrupt-cells = <1>;
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/kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlxsw/
Dreg.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
29 #define MLXSW_REG_LEN(type) MLXSW_REG(type)->len
30 #define MLXSW_REG_ZERO(type, payload) memset(payload, 0, MLXSW_REG(type)->len)
32 /* SGCR - Switch General Configuration Register
33 * --------------------------------------------
55 /* SPAD - Switch Physical Address Register
56 * ---------------------------------------
72 /* SSPR - Switch System Port Record Register
73 * -----------------------------------------
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/kernel/linux/linux-6.6/drivers/net/ethernet/altera/
Daltera_tse_main.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Altera Triple-Speed Ethernet MAC driver
3 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
30 #include <linux/mdio/mdio-regmap.h>
36 #include <linux/pcs-lynx.h>
50 static int debug = -1;
52 MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
69 #define POLL_PHY (-1)
81 #define TSE_TX_THRESH(x) (x->tx_ring_size / 4)
89 return priv->tx_cons + priv->tx_ring_size - priv->tx_prod - 1; in tse_tx_avail()
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/kernel/linux/linux-5.10/drivers/net/ethernet/altera/
Daltera_tse_main.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Altera Triple-Speed Ethernet MAC driver
3 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
47 static int debug = -1;
49 MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
66 #define POLL_PHY (-1)
78 #define TSE_TX_THRESH(x) (x->tx_ring_size / 4)
86 return priv->tx_cons + priv->tx_ring_size - priv->tx_prod - 1; in tse_tx_avail()
93 return csrrd32(priv->mac_dev, in sgmii_pcs_read()
100 csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy0) + regnum * 4); in sgmii_pcs_write()
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