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/kernel/linux/linux-6.6/arch/arm/boot/dts/nuvoton/
Dnuvoton-npcm730-kudo.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
41 stdout-path = &serial3;
48 iio-hwmon {
49 compatible = "iio-hwmon";
50 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
55 compatible = "nuvoton,npcm750-jtag-master";
56 #address-cells = <1>;
[all …]
Dnuvoton-common-npcm7xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
7 #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <25000000>;
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/mscc/
Djaguar2_pcb110.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
11 model = "Jaguar2 Cu8-Sfp16 PCB110 Reference Board";
12 compatible = "mscc,jr2-pcb110", "mscc,jr2";
45 i2c0_imux: i2c0-imux {
46 compatible = "i2c-mux-pinctrl";
47 #address-cells = <1>;
48 #size-cells = <0>;
49 i2c-parent = <&i2c0>;
[all …]
Djaguar2_pcb111.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "mscc,jr2-pcb111", "mscc,jr2";
22 i2c0_imux: i2c0-imux {
23 compatible = "i2c-mux-pinctrl";
24 #address-cells = <1>;
25 #size-cells = <0>;
26 i2c-parent = <&i2c0>;
27 pinctrl-names =
29 pinctrl-0 = <&i2cmux_0>;
[all …]
Djaguar2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #address-cells = <1>;
8 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
29 cpuintc: interrupt-controller {
30 #address-cells = <0>;
31 #interrupt-cells = <1>;
32 interrupt-controller;
33 compatible = "mti,cpu-interrupt-controller";
[all …]
Dserval_common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
20 stdout-path = "serial0:115200n8";
23 i2c0_imux: i2c0-imux {
24 compatible = "i2c-mux-pinctrl";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 i2c-parent = <&i2c0>;
28 pinctrl-names =
31 pinctrl-0 = <&i2cmux_0>;
32 pinctrl-1 = <&i2cmux_1>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Ds5pv210-aries.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dbrcm,bcm11351-pinctrl.txt10 - compatible: Must be "brcm,bcm11351-pinctrl"
11 - reg: Base address of the PAD Controller register block and the size
17 compatible = "brcm,bcm11351-pinctrl";
27 Each pin configuration node is a sub-node of the pin controller node and is a
31 Please refer to the pinctrl-bindings.txt in this directory for details of the
38 arbitrary number of pins. The name of the pin group node is optional and not
45 details generic pin config properties, please refer to pinctrl-bindings.txt
46 and <include/linux/pinctrl/pinconfig-generic.h>.
49 Standard, I2C, and HDMI. Each type accepts a different set of pin config
50 properties. A list of pins and their types is provided below.
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Ds5pv210-aries.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
[all …]
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
Dtegra20-tamonten.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 rtc0 = "/i2c@7000d000/tps6586x@34";
15 stdout-path = "serial0:115200n8";
24 vdd-supply = <&hdmi_vdd_reg>;
25 pll-supply = <&hdmi_pll_reg>;
27 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
34 pinctrl-names = "default";
35 pinctrl-0 = <&state_default>;
39 nvidia,pins = "ata";
[all …]
Dat91sam9x5.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
22 interrupt-parent = <&aic>;
[all …]
Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
6 #include "tegra20-cpu-opp.dtsi"
13 rtc0 = "/i2c@7000d000/tps6586x@34";
19 stdout-path = "serial0:115200n8";
38 vdd-supply = <&hdmi_vdd_reg>;
39 pll-supply = <&hdmi_pll_reg>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
[all …]
Dat91sam9rl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pwm/pwm.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/
Dlan966x-pcb8309.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8309.dts - Device Tree file for PCB8309
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966";
20 stdout-path = "serial0:115200n8";
23 gpio-restart {
24 compatible = "gpio-restart";
29 i2c-mux {
[all …]
Dat91sam9x5.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
Dat91sam9rl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra20-tamonten.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 rtc0 = "/i2c@7000d000/tps6586x@34";
15 stdout-path = "serial0:115200n8";
24 vdd-supply = <&hdmi_vdd_reg>;
25 pll-supply = <&hdmi_pll_reg>;
27 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
34 pinctrl-names = "default";
35 pinctrl-0 = <&state_default>;
39 nvidia,pins = "ata";
[all …]
/kernel/linux/linux-6.6/arch/riscv/boot/dts/starfive/
Djh7110-starfive-visionfive-2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
26 stdout-path = "serial0:115200n8";
30 timebase-frequency = <4000000>;
38 gpio-restart {
39 compatible = "gpio-restart";
46 clock-frequency = <74250000>;
50 clock-frequency = <125000000>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dmsm8939-samsung-a7.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8939-pm8916.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
14 chassis-type = "handset";
23 stdout-path = "serial0";
26 reserved-memory {
28 tz-apps@85500000 {
[all …]
Dmsm8916-samsung-a2015-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include "msm8916-pm8916.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 stdout-path = "serial0";
20 reserved-memory {
22 tz-apps@85500000 {
24 no-map;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt7986a-bananapi-bpi-r3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/mt65xx.h>
18 model = "Bananapi BPI-R3";
19 chassis-type = "embedded";
20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/allwinner/
Dsun50i-h616.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-h616-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/clock/sun6i-rtc.h>
10 #include <dt-bindings/reset/sun50i-h616-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dste-ux500-samsung-janice.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy S Advance GT-I9070 also known as Janice.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]

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