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Searched +full:ixp43x +full:- +full:interrupt (Results 1 – 17 of 17) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dintel,ixp4xx-interrupt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/interrupt-controller/intel,ixp4xx-interrupt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Intel IXP4xx XScale Networking Processors Interrupt Controller
11 - Linus Walleij <linus.walleij@linaro.org>
14 This interrupt controller is found in the Intel IXP4xx processors.
19 The distinct IXP4xx families with different interrupt controller
20 variations are IXP42x, IXP43x, IXP45x and IXP46x. Those four
27 - enum:
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dintel,ixp4xx-interrupt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/interrupt-controller/intel,ixp4xx-interrupt.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Intel IXP4xx XScale Networking Processors Interrupt Controller
11 - Linus Walleij <linus.walleij@linaro.org>
14 This interrupt controller is found in the Intel IXP4xx processors.
19 The distinct IXP4xx families with different interrupt controller
20 variations are IXP42x, IXP43x, IXP45x and IXP46x. Those four
27 - enum:
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/kernel/linux/linux-6.6/arch/arm/boot/dts/intel/ixp/
Dintel-ixp43x.dtsi1 // SPDX-License-Identifier: ISC
7 #include "intel-ixp4xx.dtsi"
12 compatible = "intel,ixp43x-expansion-bus-controller", "syscon";
18 compatible = "intel,ixp43x-pci";
21 interrupt-controller@c8003000 {
22 compatible = "intel,ixp43x-interrupt";
Dintel-ixp43x-gateworks-gw2358.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for Gateworks IXP43x-based Cambria GW2358
6 /dts-v1/;
8 #include "intel-ixp43x.dtsi"
12 compatible = "gateworks,gw2358", "intel,ixp43x";
13 #address-cells = <1>;
14 #size-cells = <1>;
24 stdout-path = "uart0:115200n8";
32 compatible = "gpio-leds";
33 led-user {
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Dintel-ixp45x-ixp46x.dtsi1 // SPDX-License-Identifier: ISC
8 #include "intel-ixp4xx.dtsi"
13 compatible = "intel,ixp46x-expansion-bus-controller", "syscon";
19 compatible = "intel,ixp46x-rng";
23 interrupt-controller@c8003000 {
24 compatible = "intel,ixp43x-interrupt";
32 compatible = "intel,ixp4xx-udc";
39 compatible = "intel,ixp4xx-i2c";
47 compatible = "intel,ixp4xx-ethernet";
52 queue-rx = <&qmgr 0>;
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/kernel/linux/linux-6.6/drivers/irqchip/
Dirq-ixp4xx.c1 // SPDX-License-Identifier: GPL-2.0
3 * irqchip for the IXP4xx interrupt controller
6 * Based on arch/arm/mach-ixp4xx/common.c
8 * Copyright 2003-2004 (C) MontaVista, Software, Inc.
26 #define IXP4XX_ICPR 0x00 /* Interrupt Status */
27 #define IXP4XX_ICMR 0x04 /* Interrupt Enable */
28 #define IXP4XX_ICLR 0x08 /* Interrupt IRQ/FIQ Select */
31 #define IXP4XX_ICHR 0x14 /* Interrupt Priority */
35 /* IXP43x and IXP46x-only */
36 #define IXP4XX_ICPR2 0x20 /* Interrupt Status 2 */
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/kernel/linux/linux-5.10/drivers/irqchip/
Dirq-ixp4xx.c1 // SPDX-License-Identifier: GPL-2.0
3 * irqchip for the IXP4xx interrupt controller
6 * Based on arch/arm/mach-ixp4xx/common.c
8 * Copyright 2003-2004 (C) MontaVista, Software, Inc.
16 #include <linux/irqchip/irq-ixp4xx.h>
27 #define IXP4XX_ICPR 0x00 /* Interrupt Status */
28 #define IXP4XX_ICMR 0x04 /* Interrupt Enable */
29 #define IXP4XX_ICLR 0x08 /* Interrupt IRQ/FIQ Select */
32 #define IXP4XX_ICHR 0x14 /* Interrupt Priority */
36 /* IXP43x and IXP46x-only */
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dintel,ixp4xx-pci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/intel,ixp4xx-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
15 - $ref: /schemas/pci/pci-bus.yaml#
20 - enum:
21 - intel,ixp42x-pci
22 - intel,ixp43x-pci
23 description: The two supported variants are ixp42x and ixp43x,
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dintel,ixp4xx-expansion-bus-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
12 including IXP42x, IXP43x, IXP45x and IXP46x.
15 - Linus Walleij <linus.walleij@linaro.org>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
24 - intel,ixp42x-expansion-bus-controller
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dintel-ixp43x.dtsi1 // SPDX-License-Identifier: ISC
7 #include "intel-ixp4xx.dtsi"
11 interrupt-controller@c8003000 {
12 compatible = "intel,ixp43x-interrupt";
Dintel-ixp45x-ixp46x.dtsi1 // SPDX-License-Identifier: ISC
8 #include "intel-ixp4xx.dtsi"
12 interrupt-controller@c8003000 {
13 compatible = "intel,ixp43x-interrupt";
21 compatible = "intel,ixp4xx-udc";
28 compatible = "intel,ixp4xx-i2c";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/ata/
Dintel,ixp4xx-compact-flash.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/intel,ixp4xx-compact-flash.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 const: intel,ixp4xx-compact-flash
25 - description: Command interface registers
26 - description: Control interface registers
32 - compatible
33 - reg
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/kernel/linux/linux-5.10/arch/arm/mach-ixp4xx/include/mach/
Dixp4xx-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
8 * and machine-name.h.
11 * Copyright (C) 2003-2004 MontaVista Software, Inc.
29 * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals
44 * Peripheral space, including debug UART. Must be section-aligned so that
45 * it can be used with the low-level debug code.
259 /* ISR (Interrupt status) Register bit definitions */
269 /* INTEN (Interrupt Enable) Register bit definitions */
300 #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
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/kernel/linux/linux-6.6/drivers/pci/controller/
Dpci-ixp4xx.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on the IXP4xx arch/arm/mach-ixp4xx/common-pci.c driver
9 * Copyright (C) 2003 Greg Ungerer <gerg@linux-m68k.org>
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
15 * - Test IO-space access
16 * - DMA support
65 /* ISR (Interrupt status) Register bit definitions */
75 /* INTEN (Interrupt Enable) Register bit definitions */
113 * operates in big-endian or little-endian mode. That means that
114 * readl() and writel() that always use little-endian access
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/kernel/linux/linux-6.6/drivers/soc/ixp4xx/
Dixp4xx-npe.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * - Intel IXP4xx Developer's Manual and other e-papers
9 * - Intel IXP400 Access Library Software (BSD license)
10 * - previous works by Christian Hohnstaedt <chohnstaedt@innominate.com>
15 #include <linux/dma-mapping.h>
107 #define MSGSTAT_MBINT 0x00100000 /* Mailbox interrupt */
108 #define MSGSTAT_IFINT 0x00200000 /* InFifo interrupt */
109 #define MSGSTAT_OFINT 0x00400000 /* OutFifo interrupt */
110 #define MSGSTAT_WFINT 0x00800000 /* WatchFifo interrupt */
121 #define NPE_A_FIRMWARE "NPE-A"
[all …]
/kernel/linux/linux-5.10/drivers/soc/ixp4xx/
Dixp4xx-npe.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * - Intel IXP4xx Developer's Manual and other e-papers
9 * - Intel IXP400 Access Library Software (BSD license)
10 * - previous works by Christian Hohnstaedt <chohnstaedt@innominate.com>
15 #include <linux/dma-mapping.h>
104 #define MSGSTAT_MBINT 0x00100000 /* Mailbox interrupt */
105 #define MSGSTAT_IFINT 0x00200000 /* InFifo interrupt */
106 #define MSGSTAT_OFINT 0x00400000 /* OutFifo interrupt */
107 #define MSGSTAT_WFINT 0x00800000 /* WatchFifo interrupt */
118 #define NPE_A_FIRMWARE "NPE-A"
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/xscale/
Dixp4xx_eth.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * NPE 0 (NPE-A) 1 (NPE-B) 2 (NPE-C)
13 * RX-free queue 26 27 28
14 * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
17 * bits 0 -> 1 - NPE ID (RX and TX-done)
18 * bits 0 -> 2 - priority (TX, per 802.1D)
19 * bits 3 -> 4 - port ID (user-set?)
20 * bits 5 -> 31 - physical descriptor address
24 #include <linux/dma-mapping.h>
65 #define MAX_CLOSE_WAIT 1000 /* microseconds, typically 2-3 cycles */
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