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/kernel/linux/linux-5.10/drivers/usb/host/
Dxhci-mtk.c1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek xHCI Host Controller Driver
11 #include <linux/dma-mapping.h>
22 #include "xhci.h"
23 #include "xhci-mtk.h"
76 static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk) in xhci_mtk_host_enable() argument
78 struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs; in xhci_mtk_host_enable()
84 if (!mtk->has_ippc) in xhci_mtk_host_enable()
88 value = readl(&ippc->ip_pw_ctr1); in xhci_mtk_host_enable()
90 writel(value, &ippc->ip_pw_ctr1); in xhci_mtk_host_enable()
[all …]
Dxhci-mtk-sch.c1 // SPDX-License-Identifier: GPL-2.0
13 #include "xhci.h"
14 #include "xhci-mtk.h"
18 /* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */
35 /* mtk scheduler bitmasks */
46 return "Can't schedule Start-Split in Y6"; in sch_error_string()
48 return "Can't find a suitable Start-Split location"; in sch_error_string()
50 return "The last Complete-Split is greater than 7"; in sch_error_string()
72 * @real_port value is defined as follow according to xHCI spec:
75 * SSport0-OUT, SSport0-IN, ..., SSportX-OUT, SSportX-IN, HSport0, ..., HSportY
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 # tell define_trace.h where to find the xhci trace header
7 CFLAGS_xhci-trace.o := -I$(src)
9 fhci-y := fhci-hcd.o fhci-hub.o fhci-q.o
10 fhci-y += fhci-mem.o fhci-tds.o fhci-sched.o
12 fhci-$(CONFIG_FHCI_DEBUG) += fhci-dbg.o
14 xhci-hcd-y := xhci.o xhci-mem.o xhci-ext-caps.o
15 xhci-hcd-y += xhci-ring.o xhci-hub.o xhci-dbg.o
16 xhci-hcd-y += xhci-trace.o
19 xhci-hcd-y += xhci-dbgcap.o xhci-dbgtty.o
[all …]
Dxhci-mtk.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include "xhci.h"
52 * @esit: unit is 125us, equal to 2 << Interval field in ep-context
92 * mtk xHCI scheduling information put into reserved DWs
107 * struct mu3c_ippc_regs: MTK ssusb ip port control registers
110 * @ip_xhci_cap: ip xHCI capability register
163 return dev_get_drvdata(hcd->self.controller); in hcd_to_mtk()
167 int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk);
168 void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk);
Dxhci-ring.c1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver
26 * until you reach a non-link TRB.
57 #include <linux/dma-mapping.h>
58 #include "xhci.h"
59 #include "xhci-trace.h"
60 #include "xhci-mtk.h"
71 if (!seg || !trb || trb < seg->trbs) in xhci_trb_virt_to_dma()
74 segment_offset = trb - seg->trbs; in xhci_trb_virt_to_dma()
77 return seg->dma + (segment_offset * sizeof(*trb)); in xhci_trb_virt_to_dma()
[all …]
Dxhci.c1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver
20 #include <linux/dma-mapping.h>
22 #include "xhci.h"
23 #include "xhci-trace.h"
24 #include "xhci-mtk.h"
25 #include "xhci-debugfs.h"
26 #include "xhci-dbgcap.h"
44 struct xhci_segment *seg = ring->first_seg; in td_on_ring()
46 if (!td || !td->start_seg) in td_on_ring()
[all …]
/kernel/linux/linux-6.6/drivers/usb/host/
Dxhci-mtk.c1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek xHCI Host Controller Driver
11 #include <linux/dma-mapping.h>
24 #include "xhci.h"
25 #include "xhci-mtk.h"
61 /* xHCI CSR */
139 static void xhci_mtk_set_frame_interval(struct xhci_hcd_mtk *mtk) in xhci_mtk_set_frame_interval() argument
141 struct device *dev = mtk->dev; in xhci_mtk_set_frame_interval()
142 struct usb_hcd *hcd = mtk->hcd; in xhci_mtk_set_frame_interval()
145 if (!of_device_is_compatible(dev->of_node, "mediatek,mt8195-xhci")) in xhci_mtk_set_frame_interval()
[all …]
Dxhci-mtk-sch.c1 // SPDX-License-Identifier: GPL-2.0
13 #include "xhci.h"
14 #include "xhci-mtk.h"
18 /* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */
32 /* mtk scheduler bitmasks */
43 return "Can't schedule Start-Split in Y6"; in sch_error_string()
45 return "Can't find a suitable Start-Split location"; in sch_error_string()
47 return "The last Complete-Split is greater than 7"; in sch_error_string()
66 struct usb_endpoint_descriptor *epd = &ep->desc; in decode_ep()
82 usb_endpoint_maxp(epd), epd->bInterval, interval, unit); in decode_ep()
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 # tell define_trace.h where to find the xhci trace header
7 CFLAGS_xhci-trace.o := -I$(src)
9 fhci-y := fhci-hcd.o fhci-hub.o fhci-q.o
10 fhci-y += fhci-mem.o fhci-tds.o fhci-sched.o
12 fhci-$(CONFIG_FHCI_DEBUG) += fhci-dbg.o
14 xhci-hcd-y := xhci.o xhci-mem.o xhci-ext-caps.o
15 xhci-hcd-y += xhci-ring.o xhci-hub.o xhci-dbg.o
16 xhci-hcd-y += xhci-trace.o
19 xhci-hcd-y += xhci-dbgcap.o xhci-dbgtty.o
[all …]
Dxhci-mtk.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 #include "xhci.h"
31 #define XHCI_MTK_BW_INDEX(x) ((x) & (XHCI_MTK_MAX_ESIT - 1))
57 * @esit: unit is 125us, equal to 2 << Interval field in ep-context
103 * mtk xHCI scheduling information put into reserved DWs
117 * struct mu3c_ippc_regs: MTK ssusb ip port control registers
120 * @ip_xhci_cap: ip xHCI capability register
169 return dev_get_drvdata(hcd->self.controller); in hcd_to_mtk()
172 int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk);
173 void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk);
Dxhci-ring.c1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver
26 * until you reach a non-link TRB.
57 #include <linux/dma-mapping.h>
58 #include "xhci.h"
59 #include "xhci-trace.h"
61 static int queue_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
74 if (!seg || !trb || trb < seg->trbs) in xhci_trb_virt_to_dma()
77 segment_offset = trb - seg->trbs; in xhci_trb_virt_to_dma()
80 return seg->dma + (segment_offset * sizeof(*trb)); in xhci_trb_virt_to_dma()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dmediatek,mtk-xhci.txt1 MT8173 xHCI
5 There are two scenarios: the first one only supports xHCI driver;
6 the second one supports dual-role mode, and the host is based on xHCI
10 1st: only supports xHCI driver
11 ------------------------------------------------------------------------
14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
18 - "mediatek,mt8173-xhci"
19 - reg : specifies physical base address and size of the registers
[all …]
Dmediatek,mtu3.txt4 - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
5 soc-model is the name of SoC, such as mt8173, mt2712 etc,
8 - "mediatek,mt8173-mtu3"
9 - reg : specifies physical base address and size of the registers
10 - reg-names: should be "mac" for device IP and "ippc" for IP port control
11 - interrupts : interrupt used by the device IP
12 - power-domains : a phandle to USB power domain node to control USB's
14 - vusb33-supply : regulator of USB avdd3.3v
15 - clocks : a list of phandle + clock-specifier pairs, one for each
16 entry in clock-names
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek USB3 xHCI
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
18 case 1: only supports xHCI driver;
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
[all …]
Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
18 based on xHCI.
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
[all …]
/kernel/linux/linux-5.10/drivers/staging/mt7621-dts/
Dmt7621.dtsi1 #include <dt-bindings/interrupt-controller/mips-gic.h>
2 #include <dt-bindings/gpio/gpio.h>
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "mediatek,mt7621-soc";
20 #address-cells = <0>;
21 #interrupt-cells = <1>;
22 interrupt-controller;
23 compatible = "mti,cpu-interrupt-controller";
31 #clock-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/
Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
[all …]
Dmt7623.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/mt2701-clk.h>
13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h>
14 #include <dt-bindings/power/mt2701-power.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
17 #include <dt-bindings/reset/mt2701-resets.h>
[all …]
Dmt7629.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/mt7629-clk.h>
11 #include <dt-bindings/power/mt7622-power.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/reset/mt7629-resets.h>
18 interrupt-parent = <&sysirq>;
19 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt2712-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/memory/mt2712-larb-port.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt2712-power.h>
14 #include "mt2712-pinfunc.h"
18 interrupt-parent = <&sysirq>;
19 #address-cells = <2>;
[all …]
Dmt7622.dtsi6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/mt7622-clk.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt7622-power.h>
14 #include <dt-bindings/reset/mt7622-reset.h>
15 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
[all …]
Dmt7629.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/mt7629-clk.h>
11 #include <dt-bindings/power/mt7622-power.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/reset/mt7629-resets.h>
18 interrupt-parent = <&sysirq>;
19 #address-cells = <1>;
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/ralink/
Dmt7621.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 #include <dt-bindings/interrupt-controller/mips-gic.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/clock/mt7621-clk.h>
5 #include <dt-bindings/reset/mt7621-reset.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 compatible = "mediatek,mt7621-soc";
13 #address-cells = <1>;
14 #size-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt2712-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/memory/mt2712-larb-port.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt2712-power.h>
14 #include "mt2712-pinfunc.h"
18 interrupt-parent = <&sysirq>;
19 #address-cells = <2>;
[all …]

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