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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dralink,rt3883-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt3883-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
20 const: ralink,rt3883-pinctrl
23 '-pins$':
28 '^(.*-)?pinmux$':
31 $ref: pinmux-node.yaml#
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/kernel/linux/linux-6.6/drivers/pinctrl/mediatek/
Dpinctrl-rt3883.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "pinctrl-mtmips.h"
59 FUNC("pci-dev", 0, 40, 32),
60 FUNC("pci-host2", 1, 40, 32),
61 FUNC("pci-host1", 2, 40, 32),
62 FUNC("pci-fnc", 3, 40, 32)
77 GRP("pci", pci_grp, RT3883_GPIO_MODE_PCI_MASK,
90 { .compatible = "ralink,rt3883-pinctrl" },
91 { .compatible = "ralink,rt2880-pinmux" },
99 .name = "rt3883-pinctrl",
/kernel/linux/linux-5.10/arch/mips/ralink/
Drt3883.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
15 #include <asm/mach-ralink/ralink_regs.h>
16 #include <asm/mach-ralink/rt3883.h>
17 #include <asm/mach-ralink/pinmux.h>
38 FUNC("pci-dev", 0, 40, 32),
39 FUNC("pci-host2", 1, 40, 32),
40 FUNC("pci-host1", 2, 40, 32),
41 FUNC("pci-fnc", 3, 40, 32)
56 GRP("pci", pci_func, RT3883_GPIO_MODE_PCI_MASK,
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/kernel/linux/linux-6.6/drivers/pci/controller/
Dpci-ftpci100.c1 // SPDX-License-Identifier: GPL-2.0
3 * Support for Faraday Technology FTPC100 PCI Controller
7 * Based on the out-of-tree OpenWRT patch for Cortina Gemini:
10 * Based on SL2312 PCI controller code
21 #include <linux/pci.h>
30 #include "../pci.h"
38 #define FTPCI_CTRL 0x08 /* PCI control signal */
40 #define FTPCI_CONFIG 0x28 /* PCI configuration command register */
79 * Bit 31..20 defines the PCI side memory base
106 * struct faraday_pci_variant - encodes IP block differences
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Dpci-v3-semi.c1 // SPDX-License-Identifier: GPL-2.0
3 * Support for V3 Semiconductor PCI Local Bus to PCI Bridge
6 * Based on the code from arch/arm/mach-integrator/pci_v3.c
8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
25 #include <linux/pci.h>
34 #include "../pci.h"
89 /* PCI STATUS bits */
105 /* PCI COMMAND bits */
118 /* PCI CFG bits */
134 /* PCI BASE bits (PCI -> Local Bus) */
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/kernel/linux/linux-5.10/drivers/pci/controller/
Dpci-ftpci100.c1 // SPDX-License-Identifier: GPL-2.0
3 * Support for Faraday Technology FTPC100 PCI Controller
7 * Based on the out-of-tree OpenWRT patch for Cortina Gemini:
10 * Based on SL2312 PCI controller code
22 #include <linux/pci.h>
31 #include "../pci.h"
39 #define FTPCI_CTRL 0x08 /* PCI control signal */
41 #define FTPCI_CONFIG 0x28 /* PCI configuration command register */
80 * Bit 31..20 defines the PCI side memory base
106 /* Defines for PCI configuration command register */
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Dpci-v3-semi.c1 // SPDX-License-Identifier: GPL-2.0
3 * Support for V3 Semiconductor PCI Local Bus to PCI Bridge
6 * Based on the code from arch/arm/mach-integrator/pci_v3.c
8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
27 #include <linux/pci.h>
36 #include "../pci.h"
91 /* PCI STATUS bits */
107 /* PCI COMMAND bits */
120 /* PCI CFG bits */
136 /* PCI BASE bits (PCI -> Local Bus) */
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/kernel/linux/linux-6.6/drivers/watchdog/
Dibmasr.c1 // SPDX-License-Identifier: GPL-1.0+
8 * Copyright (c) IBM Corporation, 1998-2004.
17 #include <linux/pci.h>
154 /* SELECT AND READ THE HIGH-NIBBLE OF THE GPIO BASE ADDRESS */ in asr_get_base_address()
158 /* SELECT AND READ THE LOW-NIBBLE OF THE GPIO BASE ADDRESS */ in asr_get_base_address()
176 return -ENODEV; in asr_get_base_address()
186 /* Select the SuperIO chip in the PCI I/O port register */ in asr_get_base_address()
189 /* BUS 0, Slot 1F, fnc 0, offset 58 */ in asr_get_base_address()
237 return -EBUSY; in asr_get_base_address()
259 return -EFAULT; in asr_write()
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/kernel/linux/linux-5.10/drivers/watchdog/
Dibmasr.c7 * Copyright (c) IBM Corporation, 1998-2004.
18 #include <linux/pci.h>
155 /* SELECT AND READ THE HIGH-NIBBLE OF THE GPIO BASE ADDRESS */ in asr_get_base_address()
159 /* SELECT AND READ THE LOW-NIBBLE OF THE GPIO BASE ADDRESS */ in asr_get_base_address()
177 return -ENODEV; in asr_get_base_address()
187 /* Select the SuperIO chip in the PCI I/O port register */ in asr_get_base_address()
190 /* BUS 0, Slot 1F, fnc 0, offset 58 */ in asr_get_base_address()
238 return -EBUSY; in asr_get_base_address()
260 return -EFAULT; in asr_write()
283 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; in asr_ioctl()
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/kernel/linux/linux-5.10/drivers/pci/hotplug/
Dibmphp_res.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
18 #include <linux/pci.h>
49 newbus->busno = busno; in alloc_error_bus()
51 newbus->busno = curr->bus_num; in alloc_error_bus()
52 list_add_tail(&newbus->bus_list, &gbuses); in alloc_error_bus()
69 rs->busno = curr->bus_num; in alloc_resources()
70 rs->devfunc = curr->dev_fun; in alloc_resources()
71 rs->start = curr->start_addr; in alloc_resources()
72 rs->end = curr->end_addr; in alloc_resources()
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/kernel/linux/linux-6.6/drivers/pci/hotplug/
Dibmphp_res.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
18 #include <linux/pci.h>
49 newbus->busno = busno; in alloc_error_bus()
51 newbus->busno = curr->bus_num; in alloc_error_bus()
52 list_add_tail(&newbus->bus_list, &gbuses); in alloc_error_bus()
69 rs->busno = curr->bus_num; in alloc_resources()
70 rs->devfunc = curr->dev_fun; in alloc_resources()
71 rs->start = curr->start_addr; in alloc_resources()
72 rs->end = curr->end_addr; in alloc_resources()
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