Home
last modified time | relevance | path

Searched +full:sdm845 +full:- +full:pdc (Results 1 – 25 of 31) sorted by relevance

12

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/
Dqcom,pdc-global.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PDC Global
10 - Sibi Sankar <quic_sibis@quicinc.com>
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
19 - description: on SC7180 SoCs the following compatibles must be specified
21 - const: "qcom,sc7180-pdc-global"
22 - const: "qcom,sdm845-pdc-global"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/
Dqcom,pdc-global.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PDC Global
10 - Sibi Sankar <sibis@codeaurora.org>
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
19 - description: on SC7180 SoCs the following compatibles must be specified
21 - const: "qcom,sc7180-pdc-global"
22 - const: "qcom,sdm845-pdc-global"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dqcom,pdc.txt1 PDC interrupt controller
4 Power Domain Controller (PDC) that is on always-on domain. In addition to
7 well detect interrupts when the GIC is non-operational.
10 controller PDC is next in hierarchy, followed by others. Drivers requiring
11 wakeup capabilities of their device interrupts routed through the PDC, must
12 specify PDC as their interrupt controller and request the PDC port associated
17 - compatible:
20 Definition: Should contain "qcom,<soc>-pdc" and "qcom,pdc"
21 - "qcom,sc7180-pdc": For SC7180
22 - "qcom,sdm845-pdc": For SDM845
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dqcom,pdc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PDC interrupt controller
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 Power Domain Controller (PDC) that is on always-on domain. In addition to
17 well detect interrupts when the GIC is non-operational.
20 controller PDC is next in hierarchy, followed by others. Drivers requiring
21 wakeup capabilities of their device interrupts routed through the PDC, must
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/
Dqcom,sdm845-adsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdm845-adsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDM845 ADSP Peripheral Image Loader
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - qcom,sdm845-adsp-pil
28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
[all …]
Dqcom,msm8996-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Sibi Sankar <quic_sibis@quicinc.com>
20 - qcom,msm8996-mss-pil
21 - qcom,msm8998-mss-pil
22 - qcom,sdm660-mss-pil
23 - qcom,sdm845-mss-pil
[all …]
Dqcom,sc7280-adsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,sc7280-adsp-pil
23 - description: qdsp6ss register
24 - description: efuse q6ss register
28 - description: Phandle to apps_smmu node with sid mask
32 - description: Watchdog interrupt
[all …]
Dqcom,sc7280-wpss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - qcom,sc7280-wpss-pil
28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
31 - description: Handover interrupt
[all …]
Dqcom,sc7180-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7180-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
[all …]
Dqcom,sc7280-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7280-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
[all …]
/kernel/linux/linux-5.10/drivers/reset/
Dreset-qcom-pdc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/reset-controller.h>
12 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
26 .name = "pdc-reset",
58 return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET, in qcom_pdc_control_assert()
68 return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET, in qcom_pdc_control_deassert()
80 struct device *dev = &pdev->dev; in qcom_pdc_reset_probe()
86 return -ENOMEM; in qcom_pdc_reset_probe()
93 data->regmap = devm_regmap_init_mmio(dev, base, in qcom_pdc_reset_probe()
95 if (IS_ERR(data->regmap)) { in qcom_pdc_reset_probe()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 via GPIOs or SoC-internal reset controller modules.
133 for Qualcomm SDM845 SoCs. Say Y if you want to control
138 tristate "Qualcomm PDC Reset Driver"
141 This enables the PDC (Power Domain Controller) reset driver
142 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
143 to control reset signals provided by PDC for Modem, Compute,
151 Raspberry Pi 4's co-processor controls some of the board's HW
154 interfacing with RPi4's co-processor and model these firmware
177 - Altera SoCFPGAs
[all …]
/kernel/linux/linux-6.6/drivers/reset/
Dreset-qcom-pdc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/reset-controller.h>
12 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
34 .name = "pdc-reset",
92 u32 mask = BIT(data->desc->resets[idx].bit); in qcom_pdc_control_assert()
94 return regmap_update_bits(data->regmap, data->desc->offset, mask, mask); in qcom_pdc_control_assert()
101 u32 mask = BIT(data->desc->resets[idx].bit); in qcom_pdc_control_deassert()
103 return regmap_update_bits(data->regmap, data->desc->offset, mask, 0); in qcom_pdc_control_deassert()
115 struct device *dev = &pdev->dev; in qcom_pdc_reset_probe()
119 desc = device_get_match_data(&pdev->dev); in qcom_pdc_reset_probe()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 via GPIOs or SoC-internal reset controller modules.
101 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
172 for Qualcomm SDM845 SoCs. Say Y if you want to control
177 tristate "Qualcomm PDC Reset Driver"
180 This enables the PDC (Power Domain Controller) reset driver
181 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
182 to control reset signals provided by PDC for Modem, Compute,
190 Raspberry Pi 4's co-processor controls some of the board's HW
193 interfacing with RPi4's co-processor and model these firmware
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/
Dgmu.yaml1 # SPDX-License-Identifier: GPL-2.0-only
2 # Copyright 2019-2020, The Linux Foundation, All Rights Reserved
4 ---
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Rob Clark <robdclark@gmail.com>
16 to members of the Adreno A6xx GPU family. The GMU provides on-device power
23 - items:
24 - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$'
25 - const: qcom,adreno-gmu
26 - const: qcom,adreno-gmu-wrapper
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Dgmu.yaml1 # SPDX-License-Identifier: GPL-2.0-only
2 # Copyright 2019-2020, The Linux Foundation, All Rights Reserved
4 ---
7 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
12 - Rob Clark <robdclark@gmail.com>
16 to members of the Adreno A6xx GPU family. The GMU provides on-device power
23 - enum:
24 - qcom,adreno-gmu-630.2
25 - const: qcom,adreno-gmu
29 - description: Core GMU registers
[all …]
/kernel/linux/linux-6.6/drivers/remoteproc/
Dqcom_q6v5_adsp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Qualcomm Technology Inc. ADSP Peripheral Image Loader for SDM845.
126 struct device **devs = adsp->proxy_pds; in qcom_rproc_pds_attach()
135 if (dev->pm_domain) { in qcom_rproc_pds_attach()
144 if (num_pds > ARRAY_SIZE(adsp->proxy_pds)) in qcom_rproc_pds_attach()
145 return -E2BIG; in qcom_rproc_pds_attach()
150 ret = PTR_ERR(devs[i]) ? : -ENODATA; in qcom_rproc_pds_attach()
158 for (i--; i >= 0; i--) in qcom_rproc_pds_attach()
167 struct device *dev = adsp->dev; in qcom_rproc_pds_detach()
171 if (dev->pm_domain && pd_count) { in qcom_rproc_pds_detach()
[all …]
/kernel/linux/linux-5.10/drivers/remoteproc/
Dqcom_q6v5_adsp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Qualcomm Technology Inc. ADSP Peripheral Image Loader for SDM845.
108 val = readl(adsp->qdsp6ss_base + RET_CFG_REG); in qcom_adsp_shutdown()
110 writel(val, adsp->qdsp6ss_base + RET_CFG_REG); in qcom_adsp_shutdown()
112 clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks); in qcom_adsp_shutdown()
115 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
116 adsp->halt_lpass + LPASS_PWR_ON_REG, &val); in qcom_adsp_shutdown()
120 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
121 adsp->halt_lpass + LPASS_MASTER_IDLE_REG, in qcom_adsp_shutdown()
126 regmap_write(adsp->halt_map, in qcom_adsp_shutdown()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM670 SoC device tree source, adapted from SDM845 SoC device tree
9 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,osm-l3.h>
14 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/phy/phy-qcom-qusb2.h>
[all …]
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 SoC device tree source
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
[all …]
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
Dsm6350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 SoC device tree source
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]

12