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4 and thus inherits all the common properties defined in designware-pcie.txt.7 - compatible:8 - "fsl,imx6q-pcie"9 - "fsl,imx6sx-pcie",10 - "fsl,imx6qp-pcie"11 - "fsl,imx7d-pcie"12 - "fsl,imx8mq-pcie"13 - reg: base address and length of the PCIe controller14 - interrupts: A list of interrupt outputs of the controller. Must contain an15 entry for each entry in the interrupt-names property.[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Lucas Stach <l.stach@pengutronix.de>11 - Richard Zhu <hongxing.zhu@nxp.com>19 minItems: 322 clock-names:23 minItems: 326 num-lanes:[all …]
1 // SPDX-License-Identifier: GPL-2.017 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>35 #include "pcie-designware.h"43 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)96 /* PCIe Port Logic registers (memory-mapped) */109 /* PHY registers (not memory-mapped) */135 #define PCIE_PHY_CMN_REG24_RX_EQ_SEL BIT(3)142 #define PHY_RX_OVRD_IN_LO_RX_PLL_EN BIT(3)146 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_poll_ack()[all …]
1 // SPDX-License-Identifier: GPL-2.017 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>36 #include "pcie-designware.h"45 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)109 /* PCIe Port Logic registers (memory-mapped) */122 /* PHY registers (not memory-mapped) */148 #define PCIE_PHY_CMN_REG24_RX_EQ_SEL BIT(3)155 #define PHY_RX_OVRD_IN_LO_RX_PLL_EN BIT(3)159 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && in imx6_pcie_grp_offset()[all …]