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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/
Dxlnx,zynqmp-ipi-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/xlnx,zynqmp-ipi-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx IPI(Inter Processor Interrupt) mailbox controller
10 The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
11 messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI
14 +-------------------------------------+
15 | Xilinx ZynqMP IPI Controller |
16 +-------------------------------------+
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/kernel/linux/linux-6.6/drivers/mailbox/
Dzynqmp-ipi-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx Inter Processor Interrupt(IPI) Mailbox Driver
8 #include <linux/arm-smccc.h>
15 #include <linux/mailbox/zynqmp-ipi-message.h>
21 /* IPI agent ID any */
24 /* indicate if ZynqMP IPI mailbox driver uses SMC calls or HVC calls */
28 /* Default IPI SMC function IDs */
37 /* IPI SMC Macros */
47 /* IPI mailbox status */
52 #define IPI_MB_CHNL_TX 0 /* IPI mailbox TX channel */
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menuconfig MAILBOX config
3 bool "Mailbox Hardware Support"
5 Mailbox is a framework to control hardware communication between
6 on-chip processors through queued messages and interrupt driven
9 if MAILBOX
12 tristate "Apple Mailbox driver"
16 Apple SoCs have various co-processors required for certain
18 driver adds support for the mailbox controller used to
24 tristate "ARM MHU Mailbox"
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # Generic MAILBOX API
4 obj-$(CONFIG_MAILBOX) += mailbox.o
6 obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
8 obj-$(CONFIG_ARM_MHU) += arm_mhu.o arm_mhu_db.o
10 obj-$(CONFIG_ARM_MHU_V2) += arm_mhuv2.o
12 obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
14 obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o
16 obj-$(CONFIG_PLATFORM_MHU) += platform_mhu.o
18 obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
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/kernel/linux/linux-5.10/drivers/mailbox/
Dzynqmp-ipi-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx Inter Processor Interrupt(IPI) Mailbox Driver
8 #include <linux/arm-smccc.h>
15 #include <linux/mailbox/zynqmp-ipi-message.h>
23 /* IPI agent ID any */
26 /* indicate if ZynqMP IPI mailbox driver uses SMC calls or HVC calls */
30 /* Default IPI SMC function IDs */
39 /* IPI SMC Macros */
49 /* IPI mailbox status */
54 #define IPI_MB_CHNL_TX 0 /* IPI mailbox TX channel */
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menuconfig MAILBOX config
3 bool "Mailbox Hardware Support"
5 Mailbox is a framework to control hardware communication between
6 on-chip processors through queued messages and interrupt driven
9 if MAILBOX
12 tristate "ARM MHU Mailbox"
16 The controller has 3 mailbox channels, the last of which can be
20 tristate "i.MX Mailbox"
23 Mailbox implementation for i.MX Messaging Unit (MU).
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # Generic MAILBOX API
4 obj-$(CONFIG_MAILBOX) += mailbox.o
6 obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
8 obj-$(CONFIG_ARM_MHU) += arm_mhu.o arm_mhu_db.o
10 obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
12 obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o
14 obj-$(CONFIG_PLATFORM_MHU) += platform_mhu.o
16 obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
18 obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/reset/
Dxlnx,zynqmp-power.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/xlnx,zynqmp-power.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michal Simek <michal.simek@amd.com>
13 The zynqmp-power node describes the power management configurations.
18 const: xlnx,zynqmp-power
25 Standard property to specify a Mailbox. Each value of
27 mailbox controller device node and an args specifier
28 that will be the phandle to the intended sub-mailbox
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/reset/
Dxlnx,zynqmp-power.txt1 --------------------------------------------------------------------
3 --------------------------------------------------------------------
4 The zynqmp-power node describes the power management configurations.
8 - compatible: Must contain: "xlnx,zynqmp-power"
9 - interrupts: Interrupt specifier
12 - mbox-names : Name given to channels seen in the 'mboxes' property.
13 "tx" - Mailbox corresponding to transmit path
14 "rx" - Mailbox corresponding to receive path
15 - mboxes : Standard property to specify a Mailbox. Each value of
17 mailbox controller device node and an args specifier
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dxlnx,zynqmp-ipi-mailbox.txt1 Xilinx IPI Mailbox Controller
4 The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
5 messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI
8 +-------------------------------------+
9 | Xilinx ZynqMP IPI Controller |
10 +-------------------------------------+
11 +--------------------------------------------------+
15 +--------------------------+ |
18 +--------------------------------------------------+
19 +------------------------------------------+
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/kernel/linux/linux-6.6/drivers/remoteproc/
Dxlnx_r5_remoteproc.c1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP R5 Remote Processor driver
7 #include <dt-bindings/power/xlnx-zynqmp-power.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/firmware/xlnx-zynqmp.h>
12 #include <linux/mailbox/zynqmp-ipi-message.h>
22 /* IPI buffer MAX length */
25 /* RX mailbox client buffer max length */
30 * reflects possible values of xlnx,cluster-mode dt-property
34 LOCKSTEP_MODE = 1, /* cores execute same code in lockstep,clk-for-clk */
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/kernel/linux/linux-6.6/drivers/soc/xilinx/
Dzynqmp_power.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2019 Xilinx, Inc.
19 #include <linux/firmware/xlnx-zynqmp.h>
20 #include <linux/firmware/xlnx-event-manager.h>
21 #include <linux/mailbox/zynqmp-ipi-message.h>
24 * struct zynqmp_pm_work_struct - Wrapper for struct work_struct
47 [PM_SUSPEND_MODE_POWER_OFF] = "power-off",
60 if (work_pending(&zynqmp_pm_init_suspend_work->callback_work)) in suspend_event_callback()
64 memcpy(zynqmp_pm_init_suspend_work->args, &payload[1], in suspend_event_callback()
65 sizeof(zynqmp_pm_init_suspend_work->args)); in suspend_event_callback()
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/kernel/linux/linux-5.10/drivers/soc/xilinx/
Dzynqmp_power.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2019 Xilinx, Inc.
18 #include <linux/firmware/xlnx-zynqmp.h>
19 #include <linux/mailbox/zynqmp-ipi-message.h>
22 * struct zynqmp_pm_work_struct - Wrapper for struct work_struct
44 [PM_SUSPEND_MODE_POWER_OFF] = "power-off",
90 memcpy(payload, msg->data, sizeof(msg->len)); in ipi_receive_callback()
93 if (work_pending(&zynqmp_pm_init_suspend_work->callback_work)) in ipi_receive_callback()
97 memcpy(zynqmp_pm_init_suspend_work->args, &payload[1], in ipi_receive_callback()
98 sizeof(zynqmp_pm_init_suspend_work->args)); in ipi_receive_callback()
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
23 compatible = "xlnx,zynqmp";
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