284     unsigned long flags;  member
333     unsigned long flags;  member
355 #define clk_hw_register_fixed_rate(dev, name, parent_name, flags, fixed_rate)                      …  argument
366 #define clk_hw_register_fixed_rate_parent_hw(dev, name, parent_hw, flags, fixed_rate)              …  argument
377 #define clk_hw_register_fixed_rate_parent_data(dev, name, parent_hw, flags, fixed_rate)            …  argument
389 #define clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name, flags, fixed_rate, fixed_a…  argument
402 #define clk_hw_register_fixed_rate_with_accuracy_parent_hw(dev, name, parent_hw, flags, fixed_rate,…  argument
415 #define clk_hw_register_fixed_rate_with_accuracy_parent_data(dev, name, parent_data, flags, fixed_r…  argument
452     u8 flags;  member
480 #define clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx, clk_gate_flags, lock)    …  argument
495 #define clk_hw_register_gate_parent_hw(dev, name, parent_hw, flags, reg, bit_idx, clk_gate_flags, l…  argument
510 #define clk_hw_register_gate_parent_data(dev, name, parent_data, flags, reg, bit_idx, clk_gate_flag…  argument
567     u8 flags;  member
617 #define clk_register_divider(dev, name, parent_name, flags, reg, shift, width, clk_divider_flags, l…  argument
632 #define clk_hw_register_divider(dev, name, parent_name, flags, reg, shift, width, clk_divider_flags…  argument
648 #define clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags, reg, shift, width, clk_divid…  argument
664 #define clk_hw_register_divider_parent_data(dev, name, parent_data, flags, reg, shift, width, clk_d…  argument
681 #define clk_hw_register_divider_table(dev, name, parent_name, flags, reg, shift, width, clk_divider…  argument
699 #define clk_hw_register_divider_table_parent_hw(dev, name, parent_hw, flags, reg, shift, width, clk…  argument
717 #define clk_hw_register_divider_table_parent_data(dev, name, parent_data, flags, reg, shift, width,…  argument
760     u8 flags;  member
784 #define clk_register_mux(dev, name, parent_names, num_parents, flags, reg, shift, width, clk_mux_fl…  argument
787 #define clk_hw_register_mux_table(dev, name, parent_names, num_parents, flags, reg, shift, mask, cl…  argument
791 #define clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, shift, width, clk_mux…  argument
794 #define clk_hw_register_mux_hws(dev, name, parent_hws, num_parents, flags, reg, shift, width, clk_m…  argument
797 #define clk_hw_register_mux_parent_data(dev, name, parent_data, num_parents, flags, reg, shift, wid…  argument
871     u8 flags;  member
922     u8 flags;  member
1039 …                                  const struct clk_div_table *table, u8 width, unsigned long flags)  in divider_round_rate()
1045 …                                  const struct clk_div_table *table, u8 width, unsigned long flags,  in divider_ro_round_rate()
1252 static inline int of_clk_detect_critical(struct device_node *np, int index, unsigned long *flags)  in of_clk_detect_critical()