Lines Matching +full:entry +full:- +full:address

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  *  linux/arch/arm/mm/cache-fa.S
6  *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
8  * Based on cache-v4wb.S:
9  *  Copyright (C) 1997-2002 Russell king
19 #include "proc-macros.S"
43 ENTRY(fa_flush_icache_all)
52  *	Clean and invalidate all cache entries in a particular address
55 ENTRY(fa_flush_user_cache_all)
62 ENTRY(fa_flush_kern_cache_all)
78  *	address space.
80  *	- start - start address (inclusive, page aligned)
81  *	- end	- end address (exclusive, page aligned)
82  *	- flags	- vma_area_struct flags describing address space
84 ENTRY(fa_flush_user_cache_range)
92 	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D entry
106  *	region described by start.  If you have non-snooping
109  *	- start  - virtual start address
110  *	- end	 - virtual end address
112 ENTRY(fa_coherent_kern_range)
119  *	region described by start.  If you have non-snooping
122  *	- start  - virtual start address
123  *	- end	 - virtual end address
125 ENTRY(fa_coherent_user_range)
126 	bic	r0, r0, #CACHE_DLINESIZE - 1
127 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D entry
128 	mcr	p15, 0, r0, c7, c5, 1		@ invalidate I entry
144  *	- addr	- kernel address
145  *	- size	- size of region
147 ENTRY(fa_flush_kern_dcache_area)
161  *	Invalidate (discard) the specified virtual address range.
166  *	- start  - virtual start address
167  *	- end	 - virtual end address
170 	tst	r0, #CACHE_DLINESIZE - 1
171 	bic	r0, r0, #CACHE_DLINESIZE - 1
172 	mcrne	p15, 0, r0, c7, c14, 1		@ clean & invalidate D entry
173 	tst	r1, #CACHE_DLINESIZE - 1
174 	bic	r1, r1, #CACHE_DLINESIZE - 1
175 	mcrne	p15, 0, r1, c7, c14, 1		@ clean & invalidate D entry
176 1:	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
187  *	Clean (write back) the specified virtual address range.
189  *	- start  - virtual start address
190  *	- end	 - virtual end address
193 	bic	r0, r0, #CACHE_DLINESIZE - 1
194 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
204  *	- start   - virtual start address of region
205  *	- end     - virtual end address of region
207 ENTRY(fa_dma_flush_range)
208 	bic	r0, r0, #CACHE_DLINESIZE - 1
209 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean & invalidate D entry
219  *	- start	- kernel virtual start address
220  *	- size	- size of region
221  *	- dir	- DMA direction
223 ENTRY(fa_dma_map_area)
233  *	- start	- kernel virtual start address
234  *	- size	- size of region
235  *	- dir	- DMA direction
237 ENTRY(fa_dma_unmap_area)
246 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)