Lines Matching full:tdma
189 struct tegra_dma *tdma; member
231 static inline void tdma_write(struct tegra_dma *tdma, u32 reg, u32 val) in tdma_write() argument
233 writel(val, tdma->base_addr + reg); in tdma_write()
236 static inline u32 tdma_read(struct tegra_dma *tdma, u32 reg) in tdma_read() argument
238 return readl(tdma->base_addr + reg); in tdma_read()
360 struct tegra_dma *tdma = tdc->tdma; in tegra_dma_global_pause() local
362 spin_lock(&tdma->global_lock); in tegra_dma_global_pause()
364 if (tdc->tdma->global_pause_count == 0) { in tegra_dma_global_pause()
365 tdma_write(tdma, TEGRA_APBDMA_GENERAL, 0); in tegra_dma_global_pause()
370 tdc->tdma->global_pause_count++; in tegra_dma_global_pause()
372 spin_unlock(&tdma->global_lock); in tegra_dma_global_pause()
377 struct tegra_dma *tdma = tdc->tdma; in tegra_dma_global_resume() local
379 spin_lock(&tdma->global_lock); in tegra_dma_global_resume()
381 if (WARN_ON(tdc->tdma->global_pause_count == 0)) in tegra_dma_global_resume()
384 if (--tdc->tdma->global_pause_count == 0) in tegra_dma_global_resume()
385 tdma_write(tdma, TEGRA_APBDMA_GENERAL, in tegra_dma_global_resume()
389 spin_unlock(&tdma->global_lock); in tegra_dma_global_resume()
395 struct tegra_dma *tdma = tdc->tdma; in tegra_dma_pause() local
397 if (tdma->chip_data->support_channel_pause) { in tegra_dma_pause()
409 struct tegra_dma *tdma = tdc->tdma; in tegra_dma_resume() local
411 if (tdma->chip_data->support_channel_pause) in tegra_dma_resume()
449 if (tdc->tdma->chip_data->support_separate_wcount_reg) in tegra_dma_start()
490 if (tdc->tdma->chip_data->support_separate_wcount_reg) in tegra_dma_configure_for_next()
569 pm_runtime_put(tdc->tdma->dev); in handle_continuous_head_request()
609 pm_runtime_put(tdc->tdma->dev); in handle_once_dma_done()
726 err = pm_runtime_resume_and_get(tdc->tdma->dev); in tegra_dma_issue_pending()
771 if (tdc->tdma->chip_data->support_separate_wcount_reg) in tegra_dma_terminate_all()
787 pm_runtime_put(tdc->tdma->dev); in tegra_dma_terminate_all()
821 err = pm_runtime_resume_and_get(tdc->tdma->dev); in tegra_dma_synchronize()
836 pm_runtime_put(tdc->tdma->dev); in tegra_dma_synchronize()
847 if (tdc->tdma->chip_data->support_separate_wcount_reg) in tegra_dma_sg_bytes_xferred()
852 if (!tdc->tdma->chip_data->support_separate_wcount_reg) in tegra_dma_sg_bytes_xferred()
1040 if (tdc->tdma->chip_data->support_separate_wcount_reg) in tegra_dma_prep_wcount()
1120 len > tdc->tdma->chip_data->max_dma_count) { in tegra_dma_prep_slave_sg()
1220 len > tdc->tdma->chip_data->max_dma_count) { in tegra_dma_prep_dma_cyclic()
1360 struct tegra_dma *tdma = ofdma->of_dma_data; in tegra_dma_of_xlate() local
1365 dev_err(tdma->dev, "Invalid slave id: %d\n", dma_spec->args[0]); in tegra_dma_of_xlate()
1369 chan = dma_get_any_slave_channel(&tdma->dma_dev); in tegra_dma_of_xlate()
1415 static int tegra_dma_init_hw(struct tegra_dma *tdma) in tegra_dma_init_hw() argument
1419 err = reset_control_assert(tdma->rst); in tegra_dma_init_hw()
1421 dev_err(tdma->dev, "failed to assert reset: %d\n", err); in tegra_dma_init_hw()
1425 err = clk_enable(tdma->dma_clk); in tegra_dma_init_hw()
1427 dev_err(tdma->dev, "failed to enable clk: %d\n", err); in tegra_dma_init_hw()
1433 reset_control_deassert(tdma->rst); in tegra_dma_init_hw()
1436 tdma_write(tdma, TEGRA_APBDMA_GENERAL, TEGRA_APBDMA_GENERAL_ENABLE); in tegra_dma_init_hw()
1437 tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0); in tegra_dma_init_hw()
1438 tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFF); in tegra_dma_init_hw()
1440 clk_disable(tdma->dma_clk); in tegra_dma_init_hw()
1448 struct tegra_dma *tdma; in tegra_dma_probe() local
1454 size = struct_size(tdma, channels, cdata->nr_channels); in tegra_dma_probe()
1456 tdma = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); in tegra_dma_probe()
1457 if (!tdma) in tegra_dma_probe()
1460 tdma->dev = &pdev->dev; in tegra_dma_probe()
1461 tdma->chip_data = cdata; in tegra_dma_probe()
1462 platform_set_drvdata(pdev, tdma); in tegra_dma_probe()
1464 tdma->base_addr = devm_platform_ioremap_resource(pdev, 0); in tegra_dma_probe()
1465 if (IS_ERR(tdma->base_addr)) in tegra_dma_probe()
1466 return PTR_ERR(tdma->base_addr); in tegra_dma_probe()
1468 tdma->dma_clk = devm_clk_get(&pdev->dev, NULL); in tegra_dma_probe()
1469 if (IS_ERR(tdma->dma_clk)) { in tegra_dma_probe()
1471 return PTR_ERR(tdma->dma_clk); in tegra_dma_probe()
1474 tdma->rst = devm_reset_control_get(&pdev->dev, "dma"); in tegra_dma_probe()
1475 if (IS_ERR(tdma->rst)) { in tegra_dma_probe()
1477 return PTR_ERR(tdma->rst); in tegra_dma_probe()
1480 spin_lock_init(&tdma->global_lock); in tegra_dma_probe()
1482 ret = clk_prepare(tdma->dma_clk); in tegra_dma_probe()
1486 ret = tegra_dma_init_hw(tdma); in tegra_dma_probe()
1493 INIT_LIST_HEAD(&tdma->dma_dev.channels); in tegra_dma_probe()
1495 struct tegra_dma_channel *tdc = &tdma->channels[i]; in tegra_dma_probe()
1498 tdc->chan_addr = tdma->base_addr + in tegra_dma_probe()
1518 tdc->dma_chan.device = &tdma->dma_dev; in tegra_dma_probe()
1521 &tdma->dma_dev.channels); in tegra_dma_probe()
1522 tdc->tdma = tdma; in tegra_dma_probe()
1536 dma_cap_set(DMA_SLAVE, tdma->dma_dev.cap_mask); in tegra_dma_probe()
1537 dma_cap_set(DMA_PRIVATE, tdma->dma_dev.cap_mask); in tegra_dma_probe()
1538 dma_cap_set(DMA_CYCLIC, tdma->dma_dev.cap_mask); in tegra_dma_probe()
1540 tdma->global_pause_count = 0; in tegra_dma_probe()
1541 tdma->dma_dev.dev = &pdev->dev; in tegra_dma_probe()
1542 tdma->dma_dev.device_alloc_chan_resources = in tegra_dma_probe()
1544 tdma->dma_dev.device_free_chan_resources = in tegra_dma_probe()
1546 tdma->dma_dev.device_prep_slave_sg = tegra_dma_prep_slave_sg; in tegra_dma_probe()
1547 tdma->dma_dev.device_prep_dma_cyclic = tegra_dma_prep_dma_cyclic; in tegra_dma_probe()
1548 tdma->dma_dev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | in tegra_dma_probe()
1552 tdma->dma_dev.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | in tegra_dma_probe()
1556 tdma->dma_dev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); in tegra_dma_probe()
1557 tdma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; in tegra_dma_probe()
1558 tdma->dma_dev.device_config = tegra_dma_slave_config; in tegra_dma_probe()
1559 tdma->dma_dev.device_terminate_all = tegra_dma_terminate_all; in tegra_dma_probe()
1560 tdma->dma_dev.device_synchronize = tegra_dma_synchronize; in tegra_dma_probe()
1561 tdma->dma_dev.device_tx_status = tegra_dma_tx_status; in tegra_dma_probe()
1562 tdma->dma_dev.device_issue_pending = tegra_dma_issue_pending; in tegra_dma_probe()
1564 ret = dma_async_device_register(&tdma->dma_dev); in tegra_dma_probe()
1572 tegra_dma_of_xlate, tdma); in tegra_dma_probe()
1585 dma_async_device_unregister(&tdma->dma_dev); in tegra_dma_probe()
1591 clk_unprepare(tdma->dma_clk); in tegra_dma_probe()
1598 struct tegra_dma *tdma = platform_get_drvdata(pdev); in tegra_dma_remove() local
1601 dma_async_device_unregister(&tdma->dma_dev); in tegra_dma_remove()
1603 clk_unprepare(tdma->dma_clk); in tegra_dma_remove()
1610 struct tegra_dma *tdma = dev_get_drvdata(dev); in tegra_dma_runtime_suspend() local
1612 clk_disable(tdma->dma_clk); in tegra_dma_runtime_suspend()
1619 struct tegra_dma *tdma = dev_get_drvdata(dev); in tegra_dma_runtime_resume() local
1621 return clk_enable(tdma->dma_clk); in tegra_dma_runtime_resume()
1626 struct tegra_dma *tdma = dev_get_drvdata(dev); in tegra_dma_dev_suspend() local
1631 for (i = 0; i < tdma->chip_data->nr_channels; i++) { in tegra_dma_dev_suspend()
1632 struct tegra_dma_channel *tdc = &tdma->channels[i]; in tegra_dma_dev_suspend()
1641 dev_err(tdma->dev, "channel %u busy\n", i); in tegra_dma_dev_suspend()
1651 struct tegra_dma *tdma = dev_get_drvdata(dev); in tegra_dma_dev_resume() local
1654 err = tegra_dma_init_hw(tdma); in tegra_dma_dev_resume()