Lines Matching +full:unimac +full:- +full:mdio
1 // SPDX-License-Identifier: GPL-2.0-or-later
41 for (port = 0; port < ds->num_ports; port++) { in bcm_sf2_num_active_ports()
44 if (priv->port_sts[port].enabled) in bcm_sf2_num_active_ports()
65 if (ports_active == 0 || !priv->clk_mdiv) in bcm_sf2_recalc_clock()
74 new_rate = rate_table[ports_active - 1]; in bcm_sf2_recalc_clock()
75 clk_set_rate(priv->clk_mdiv, new_rate); in bcm_sf2_recalc_clock()
108 if (priv->type == BCM7445_DEVICE_ID) in bcm_sf2_imp_setup()
130 priv->port_sts[port].enabled = true; in bcm_sf2_imp_setup()
154 /* Use PHY-driven LED signaling */ in bcm_sf2_gphy_enable_set()
216 priv->port_sts[port].enabled = true; in bcm_sf2_port_setup()
226 if (priv->brcm_tag_mask & BIT(port)) in bcm_sf2_port_setup()
237 /* Re-enable the GPHY and re-apply workarounds */ in bcm_sf2_port_setup()
238 if (priv->int_phy_mask & 1 << port && priv->hw_params.num_gphy == 1) { in bcm_sf2_port_setup()
250 phy->state = PHY_READY; in bcm_sf2_port_setup()
256 if (port == priv->moca_port) in bcm_sf2_port_setup()
259 /* Set per-queue pause threshold to 32 */ in bcm_sf2_port_setup()
281 if (priv->wol_ports_mask & (1 << port)) { in bcm_sf2_port_disable()
288 if (port == priv->moca_port) in bcm_sf2_port_disable()
291 if (priv->int_phy_mask & 1 << port && priv->hw_params.num_gphy == 1) in bcm_sf2_port_disable()
301 priv->port_sts[port].enabled = false; in bcm_sf2_port_disable()
340 struct bcm_sf2_priv *priv = bus->priv; in bcm_sf2_sw_mdio_read()
342 /* Intercept reads from Broadcom pseudo-PHY address, else, send in bcm_sf2_sw_mdio_read()
343 * them to our master MDIO bus controller in bcm_sf2_sw_mdio_read()
345 if (addr == BRCM_PSEUDO_PHY_ADDR && priv->indir_phy_mask & BIT(addr)) in bcm_sf2_sw_mdio_read()
348 return mdiobus_read_nested(priv->master_mii_bus, addr, regnum); in bcm_sf2_sw_mdio_read()
354 struct bcm_sf2_priv *priv = bus->priv; in bcm_sf2_sw_mdio_write()
356 /* Intercept writes to the Broadcom pseudo-PHY address, else, in bcm_sf2_sw_mdio_write()
357 * send them to our master MDIO bus controller in bcm_sf2_sw_mdio_write()
359 if (addr == BRCM_PSEUDO_PHY_ADDR && priv->indir_phy_mask & BIT(addr)) in bcm_sf2_sw_mdio_write()
362 return mdiobus_write_nested(priv->master_mii_bus, addr, in bcm_sf2_sw_mdio_write()
371 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) & in bcm_sf2_switch_0_isr()
372 ~priv->irq0_mask; in bcm_sf2_switch_0_isr()
373 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); in bcm_sf2_switch_0_isr()
383 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) & in bcm_sf2_switch_1_isr()
384 ~priv->irq1_mask; in bcm_sf2_switch_1_isr()
385 intrl2_1_writel(priv, priv->irq1_stat, INTRL2_CPU_CLEAR); in bcm_sf2_switch_1_isr()
387 if (priv->irq1_stat & P_LINK_UP_IRQ(P7_IRQ_OFF)) { in bcm_sf2_switch_1_isr()
388 priv->port_sts[7].link = true; in bcm_sf2_switch_1_isr()
391 if (priv->irq1_stat & P_LINK_DOWN_IRQ(P7_IRQ_OFF)) { in bcm_sf2_switch_1_isr()
392 priv->port_sts[7].link = false; in bcm_sf2_switch_1_isr()
408 if (priv->type == BCM7278_DEVICE_ID && !IS_ERR(priv->rcdev)) { in bcm_sf2_sw_rst()
409 ret = reset_control_assert(priv->rcdev); in bcm_sf2_sw_rst()
413 return reset_control_deassert(priv->rcdev); in bcm_sf2_sw_rst()
426 } while (timeout-- > 0); in bcm_sf2_sw_rst()
429 return -ETIMEDOUT; in bcm_sf2_sw_rst()
451 priv->moca_port = -1; in bcm_sf2_identify_ports()
457 /* Internal PHYs get assigned a specific 'phy-mode' property in bcm_sf2_identify_ports()
458 * value: "internal" to help flag them before MDIO probing in bcm_sf2_identify_ports()
467 priv->int_phy_mask |= 1 << port_num; in bcm_sf2_identify_ports()
470 priv->moca_port = port_num; in bcm_sf2_identify_ports()
472 if (of_property_read_bool(port, "brcm,use-bcm-hdr")) in bcm_sf2_identify_ports()
473 priv->brcm_tag_mask |= 1 << port_num; in bcm_sf2_identify_ports()
479 if (port_num == 5 && priv->type == BCM7278_DEVICE_ID) { in bcm_sf2_identify_ports()
496 /* Find our integrated MDIO bus node */ in bcm_sf2_mdio_register()
497 dn = of_find_compatible_node(NULL, NULL, "brcm,unimac-mdio"); in bcm_sf2_mdio_register()
498 priv->master_mii_bus = of_mdio_find_bus(dn); in bcm_sf2_mdio_register()
499 if (!priv->master_mii_bus) { in bcm_sf2_mdio_register()
500 err = -EPROBE_DEFER; in bcm_sf2_mdio_register()
504 priv->master_mii_dn = dn; in bcm_sf2_mdio_register()
506 priv->slave_mii_bus = mdiobus_alloc(); in bcm_sf2_mdio_register()
507 if (!priv->slave_mii_bus) { in bcm_sf2_mdio_register()
508 err = -ENOMEM; in bcm_sf2_mdio_register()
512 priv->slave_mii_bus->priv = priv; in bcm_sf2_mdio_register()
513 priv->slave_mii_bus->name = "sf2 slave mii"; in bcm_sf2_mdio_register()
514 priv->slave_mii_bus->read = bcm_sf2_sw_mdio_read; in bcm_sf2_mdio_register()
515 priv->slave_mii_bus->write = bcm_sf2_sw_mdio_write; in bcm_sf2_mdio_register()
516 snprintf(priv->slave_mii_bus->id, MII_BUS_ID_SIZE, "sf2-%d", in bcm_sf2_mdio_register()
518 priv->slave_mii_bus->dev.of_node = dn; in bcm_sf2_mdio_register()
520 /* Include the pseudo-PHY address to divert reads towards our in bcm_sf2_mdio_register()
522 * disconnects the internal switch pseudo-PHY such that we can use the in bcm_sf2_mdio_register()
526 * otherwise make all other PHY read/writes go to the master MDIO bus in bcm_sf2_mdio_register()
527 * controller that comes with this switch backed by the "mdio-unimac" in bcm_sf2_mdio_register()
531 priv->indir_phy_mask |= (1 << BRCM_PSEUDO_PHY_ADDR) | (1 << 0); in bcm_sf2_mdio_register()
533 priv->indir_phy_mask = 0; in bcm_sf2_mdio_register()
535 ds->phys_mii_mask = priv->indir_phy_mask; in bcm_sf2_mdio_register()
536 ds->slave_mii_bus = priv->slave_mii_bus; in bcm_sf2_mdio_register()
537 priv->slave_mii_bus->parent = ds->dev->parent; in bcm_sf2_mdio_register()
538 priv->slave_mii_bus->phy_mask = ~priv->indir_phy_mask; in bcm_sf2_mdio_register()
549 if (!(priv->indir_phy_mask & BIT(reg))) in bcm_sf2_mdio_register()
565 err = mdiobus_register(priv->slave_mii_bus); in bcm_sf2_mdio_register()
572 mdiobus_free(priv->slave_mii_bus); in bcm_sf2_mdio_register()
574 put_device(&priv->master_mii_bus->dev); in bcm_sf2_mdio_register()
582 mdiobus_unregister(priv->slave_mii_bus); in bcm_sf2_mdio_unregister()
583 mdiobus_free(priv->slave_mii_bus); in bcm_sf2_mdio_unregister()
584 put_device(&priv->master_mii_bus->dev); in bcm_sf2_mdio_unregister()
585 of_node_put(priv->master_mii_dn); in bcm_sf2_mdio_unregister()
596 if (priv->int_phy_mask & BIT(port)) in bcm_sf2_sw_get_phy_flags()
597 return priv->hw_params.gphy_rev; in bcm_sf2_sw_get_phy_flags()
609 if (!phy_interface_mode_is_rgmii(state->interface) && in bcm_sf2_sw_validate()
610 state->interface != PHY_INTERFACE_MODE_MII && in bcm_sf2_sw_validate()
611 state->interface != PHY_INTERFACE_MODE_REVMII && in bcm_sf2_sw_validate()
612 state->interface != PHY_INTERFACE_MODE_GMII && in bcm_sf2_sw_validate()
613 state->interface != PHY_INTERFACE_MODE_INTERNAL && in bcm_sf2_sw_validate()
614 state->interface != PHY_INTERFACE_MODE_MOCA) { in bcm_sf2_sw_validate()
617 dev_err(ds->dev, in bcm_sf2_sw_validate()
619 state->interface, port); in bcm_sf2_sw_validate()
632 if (state->interface != PHY_INTERFACE_MODE_MII && in bcm_sf2_sw_validate()
633 state->interface != PHY_INTERFACE_MODE_REVMII) { in bcm_sf2_sw_validate()
645 bitmap_and(state->advertising, state->advertising, mask, in bcm_sf2_sw_validate()
660 switch (state->interface) { in bcm_sf2_sw_mac_config()
719 if (priv->wol_ports_mask & BIT(port)) in bcm_sf2_sw_mac_link_down()
723 if (priv->type == BCM7445_DEVICE_ID) in bcm_sf2_sw_mac_link_down()
744 struct ethtool_eee *p = &priv->dev->ports[port].eee; in bcm_sf2_sw_mac_link_up()
750 if (priv->type == BCM7445_DEVICE_ID) in bcm_sf2_sw_mac_link_up()
792 p->eee_enabled = b53_eee_init(ds, port, phydev); in bcm_sf2_sw_mac_link_up()
800 status->link = false; in bcm_sf2_sw_fixed_state()
810 if (port == priv->moca_port) { in bcm_sf2_sw_fixed_state()
811 status->link = priv->port_sts[port].link; in bcm_sf2_sw_fixed_state()
813 * since some version of the user-space daemon (mocad) use in bcm_sf2_sw_fixed_state()
814 * cmd->autoneg to force the link, which messes up the PHY in bcm_sf2_sw_fixed_state()
817 if (!status->link) in bcm_sf2_sw_fixed_state()
818 netif_carrier_off(dsa_to_port(ds, port)->slave); in bcm_sf2_sw_fixed_state()
819 status->duplex = DUPLEX_FULL; in bcm_sf2_sw_fixed_state()
821 status->link = true; in bcm_sf2_sw_fixed_state()
850 for (port = 0; port < ds->num_ports; port++) { in bcm_sf2_sw_suspend()
855 if (!priv->wol_ports_mask) in bcm_sf2_sw_suspend()
856 clk_disable_unprepare(priv->clk); in bcm_sf2_sw_suspend()
866 if (!priv->wol_ports_mask) in bcm_sf2_sw_resume()
867 clk_prepare_enable(priv->clk); in bcm_sf2_sw_resume()
879 if (priv->hw_params.num_gphy == 1) in bcm_sf2_sw_resume()
882 ds->ops->setup(ds); in bcm_sf2_sw_resume()
890 struct net_device *p = dsa_to_port(ds, port)->cpu_dp->master; in bcm_sf2_sw_get_wol()
895 if (p->ethtool_ops->get_wol) in bcm_sf2_sw_get_wol()
896 p->ethtool_ops->get_wol(p, &pwol); in bcm_sf2_sw_get_wol()
899 wol->supported = pwol.supported; in bcm_sf2_sw_get_wol()
900 memset(&wol->sopass, 0, sizeof(wol->sopass)); in bcm_sf2_sw_get_wol()
903 memcpy(&wol->sopass, pwol.sopass, sizeof(wol->sopass)); in bcm_sf2_sw_get_wol()
905 if (priv->wol_ports_mask & (1 << port)) in bcm_sf2_sw_get_wol()
906 wol->wolopts = pwol.wolopts; in bcm_sf2_sw_get_wol()
908 wol->wolopts = 0; in bcm_sf2_sw_get_wol()
914 struct net_device *p = dsa_to_port(ds, port)->cpu_dp->master; in bcm_sf2_sw_set_wol()
916 s8 cpu_port = dsa_to_port(ds, port)->cpu_dp->index; in bcm_sf2_sw_set_wol()
919 if (p->ethtool_ops->get_wol) in bcm_sf2_sw_set_wol()
920 p->ethtool_ops->get_wol(p, &pwol); in bcm_sf2_sw_set_wol()
921 if (wol->wolopts & ~pwol.supported) in bcm_sf2_sw_set_wol()
922 return -EINVAL; in bcm_sf2_sw_set_wol()
924 if (wol->wolopts) in bcm_sf2_sw_set_wol()
925 priv->wol_ports_mask |= (1 << port); in bcm_sf2_sw_set_wol()
927 priv->wol_ports_mask &= ~(1 << port); in bcm_sf2_sw_set_wol()
933 if (priv->wol_ports_mask && priv->wol_ports_mask != (1 << cpu_port)) in bcm_sf2_sw_set_wol()
934 priv->wol_ports_mask |= (1 << cpu_port); in bcm_sf2_sw_set_wol()
936 priv->wol_ports_mask &= ~(1 << cpu_port); in bcm_sf2_sw_set_wol()
938 return p->ethtool_ops->set_wol(p, wol); in bcm_sf2_sw_set_wol()
947 for (port = 0; port < priv->hw_params.num_ports; port++) { in bcm_sf2_sw_setup()
970 * bus-glue understands.
977 struct bcm_sf2_priv *priv = dev->priv; in bcm_sf2_core_read8()
987 struct bcm_sf2_priv *priv = dev->priv; in bcm_sf2_core_read16()
997 struct bcm_sf2_priv *priv = dev->priv; in bcm_sf2_core_read32()
1007 struct bcm_sf2_priv *priv = dev->priv; in bcm_sf2_core_read64()
1017 struct bcm_sf2_priv *priv = dev->priv; in bcm_sf2_core_write8()
1027 struct bcm_sf2_priv *priv = dev->priv; in bcm_sf2_core_write16()
1037 struct bcm_sf2_priv *priv = dev->priv; in bcm_sf2_core_write32()
1047 struct bcm_sf2_priv *priv = dev->priv; in bcm_sf2_core_write64()
1196 { .compatible = "brcm,bcm7445-switch-v4.0",
1199 { .compatible = "brcm,bcm7278-switch-v4.0",
1202 { .compatible = "brcm,bcm7278-switch-v4.8",
1212 struct device_node *dn = pdev->dev.of_node; in bcm_sf2_sw_probe()
1226 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in bcm_sf2_sw_probe()
1228 return -ENOMEM; in bcm_sf2_sw_probe()
1230 ops = devm_kzalloc(&pdev->dev, sizeof(*ops), GFP_KERNEL); in bcm_sf2_sw_probe()
1232 return -ENOMEM; in bcm_sf2_sw_probe()
1234 dev = b53_switch_alloc(&pdev->dev, &bcm_sf2_io_ops, priv); in bcm_sf2_sw_probe()
1236 return -ENOMEM; in bcm_sf2_sw_probe()
1238 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); in bcm_sf2_sw_probe()
1240 return -ENOMEM; in bcm_sf2_sw_probe()
1243 if (!of_id || !of_id->data) in bcm_sf2_sw_probe()
1244 return -EINVAL; in bcm_sf2_sw_probe()
1246 data = of_id->data; in bcm_sf2_sw_probe()
1249 priv->type = data->type; in bcm_sf2_sw_probe()
1250 priv->reg_offsets = data->reg_offsets; in bcm_sf2_sw_probe()
1251 priv->core_reg_align = data->core_reg_align; in bcm_sf2_sw_probe()
1252 priv->num_cfp_rules = data->num_cfp_rules; in bcm_sf2_sw_probe()
1254 priv->rcdev = devm_reset_control_get_optional_exclusive(&pdev->dev, in bcm_sf2_sw_probe()
1256 if (PTR_ERR(priv->rcdev) == -EPROBE_DEFER) in bcm_sf2_sw_probe()
1257 return PTR_ERR(priv->rcdev); in bcm_sf2_sw_probe()
1259 /* Auto-detection using standard registers will not work, so in bcm_sf2_sw_probe()
1263 pdata->chip_id = priv->type; in bcm_sf2_sw_probe()
1264 dev->pdata = pdata; in bcm_sf2_sw_probe()
1266 priv->dev = dev; in bcm_sf2_sw_probe()
1267 ds = dev->ds; in bcm_sf2_sw_probe()
1268 ds->ops = &bcm_sf2_ops; in bcm_sf2_sw_probe()
1271 ds->num_tx_queues = SF2_NUM_EGRESS_QUEUES; in bcm_sf2_sw_probe()
1273 dev_set_drvdata(&pdev->dev, priv); in bcm_sf2_sw_probe()
1275 spin_lock_init(&priv->indir_lock); in bcm_sf2_sw_probe()
1276 mutex_init(&priv->cfp.lock); in bcm_sf2_sw_probe()
1277 INIT_LIST_HEAD(&priv->cfp.rules_list); in bcm_sf2_sw_probe()
1282 set_bit(0, priv->cfp.used); in bcm_sf2_sw_probe()
1283 set_bit(0, priv->cfp.unique); in bcm_sf2_sw_probe()
1293 priv->irq0 = irq_of_parse_and_map(dn, 0); in bcm_sf2_sw_probe()
1294 priv->irq1 = irq_of_parse_and_map(dn, 1); in bcm_sf2_sw_probe()
1296 base = &priv->core; in bcm_sf2_sw_probe()
1306 priv->clk = devm_clk_get_optional(&pdev->dev, "sw_switch"); in bcm_sf2_sw_probe()
1307 if (IS_ERR(priv->clk)) in bcm_sf2_sw_probe()
1308 return PTR_ERR(priv->clk); in bcm_sf2_sw_probe()
1310 ret = clk_prepare_enable(priv->clk); in bcm_sf2_sw_probe()
1314 priv->clk_mdiv = devm_clk_get_optional(&pdev->dev, "sw_switch_mdiv"); in bcm_sf2_sw_probe()
1315 if (IS_ERR(priv->clk_mdiv)) { in bcm_sf2_sw_probe()
1316 ret = PTR_ERR(priv->clk_mdiv); in bcm_sf2_sw_probe()
1320 ret = clk_prepare_enable(priv->clk_mdiv); in bcm_sf2_sw_probe()
1330 bcm_sf2_gphy_enable_set(priv->dev->ds, true); in bcm_sf2_sw_probe()
1334 pr_err("failed to register MDIO bus\n"); in bcm_sf2_sw_probe()
1338 bcm_sf2_gphy_enable_set(priv->dev->ds, false); in bcm_sf2_sw_probe()
1349 ret = devm_request_irq(&pdev->dev, priv->irq0, bcm_sf2_switch_0_isr, 0, in bcm_sf2_sw_probe()
1356 ret = devm_request_irq(&pdev->dev, priv->irq1, bcm_sf2_switch_1_isr, 0, in bcm_sf2_sw_probe()
1371 priv->hw_params.num_ports = core_readl(priv, CORE_IMP0_PRT_ID) + 1; in bcm_sf2_sw_probe()
1372 if (priv->hw_params.num_ports > DSA_MAX_PORTS) in bcm_sf2_sw_probe()
1373 priv->hw_params.num_ports = DSA_MAX_PORTS; in bcm_sf2_sw_probe()
1376 if (of_property_read_u32(dn, "brcm,num-gphy", in bcm_sf2_sw_probe()
1377 &priv->hw_params.num_gphy)) in bcm_sf2_sw_probe()
1378 priv->hw_params.num_gphy = 1; in bcm_sf2_sw_probe()
1381 priv->hw_params.top_rev = (rev >> SWITCH_TOP_REV_SHIFT) & in bcm_sf2_sw_probe()
1383 priv->hw_params.core_rev = (rev & SF2_REV_MASK); in bcm_sf2_sw_probe()
1386 priv->hw_params.gphy_rev = rev & PHY_REVISION_MASK; in bcm_sf2_sw_probe()
1392 dev_info(&pdev->dev, in bcm_sf2_sw_probe()
1394 priv->hw_params.top_rev >> 8, priv->hw_params.top_rev & 0xff, in bcm_sf2_sw_probe()
1395 priv->hw_params.core_rev >> 8, priv->hw_params.core_rev & 0xff, in bcm_sf2_sw_probe()
1396 priv->irq0, priv->irq1); in bcm_sf2_sw_probe()
1403 clk_disable_unprepare(priv->clk_mdiv); in bcm_sf2_sw_probe()
1405 clk_disable_unprepare(priv->clk); in bcm_sf2_sw_probe()
1413 priv->wol_ports_mask = 0; in bcm_sf2_sw_remove()
1416 dsa_unregister_switch(priv->dev->ds); in bcm_sf2_sw_remove()
1417 bcm_sf2_cfp_exit(priv->dev->ds); in bcm_sf2_sw_remove()
1419 clk_disable_unprepare(priv->clk_mdiv); in bcm_sf2_sw_remove()
1420 clk_disable_unprepare(priv->clk); in bcm_sf2_sw_remove()
1421 if (priv->type == BCM7278_DEVICE_ID && !IS_ERR(priv->rcdev)) in bcm_sf2_sw_remove()
1422 reset_control_assert(priv->rcdev); in bcm_sf2_sw_remove()
1432 * successful MDIO bus scan to occur. If we did turn off the GPHY in bcm_sf2_sw_shutdown()
1437 if (priv->hw_params.num_gphy == 1) in bcm_sf2_sw_shutdown()
1438 bcm_sf2_gphy_enable_set(priv->dev->ds, true); in bcm_sf2_sw_shutdown()
1446 return dsa_switch_suspend(priv->dev->ds); in bcm_sf2_suspend()
1453 return dsa_switch_resume(priv->dev->ds); in bcm_sf2_resume()
1466 .name = "brcm-sf2",
1476 MODULE_ALIAS("platform:brcm-sf2");