Lines Matching full:latencies

69 	/* Exit latencies */
73 	 * Endpoint acceptable latencies. A pcie downstream port only
423 		 * The exit latencies for L1 substates are not advertised  in pcie_aspm_check_latency()
425 		 * to determine max latencies introduced by enabling L1  in pcie_aspm_check_latency()
428 		 * L1 exit latencies advertised by a device include L1  in pcie_aspm_check_latency()
429 		 * substate latencies (and hence do not do any check).  in pcie_aspm_check_latency()
583 	/* Configure common clock before checking latencies */  in pcie_aspm_cap_init()
588 	 * clock configuration.  L0s & L1 exit latencies in the otherwise  in pcie_aspm_cap_init()
676 	/* Get and check endpoint acceptable latencies */  in pcie_aspm_cap_init()
976 /* Recheck latencies and update aspm_capable for links under the root */
1031 	/* Recheck latencies and configure upstream links */  in pcie_aspm_exit_link_state()