Lines Matching full:gc
38 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_disable_reg() local
42 irq_gc_lock(gc); in irq_gc_mask_disable_reg()
43 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_reg()
45 irq_gc_unlock(gc); in irq_gc_mask_disable_reg()
53 * and protected by gc->lock
57 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_set_bit() local
61 irq_gc_lock(gc); in irq_gc_mask_set_bit()
63 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_set_bit()
64 irq_gc_unlock(gc); in irq_gc_mask_set_bit()
73 * and protected by gc->lock
77 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_clr_bit() local
81 irq_gc_lock(gc); in irq_gc_mask_clr_bit()
83 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_clr_bit()
84 irq_gc_unlock(gc); in irq_gc_mask_clr_bit()
97 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_unmask_enable_reg() local
101 irq_gc_lock(gc); in irq_gc_unmask_enable_reg()
102 irq_reg_writel(gc, mask, ct->regs.enable); in irq_gc_unmask_enable_reg()
104 irq_gc_unlock(gc); in irq_gc_unmask_enable_reg()
113 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_ack_set_bit() local
117 irq_gc_lock(gc); in irq_gc_ack_set_bit()
118 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_ack_set_bit()
119 irq_gc_unlock(gc); in irq_gc_ack_set_bit()
129 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_ack_clr_bit() local
133 irq_gc_lock(gc); in irq_gc_ack_clr_bit()
134 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_ack_clr_bit()
135 irq_gc_unlock(gc); in irq_gc_ack_clr_bit()
152 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_disable_and_ack_set() local
156 irq_gc_lock(gc); in irq_gc_mask_disable_and_ack_set()
157 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_and_ack_set()
159 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_mask_disable_and_ack_set()
160 irq_gc_unlock(gc); in irq_gc_mask_disable_and_ack_set()
169 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_eoi() local
173 irq_gc_lock(gc); in irq_gc_eoi()
174 irq_reg_writel(gc, mask, ct->regs.eoi); in irq_gc_eoi()
175 irq_gc_unlock(gc); in irq_gc_eoi()
189 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_set_wake() local
192 if (!(mask & gc->wake_enabled)) in irq_gc_set_wake()
195 irq_gc_lock(gc); in irq_gc_set_wake()
197 gc->wake_active |= mask; in irq_gc_set_wake()
199 gc->wake_active &= ~mask; in irq_gc_set_wake()
200 irq_gc_unlock(gc); in irq_gc_set_wake()
214 void irq_init_generic_chip(struct irq_chip_generic *gc, const char *name, in irq_init_generic_chip() argument
218 raw_spin_lock_init(&gc->lock); in irq_init_generic_chip()
219 gc->num_ct = num_ct; in irq_init_generic_chip()
220 gc->irq_base = irq_base; in irq_init_generic_chip()
221 gc->reg_base = reg_base; in irq_init_generic_chip()
222 gc->chip_types->chip.name = name; in irq_init_generic_chip()
223 gc->chip_types->handler = handler; in irq_init_generic_chip()
241 struct irq_chip_generic *gc; in irq_alloc_generic_chip() local
242 unsigned long sz = sizeof(*gc) + num_ct * sizeof(struct irq_chip_type); in irq_alloc_generic_chip()
244 gc = kzalloc(sz, GFP_KERNEL); in irq_alloc_generic_chip()
245 if (gc) { in irq_alloc_generic_chip()
246 irq_init_generic_chip(gc, name, num_ct, irq_base, reg_base, in irq_alloc_generic_chip()
249 return gc; in irq_alloc_generic_chip()
254 irq_gc_init_mask_cache(struct irq_chip_generic *gc, enum irq_gc_flags flags) in irq_gc_init_mask_cache() argument
256 struct irq_chip_type *ct = gc->chip_types; in irq_gc_init_mask_cache()
257 u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask; in irq_gc_init_mask_cache()
260 for (i = 0; i < gc->num_ct; i++) { in irq_gc_init_mask_cache()
267 *mskptr = irq_reg_readl(gc, mskreg); in irq_gc_init_mask_cache()
289 struct irq_chip_generic *gc; in __irq_alloc_domain_generic_chips() local
294 if (d->gc) in __irq_alloc_domain_generic_chips()
302 sz = sizeof(*dgc) + numchips * sizeof(gc); in __irq_alloc_domain_generic_chips()
303 sz += numchips * (sizeof(*gc) + num_ct * sizeof(struct irq_chip_type)); in __irq_alloc_domain_generic_chips()
313 d->gc = dgc; in __irq_alloc_domain_generic_chips()
316 tmp += sizeof(*dgc) + numchips * sizeof(gc); in __irq_alloc_domain_generic_chips()
319 dgc->gc[i] = gc = tmp; in __irq_alloc_domain_generic_chips()
320 irq_init_generic_chip(gc, name, num_ct, i * irqs_per_chip, in __irq_alloc_domain_generic_chips()
323 gc->domain = d; in __irq_alloc_domain_generic_chips()
325 gc->reg_readl = &irq_readl_be; in __irq_alloc_domain_generic_chips()
326 gc->reg_writel = &irq_writel_be; in __irq_alloc_domain_generic_chips()
330 list_add_tail(&gc->list, &gc_list); in __irq_alloc_domain_generic_chips()
333 tmp += sizeof(*gc) + num_ct * sizeof(struct irq_chip_type); in __irq_alloc_domain_generic_chips()
342 struct irq_domain_chip_generic *dgc = d->gc; in __irq_get_domain_generic_chip()
350 return dgc->gc[idx]; in __irq_get_domain_generic_chip()
361 struct irq_chip_generic *gc = __irq_get_domain_generic_chip(d, hw_irq); in irq_get_domain_generic_chip() local
363 return !IS_ERR(gc) ? gc : NULL; in irq_get_domain_generic_chip()
381 struct irq_domain_chip_generic *dgc = d->gc; in irq_map_generic_chip()
382 struct irq_chip_generic *gc; in irq_map_generic_chip() local
388 gc = __irq_get_domain_generic_chip(d, hw_irq); in irq_map_generic_chip()
389 if (IS_ERR(gc)) in irq_map_generic_chip()
390 return PTR_ERR(gc); in irq_map_generic_chip()
394 if (test_bit(idx, &gc->unused)) in irq_map_generic_chip()
397 if (test_bit(idx, &gc->installed)) in irq_map_generic_chip()
400 ct = gc->chip_types; in irq_map_generic_chip()
404 if (!gc->installed) { in irq_map_generic_chip()
405 raw_spin_lock_irqsave(&gc->lock, flags); in irq_map_generic_chip()
406 irq_gc_init_mask_cache(gc, dgc->gc_flags); in irq_map_generic_chip()
407 raw_spin_unlock_irqrestore(&gc->lock, flags); in irq_map_generic_chip()
411 set_bit(idx, &gc->installed); in irq_map_generic_chip()
422 irq_domain_set_info(d, virq, hw_irq, chip, gc, ct->handler, NULL, NULL); in irq_map_generic_chip()
430 struct irq_domain_chip_generic *dgc = d->gc; in irq_unmap_generic_chip()
432 struct irq_chip_generic *gc; in irq_unmap_generic_chip() local
435 gc = irq_get_domain_generic_chip(d, hw_irq); in irq_unmap_generic_chip()
436 if (!gc) in irq_unmap_generic_chip()
441 clear_bit(irq_idx, &gc->installed); in irq_unmap_generic_chip()
456 * @gc: Generic irq chip holding all data
457 * @msk: Bitmask holding the irqs to initialize relative to gc->irq_base
462 * Set up max. 32 interrupts starting from gc->irq_base. Note, this
466 void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk, in irq_setup_generic_chip() argument
470 struct irq_chip_type *ct = gc->chip_types; in irq_setup_generic_chip()
475 list_add_tail(&gc->list, &gc_list); in irq_setup_generic_chip()
478 irq_gc_init_mask_cache(gc, flags); in irq_setup_generic_chip()
480 for (i = gc->irq_base; msk; msk >>= 1, i++) { in irq_setup_generic_chip()
494 d->mask = 1 << (i - gc->irq_base); in irq_setup_generic_chip()
497 irq_set_chip_data(i, gc); in irq_setup_generic_chip()
500 gc->irq_cnt = i - gc->irq_base; in irq_setup_generic_chip()
513 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_setup_alt_chip() local
514 struct irq_chip_type *ct = gc->chip_types; in irq_setup_alt_chip()
517 for (i = 0; i < gc->num_ct; i++, ct++) { in irq_setup_alt_chip()
530 * @gc: Generic irq chip holding all data
531 * @msk: Bitmask holding the irqs to initialize relative to gc->irq_base
535 * Remove up to 32 interrupts starting from gc->irq_base.
537 void irq_remove_generic_chip(struct irq_chip_generic *gc, u32 msk, in irq_remove_generic_chip() argument
543 list_del(&gc->list); in irq_remove_generic_chip()
552 * interrupt number in gc::irq_base. Otherwise gc::irq_base in irq_remove_generic_chip()
555 if (gc->domain) { in irq_remove_generic_chip()
556 virq = irq_find_mapping(gc->domain, gc->irq_base + i); in irq_remove_generic_chip()
560 virq = gc->irq_base + i; in irq_remove_generic_chip()
572 static struct irq_data *irq_gc_get_irq_data(struct irq_chip_generic *gc) in irq_gc_get_irq_data() argument
576 if (!gc->domain) in irq_gc_get_irq_data()
577 return irq_get_irq_data(gc->irq_base); in irq_gc_get_irq_data()
583 if (!gc->installed) in irq_gc_get_irq_data()
586 virq = irq_find_mapping(gc->domain, gc->irq_base + __ffs(gc->installed)); in irq_gc_get_irq_data()
593 struct irq_chip_generic *gc; in irq_gc_suspend() local
595 list_for_each_entry(gc, &gc_list, list) { in irq_gc_suspend()
596 struct irq_chip_type *ct = gc->chip_types; in irq_gc_suspend()
599 struct irq_data *data = irq_gc_get_irq_data(gc); in irq_gc_suspend()
605 if (gc->suspend) in irq_gc_suspend()
606 gc->suspend(gc); in irq_gc_suspend()
613 struct irq_chip_generic *gc; in irq_gc_resume() local
615 list_for_each_entry(gc, &gc_list, list) { in irq_gc_resume()
616 struct irq_chip_type *ct = gc->chip_types; in irq_gc_resume()
618 if (gc->resume) in irq_gc_resume()
619 gc->resume(gc); in irq_gc_resume()
622 struct irq_data *data = irq_gc_get_irq_data(gc); in irq_gc_resume()
636 struct irq_chip_generic *gc; in irq_gc_shutdown() local
638 list_for_each_entry(gc, &gc_list, list) { in irq_gc_shutdown()
639 struct irq_chip_type *ct = gc->chip_types; in irq_gc_shutdown()
642 struct irq_data *data = irq_gc_get_irq_data(gc); in irq_gc_shutdown()