1 // SPDX-License-Identifier: GPL-2.0
3 // Helper routines for R-Car sound ADG.
7 #include <linux/clk-provider.h>
16 #define CLKOUT	0  macro
30 	struct clk *clkout[CLKOUTMAX];  member
49 	     ((pos) = adg->clk[i]);		\
54 	     ((pos) = adg->clkout[i]);	\
56 #define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
72 	for (i = 3; i >= 0; i--) {  in rsnd_adg_calculate_rbgx()
75 			return (u32)((i << 8) | ((div / ratio) - 1));  in rsnd_adg_calculate_rbgx()
118 		adg->clk_rate[CLKA],	/* 0000: CLKA */  in __rsnd_adg_get_timesel_ratio()
119 		adg->clk_rate[CLKB],	/* 0001: CLKB */  in __rsnd_adg_get_timesel_ratio()
120 		adg->clk_rate[CLKC],	/* 0010: CLKC */  in __rsnd_adg_get_timesel_ratio()
121 		adg->rbga_rate_for_441khz,	/* 0011: RBGA */  in __rsnd_adg_get_timesel_ratio()
122 		adg->rbgb_rate_for_48khz,	/* 0100: RBGB */  in __rsnd_adg_get_timesel_ratio()
136 			diff = abs(target_rate - sel_rate[sel] / div);  in __rsnd_adg_get_timesel_ratio()
158 		dev_err(dev, "no Input clock\n");  in __rsnd_adg_get_timesel_ratio()
187 	if (runtime->rate != in_rate) {  in rsnd_adg_get_timesel_ratio()
190 	} else if (runtime->rate != out_rate) {  in rsnd_adg_get_timesel_ratio()
301 	 * find suitable clock from  in rsnd_adg_clk_query()
305 		if (rate == adg->clk_rate[i])  in rsnd_adg_clk_query()
309 	 * find divided clock from BRGA/BRGB  in rsnd_adg_clk_query()
311 	if (rate == adg->rbga_rate_for_441khz)  in rsnd_adg_clk_query()
314 	if (rate == adg->rbgb_rate_for_48khz)  in rsnd_adg_clk_query()
317 	return -EIO;  in rsnd_adg_clk_query()
350 	rsnd_mod_bset(adg_mod, BRGCKR, 0x80770000, adg->ckr | ckr);  in rsnd_adg_ssi_clk_try_start()
351 	rsnd_mod_write(adg_mod, BRRA,  adg->rbga);  in rsnd_adg_ssi_clk_try_start()
352 	rsnd_mod_write(adg_mod, BRRB,  adg->rbgb);  in rsnd_adg_ssi_clk_try_start()
354 	dev_dbg(dev, "CLKOUT is based on BRG%c (= %dHz)\n",  in rsnd_adg_ssi_clk_try_start()
356 		(ckr) ?	adg->rbgb_rate_for_48khz :  in rsnd_adg_ssi_clk_try_start()
357 			adg->rbga_rate_for_441khz);  in rsnd_adg_ssi_clk_try_start()
379 			adg->clk_rate[i] = clk_get_rate(adg->clk[i]);  in rsnd_adg_clk_control()
398 		adg->clk[i] = IS_ERR(clk) ? NULL : clk;  in rsnd_adg_get_clkin()
407 	struct device_node *np = dev->of_node;  in rsnd_adg_get_clkout()
418 		[CLKOUT]  = "audio_clkout",  in rsnd_adg_get_clkout()
438 	prop = of_find_property(np, "clock-frequency", NULL);  in rsnd_adg_get_clkout()
442 	req_size = prop->length / sizeof(u32);  in rsnd_adg_get_clkout()
445 			"too many clock-frequency, use top %d\n", REQ_SIZE);  in rsnd_adg_get_clkout()
449 	of_property_read_u32_array(np, "clock-frequency", req_rate, req_size);  in rsnd_adg_get_clkout()
462 	if (of_get_property(np, "clkout-lr-asynchronous", NULL))  in rsnd_adg_get_clkout()
469 	 * SSI itself can divide parent clock by 1/1 - 1/16  in rsnd_adg_get_clkout()
474 	adg->rbga_rate_for_441khz	= 0;  in rsnd_adg_get_clkout()
475 	adg->rbgb_rate_for_48khz	= 0;  in rsnd_adg_get_clkout()
483 		if (!adg->rbga_rate_for_441khz && (0 == rate % 44100)) {  in rsnd_adg_get_clkout()
490 				adg->rbga_rate_for_441khz = rate / div;  in rsnd_adg_get_clkout()
499 		if (!adg->rbgb_rate_for_48khz && (0 == rate % 48000)) {  in rsnd_adg_get_clkout()
506 				adg->rbgb_rate_for_48khz = rate / div;  in rsnd_adg_get_clkout()
520 	of_property_read_u32(np, "#clock-cells", &count);  in rsnd_adg_get_clkout()
522 	 * for clkout  in rsnd_adg_get_clkout()
525 		clk = clk_register_fixed_rate(dev, clkout_name[CLKOUT],  in rsnd_adg_get_clkout()
528 			adg->clkout[CLKOUT] = clk;  in rsnd_adg_get_clkout()
541 				adg->clkout[i] = clk;  in rsnd_adg_get_clkout()
543 		adg->onecell.clks	= adg->clkout;  in rsnd_adg_get_clkout()
544 		adg->onecell.clk_num	= CLKOUTMAX;  in rsnd_adg_get_clkout()
546 				    &adg->onecell);  in rsnd_adg_get_clkout()
550 	adg->ckr = ckr;  in rsnd_adg_get_clkout()
551 	adg->rbga = rbga;  in rsnd_adg_get_clkout()
552 	adg->rbgb = rbgb;  in rsnd_adg_get_clkout()
567 		adg->ckr, adg->rbga, adg->rbgb);  in rsnd_adg_clk_dbg_info()
568 	dev_dbg(dev, "BRGA (for 44100 base) = %d\n", adg->rbga_rate_for_441khz);  in rsnd_adg_clk_dbg_info()
569 	dev_dbg(dev, "BRGB (for 48000 base) = %d\n", adg->rbgb_rate_for_48khz);  in rsnd_adg_clk_dbg_info()
572 	 * Actual CLKOUT will be exchanged in rsnd_adg_ssi_clk_try_start()  in rsnd_adg_clk_dbg_info()
576 		dev_dbg(dev, "clkout %d : %pa : %ld\n", i,  in rsnd_adg_clk_dbg_info()
591 		return -ENOMEM;  in rsnd_adg_probe()
593 	ret = rsnd_mod_init(priv, &adg->mod, &adg_ops,  in rsnd_adg_probe()
602 	priv->adg = adg;  in rsnd_adg_probe()
612 	struct device_node *np = dev->of_node;  in rsnd_adg_remove()
613 	struct rsnd_adg *adg = priv->adg;  in rsnd_adg_remove()
618 		if (adg->clkout[i])  in rsnd_adg_remove()
619 			clk_unregister_fixed_rate(adg->clkout[i]);  in rsnd_adg_remove()