Lines Matching +full:0 +full:x8030
30 { 249600000, 2000000000, 0 },
34 .offset = 0x0,
52 .l = 0x1A,
53 .alpha = 0xAAA,
54 .config_ctl_val = 0x20485699,
55 .config_ctl_hi_val = 0x00002261,
56 .config_ctl_hi1_val = 0x329A299C,
57 .user_ctl_val = 0x00000001,
58 .user_ctl_hi_val = 0x00000805,
59 .user_ctl_hi1_val = 0x00000000,
63 .offset = 0x100,
80 { P_BI_TCXO, 0 },
96 { P_BI_TCXO, 0 },
110 F(19200000, P_BI_TCXO, 1, 0, 0),
111 F(200000000, P_GCC_GPU_GPLL0_DIV_CLK_SRC, 1.5, 0, 0),
112 F(500000000, P_GPU_CC_PLL1_OUT_MAIN, 1, 0, 0),
117 .cmd_rcgr = 0x1120,
118 .mnd_width = 0,
131 F(150000000, P_GCC_GPU_GPLL0_DIV_CLK_SRC, 2, 0, 0),
132 F(240000000, P_GCC_GPU_GPLL0_CLK_SRC, 2.5, 0, 0),
133 F(300000000, P_GCC_GPU_GPLL0_CLK_SRC, 2, 0, 0),
138 .cmd_rcgr = 0x117c,
139 .mnd_width = 0,
152 .reg = 0x11c0,
153 .shift = 0,
167 .reg = 0x11bc,
168 .shift = 0,
182 .halt_reg = 0x1078,
185 .enable_reg = 0x1078,
186 .enable_mask = BIT(0),
200 .halt_reg = 0x107c,
203 .enable_reg = 0x107c,
204 .enable_mask = BIT(0),
218 .halt_reg = 0x1098,
221 .enable_reg = 0x1098,
222 .enable_mask = BIT(0),
236 .halt_reg = 0x108c,
239 .enable_reg = 0x108c,
240 .enable_mask = BIT(0),
249 .halt_reg = 0x1004,
252 .enable_reg = 0x1004,
253 .enable_mask = BIT(0),
262 .halt_reg = 0x109c,
265 .enable_reg = 0x109c,
266 .enable_mask = BIT(0),
275 .halt_reg = 0x1064,
278 .enable_reg = 0x1064,
279 .enable_mask = BIT(0),
293 .halt_reg = 0x5000,
296 .enable_reg = 0x5000,
297 .enable_mask = BIT(0),
306 .halt_reg = 0x1178,
309 .enable_reg = 0x1178,
310 .enable_mask = BIT(0),
324 .halt_reg = 0x1204,
327 .enable_reg = 0x1204,
328 .enable_mask = BIT(0),
342 .halt_reg = 0x802c,
345 .enable_reg = 0x802c,
346 .enable_mask = BIT(0),
355 .halt_reg = 0x8030,
358 .enable_reg = 0x8030,
359 .enable_mask = BIT(0),
368 .halt_reg = 0x1090,
371 .enable_reg = 0x1090,
372 .enable_mask = BIT(0),
381 .gdscr = 0x106c,
382 .gds_hw_ctrl = 0x1540,
391 .gdscr = 0x100c,
392 .clamp_io_ctrl = 0x1508,
432 .max_register = 0x8030,
464 regmap_update_bits(regmap, 0x1170, BIT(0), BIT(0)); in gpu_cc_sc7280_probe()
465 regmap_update_bits(regmap, 0x1098, BIT(0), BIT(0)); in gpu_cc_sc7280_probe()
466 regmap_update_bits(regmap, 0x1098, BIT(13), BIT(13)); in gpu_cc_sc7280_probe()