Lines Matching full:edac
11 #include <linux/edac.h>
76 /*********************** EDAC Memory Controller Functions ****************/
78 /* The SDRAM controller uses the EDAC Memory Controller framework. */
225 { .compatible = "altr,sdram-edac", .data = &c5_data},
226 { .compatible = "altr,sdram-edac-a10", .data = &a10_data},
457 "EDAC Probe Failed; Error %d\n", res); in altr_sdram_probe()
474 * If you want to suspend, need to disable EDAC by removing it
480 pr_err("Suspend not allowed when EDAC is enabled.\n"); in altr_sdram_prepare()
506 /************************* EDAC Parent Probe *************************/
532 /************************* EDAC Device Functions *************************/
535 * EDAC Device Functions (shared between various IPs).
536 * The discrete memories use the EDAC Device framework. The probe
538 * so they are shared. The memory allocation and freeing for EDAC
708 * This is a generic EDAC device driver that will support
752 "%s: Unable to allocate EDAC device\n", ecc_name); in altr_edac_device_probe()
768 /* Get driver specific data for this EDAC device */ in altr_edac_device_probe()
810 "%s:Error setting up EDAC device: %d\n", ecc_name, res); in altr_edac_device_probe()
1082 /*********************** SDRAM EDAC Device Functions *********************/
1138 /*********************** OCRAM EDAC Device Functions *********************/
1236 /********************* L2 Cache EDAC Device Functions ********************/
1296 regmap_write(dci->edac->ecc_mgr_map, in altr_edac_a10_l2_irq()
1303 regmap_write(dci->edac->ecc_mgr_map, in altr_edac_a10_l2_irq()
1523 /* Create the PortB EDAC device */ in altr_portb_setup()
1529 "%s: Unable to allocate PortB EDAC device\n", in altr_portb_setup()
1534 /* Initialize the PortB EDAC device structure from PortA structure */ in altr_portb_setup()
1610 list_add(&altdev->next, &altdev->edac->a10_ecc_devices); in altr_portb_setup()
1620 "%s:Error setting up EDAC device: %d\n", ecc_name, rc); in altr_portb_setup()
1704 /********************* Arria10 EDAC Device Functions *************************/
1733 { .compatible = "altr,sdram-edac-s10", .data = &s10_sdramecc_data },
1740 * The Arria10 EDAC Device Functions differ from the Cyclone5/Arria5
1774 * The Stratix10 EDAC Error Injection Functions differ from Arria10
1839 struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc); in altr_edac_a10_irq_handler() local
1844 dberr = (irq == edac->db_irq) ? 1 : 0; in altr_edac_a10_irq_handler()
1850 regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status); in altr_edac_a10_irq_handler()
1854 generic_handle_domain_irq(edac->domain, dberr * 32 + bit); in altr_edac_a10_irq_handler()
1865 if (of_device_is_compatible(np, "altr,sdram-edac-s10")) in validate_parent_available()
1893 static int altr_edac_a10_device_add(struct altr_arria10_edac *edac, in altr_edac_a10_device_add() argument
1909 /* Get driver specific data for this EDAC device */ in altr_edac_a10_device_add()
1917 if (!devres_open_group(edac->dev, altr_edac_a10_device_add, GFP_KERNEL)) in altr_edac_a10_device_add()
1920 if (of_device_is_compatible(np, "altr,sdram-edac-s10")) in altr_edac_a10_device_add()
1938 "%s: Unable to allocate EDAC device\n", ecc_name); in altr_edac_a10_device_add()
1944 dci->dev = edac->dev; in altr_edac_a10_device_add()
1947 altdev->edac = edac; in altr_edac_a10_device_add()
1950 altdev->ddev = *edac->dev; in altr_edac_a10_device_add()
1956 altdev->base = devm_ioremap_resource(edac->dev, &res); in altr_edac_a10_device_add()
1975 rc = devm_request_irq(edac->dev, altdev->sb_irq, prv->ecc_irq_handler, in altr_edac_a10_device_add()
1998 rc = devm_request_irq(edac->dev, altdev->db_irq, prv->ecc_irq_handler, in altr_edac_a10_device_add()
2009 dev_err(edac->dev, "edac_device_add_device failed\n"); in altr_edac_a10_device_add()
2016 list_add(&altdev->next, &edac->a10_ecc_devices); in altr_edac_a10_device_add()
2018 devres_remove_group(edac->dev, altr_edac_a10_device_add); in altr_edac_a10_device_add()
2025 devres_release_group(edac->dev, NULL); in altr_edac_a10_device_add()
2027 "%s:Error setting up EDAC device: %d\n", ecc_name, rc); in altr_edac_a10_device_add()
2034 struct altr_arria10_edac *edac = irq_data_get_irq_chip_data(d); in a10_eccmgr_irq_mask() local
2036 regmap_write(edac->ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_SET_OFST, in a10_eccmgr_irq_mask()
2042 struct altr_arria10_edac *edac = irq_data_get_irq_chip_data(d); in a10_eccmgr_irq_unmask() local
2044 regmap_write(edac->ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_CLR_OFST, in a10_eccmgr_irq_unmask()
2051 struct altr_arria10_edac *edac = d->host_data; in a10_eccmgr_irqdomain_map() local
2053 irq_set_chip_and_handler(irq, &edac->irq_chip, handle_simple_irq); in a10_eccmgr_irqdomain_map()
2054 irq_set_chip_data(irq, edac); in a10_eccmgr_irqdomain_map()
2065 /************** Stratix 10 EDAC Double Bit Error Handler ************/
2079 struct altr_arria10_edac *edac = to_a10edac(this, panic_notifier); in s10_edac_dberr_handler() local
2082 regmap_read(edac->ecc_mgr_map, S10_SYSMGR_ECC_INTSTAT_DERR_OFST, in s10_edac_dberr_handler()
2084 regmap_write(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, dberror); in s10_edac_dberr_handler()
2091 list_for_each(position, &edac->a10_ecc_devices) { in s10_edac_dberr_handler()
2100 regmap_write(edac->ecc_mgr_map, in s10_edac_dberr_handler()
2103 "EDAC: [Fatal DBE on %s @ 0x%08X]\n", in s10_edac_dberr_handler()
2117 /****************** Arria 10 EDAC Probe Function *********************/
2120 struct altr_arria10_edac *edac; in altr_edac_a10_probe() local
2123 edac = devm_kzalloc(&pdev->dev, sizeof(*edac), GFP_KERNEL); in altr_edac_a10_probe()
2124 if (!edac) in altr_edac_a10_probe()
2127 edac->dev = &pdev->dev; in altr_edac_a10_probe()
2128 platform_set_drvdata(pdev, edac); in altr_edac_a10_probe()
2129 INIT_LIST_HEAD(&edac->a10_ecc_devices); in altr_edac_a10_probe()
2131 edac->ecc_mgr_map = in altr_edac_a10_probe()
2135 if (IS_ERR(edac->ecc_mgr_map)) { in altr_edac_a10_probe()
2138 return PTR_ERR(edac->ecc_mgr_map); in altr_edac_a10_probe()
2141 edac->irq_chip.name = pdev->dev.of_node->name; in altr_edac_a10_probe()
2142 edac->irq_chip.irq_mask = a10_eccmgr_irq_mask; in altr_edac_a10_probe()
2143 edac->irq_chip.irq_unmask = a10_eccmgr_irq_unmask; in altr_edac_a10_probe()
2144 edac->domain = irq_domain_add_linear(pdev->dev.of_node, 64, in altr_edac_a10_probe()
2145 &a10_eccmgr_ic_ops, edac); in altr_edac_a10_probe()
2146 if (!edac->domain) { in altr_edac_a10_probe()
2151 edac->sb_irq = platform_get_irq(pdev, 0); in altr_edac_a10_probe()
2152 if (edac->sb_irq < 0) in altr_edac_a10_probe()
2153 return edac->sb_irq; in altr_edac_a10_probe()
2155 irq_set_chained_handler_and_data(edac->sb_irq, in altr_edac_a10_probe()
2157 edac); in altr_edac_a10_probe()
2163 edac->panic_notifier.notifier_call = s10_edac_dberr_handler; in altr_edac_a10_probe()
2165 &edac->panic_notifier); in altr_edac_a10_probe()
2168 regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, in altr_edac_a10_probe()
2171 regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST, in altr_edac_a10_probe()
2177 regmap_write(edac->ecc_mgr_map, in altr_edac_a10_probe()
2179 regmap_write(edac->ecc_mgr_map, in altr_edac_a10_probe()
2184 edac->db_irq = platform_get_irq(pdev, 1); in altr_edac_a10_probe()
2185 if (edac->db_irq < 0) in altr_edac_a10_probe()
2186 return edac->db_irq; in altr_edac_a10_probe()
2188 irq_set_chained_handler_and_data(edac->db_irq, in altr_edac_a10_probe()
2189 altr_edac_a10_irq_handler, edac); in altr_edac_a10_probe()
2197 altr_edac_a10_device_add(edac, child); in altr_edac_a10_probe()
2200 else if (of_device_is_compatible(child, "altr,sdram-edac-a10")) in altr_edac_a10_probe()
2227 MODULE_DESCRIPTION("EDAC Driver for Altera Memories");