Lines Matching full:hvs
90 struct vc4_hvs *hvs; member
204 * demanding in term of memory or HVS bandwidth which is hard to guess
326 /* Memory manager for the LBM memory used by HVS scaling. */
435 /* Load of this plane on the HVS block. The load is expressed in HVS
498 /* Bitmask of channels (FIFOs) of the HVS that the output can source from */
501 /* Which output of the HVS this pixelvalve sources from. */
558 * set in the HVS for that CRTC. Protected by @irq_lock, and
565 * @current_hvs_channel: HVS channel currently assigned to the
633 readl(hvs->regs + (offset)); \
639 writel(val, hvs->regs + (offset)); \
1005 void vc4_hvs_stop_channel(struct vc4_hvs *hvs, unsigned int output);
1006 int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output);
1007 u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo);
1013 void vc4_hvs_dump_state(struct vc4_hvs *hvs);
1014 void vc4_hvs_unmask_underrun(struct vc4_hvs *hvs, int channel);
1015 void vc4_hvs_mask_underrun(struct vc4_hvs *hvs, int channel);