54  * v1.x - v3.x SYSMMU supports 32bit physical and 32bit virtual address spaces
57  * All SYSMMU controllers in the system support the address spaces of the same
58  * size, so PG_ENT_SHIFT can be initialized on first SYSMMU probe to proper
211 /* SysMMU v5 has the same faults for AR (0..4 bits) and AW (16..20 bits) */
229  * on device add, contains a list of SYSMMU controllers defined by device tree,
241  * It contains list of SYSMMU controllers from all master devices, which has
257  * SysMMU version specific data. Contains offsets for the registers which can
258  * be found in different SysMMU variants, but have different offset values.
278  * This structure hold all data of a single SYSMMU controller, this includes
284 	struct device *sysmmu;		/* SYSMMU controller device */  member
288 	struct clk *clk;		/* SYSMMU's clock */
289 	struct clk *aclk;		/* SYSMMU's aclk clock */
290 	struct clk *pclk;		/* SYSMMU's pclk clock */
362 /* SysMMU v1..v3 */
373 /* SysMMU v5 */
387 /* SysMMU v7: non-VM capable register layout */
403 /* SysMMU v7: VM capable register layout */
526 	dev_dbg(data->sysmmu, "hardware version: %d.%d\n",  in __sysmmu_get_version()
550 	dev_err(data->sysmmu, "%s: [%s] %s FAULT occurred at %#x\n",  in show_fault_information()
554 	dev_dbg(data->sysmmu, "Page table base: %pa\n", &data->pgtable);  in show_fault_information()
556 	dev_dbg(data->sysmmu, "\tLv1 entry: %#x\n", *ent);  in show_fault_information()
559 		dev_dbg(data->sysmmu, "\t Lv2 entry: %#x\n", *ent);  in show_fault_information()
578 		dev_err(data->sysmmu, "Unhandled interrupt bit %u\n", itype);  in exynos_sysmmu_irq()
593 	/* SysMMU is in blocked state when interrupt occurred */  in exynos_sysmmu_irq()
660 	 * SYSMMU driver keeps master's clock enabled only for the short  in __sysmmu_enable()
750 	data->clk = devm_clk_get_optional(dev, "sysmmu");  in exynos_sysmmu_probe()
771 	data->sysmmu = dev;  in exynos_sysmmu_probe()
777 				     dev_name(data->sysmmu));  in exynos_sysmmu_probe()
804 	 * use the first registered sysmmu device for performing  in exynos_sysmmu_probe()
833 			dev_dbg(data->sysmmu, "saving state\n");  in exynos_sysmmu_suspend()
851 			dev_dbg(data->sysmmu, "restoring state\n");  in exynos_sysmmu_resume()
866 	{ .compatible	= "samsung,exynos-sysmmu", },
873 		.name		= "exynos-sysmmu",
998 		pm_runtime_get_noresume(data->sysmmu);  in exynos_iommu_detach_device()
999 		if (pm_runtime_active(data->sysmmu))  in exynos_iommu_detach_device()
1001 		pm_runtime_put(data->sysmmu);  in exynos_iommu_detach_device()
1050 		pm_runtime_get_noresume(data->sysmmu);  in exynos_iommu_attach_device()
1051 		if (pm_runtime_active(data->sysmmu))  in exynos_iommu_attach_device()
1053 		pm_runtime_put(data->sysmmu);  in exynos_iommu_attach_device()
1394 		 * SYSMMU will be runtime activated via device link  in exynos_iommu_probe_device()
1398 		data->link = device_link_add(dev, data->sysmmu,  in exynos_iommu_probe_device()
1438 	struct platform_device *sysmmu = of_find_device_by_node(spec->np);  in exynos_iommu_of_xlate()  local
1442 	if (!sysmmu)  in exynos_iommu_of_xlate()
1445 	data = platform_get_drvdata(sysmmu);  in exynos_iommu_of_xlate()
1447 		put_device(&sysmmu->dev);  in exynos_iommu_of_xlate()
1454 			put_device(&sysmmu->dev);  in exynos_iommu_of_xlate()