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Lines Matching +full:tx +full:- +full:d +full:- +full:cal

1 // SPDX-License-Identifier: GPL-2.0+
6 #include <linux/nvmem-consumer.h>
346 phydev_dbg(phydev, "cal_val: 0x%x, ret: %d\n", cal_val, ret); in cal_cycle()
412 switch (phydev->drv->phy_id) { in tx_amp_fill_result()
491 if (phydev->drv->phy_id == MTK_GPHY_ID_MT7988) in tx_r50_fill_result()
492 bias = -1; in tx_r50_fill_result()
510 return -EINVAL; in tx_r50_fill_result()
537 return -EINVAL; in tx_r50_cal_efuse()
603 ret = -EINVAL; in tx_vcm_cal_sw()
610 phydev_dbg(phydev, "Start TX-VCM SW cal.\n"); in tx_vcm_cal_sw()
611 while ((upper_idx - lower_idx) > 1) { in tx_vcm_cal_sw()
655 /* We calibrate TX-VCM in different logic. Check upper index and then in tx_vcm_cal_sw()
658 ret = upper_ret - lower_ret; in tx_vcm_cal_sw()
669 phydev_dbg(phydev, "TX-VCM SW cal result: 0x%x\n", upper_idx); in tx_vcm_cal_sw()
680 phydev_warn(phydev, "TX-VCM SW cal result at low margin 0x%x\n", in tx_vcm_cal_sw()
685 phydev_warn(phydev, "TX-VCM SW cal result at high margin 0x%x\n", in tx_vcm_cal_sw()
688 ret = -EINVAL; in tx_vcm_cal_sw()
754 * Keep middle level of TX MLT3 shapper as default. in mt7981_phy_finetune()
755 * Only change TX MLT3 overshoot level here. in mt7981_phy_finetune()
996 return -EINVAL; in cal_sw()
1026 return -EINVAL; in cal_efuse()
1050 return -EINVAL; in start_cal()
1054 phydev_err(phydev, "cal %d failed\n", cal_item); in start_cal()
1055 return -EIO; in start_cal()
1068 cell = nvmem_cell_get(&phydev->mdio.dev, "phy-cal-data"); in mt798x_phy_calibration()
1070 if (PTR_ERR(cell) == -EPROBE_DEFER) in mt798x_phy_calibration()
1082 ret = -EINVAL; in mt798x_phy_calibration()
1109 switch (phydev->drv->phy_id) { in mt798x_phy_config_init()
1128 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_hw_led_on_set()
1132 changed = !test_and_set_bit(bit_on, &priv->led_state); in mt798x_phy_hw_led_on_set()
1134 changed = !!test_and_clear_bit(bit_on, &priv->led_state); in mt798x_phy_hw_led_on_set()
1137 (index ? 16 : 0), &priv->led_state); in mt798x_phy_hw_led_on_set()
1151 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_hw_led_blink_set()
1155 changed = !test_and_set_bit(bit_blink, &priv->led_state); in mt798x_phy_hw_led_blink_set()
1157 changed = !!test_and_clear_bit(bit_blink, &priv->led_state); in mt798x_phy_hw_led_blink_set()
1160 (index ? 16 : 0), &priv->led_state); in mt798x_phy_hw_led_blink_set()
1177 return -EINVAL; in mt798x_phy_led_blink_set()
1217 return -EINVAL; in mt798x_phy_led_hw_is_supported()
1221 return -EOPNOTSUPP; in mt798x_phy_led_hw_is_supported()
1232 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_led_hw_control_get()
1236 return -EINVAL; in mt798x_phy_led_hw_control_get()
1242 return -EIO; in mt798x_phy_led_hw_control_get()
1248 return -EIO; in mt798x_phy_led_hw_control_get()
1255 set_bit(bit_netdev, &priv->led_state); in mt798x_phy_led_hw_control_get()
1257 clear_bit(bit_netdev, &priv->led_state); in mt798x_phy_led_hw_control_get()
1260 set_bit(bit_on, &priv->led_state); in mt798x_phy_led_hw_control_get()
1262 clear_bit(bit_on, &priv->led_state); in mt798x_phy_led_hw_control_get()
1265 set_bit(bit_blink, &priv->led_state); in mt798x_phy_led_hw_control_get()
1267 clear_bit(bit_blink, &priv->led_state); in mt798x_phy_led_hw_control_get()
1303 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_led_hw_control_set()
1308 return -EINVAL; in mt798x_phy_led_hw_control_set()
1338 set_bit(bit_netdev, &priv->led_state); in mt798x_phy_led_hw_control_set()
1340 clear_bit(bit_netdev, &priv->led_state); in mt798x_phy_led_hw_control_set()
1362 struct mtk_socphy_shared *priv = phydev->shared->priv; in mt7988_phy_led_get_polarity()
1366 polarities = ~(priv->boottrap); in mt7988_phy_led_get_polarity()
1370 if (polarities & BIT(phydev->mdio.addr)) in mt7988_phy_led_get_polarity()
1390 pinctrl = devm_pinctrl_get_select(&phydev->mdio.dev, "gbe-led"); in mt7988_phy_fix_leds_polarities()
1392 dev_err(&phydev->mdio.bus->dev, "Failed to setup PHY LED pinctrl\n"); in mt7988_phy_fix_leds_polarities()
1399 struct device_node *np = dev_of_node(&phydev->mdio.bus->dev); in mt7988_phy_probe_shared()
1400 struct mtk_socphy_shared *shared = phydev->shared->priv; in mt7988_phy_probe_shared()
1411 * The detected value at boot time is accessible at run-time using the in mt7988_phy_probe_shared()
1426 shared->boottrap = FIELD_GET(RG_GPIO_MISC_TPBANK0_BOOTMODE, reg); in mt7988_phy_probe_shared()
1445 if (phydev->mdio.addr > 3) in mt7988_phy_probe()
1446 return -EINVAL; in mt7988_phy_probe()
1448 err = devm_phy_package_join(&phydev->mdio.dev, phydev, 0, in mt7988_phy_probe()
1459 shared = phydev->shared->priv; in mt7988_phy_probe()
1460 priv = &shared->priv[phydev->mdio.addr]; in mt7988_phy_probe()
1462 phydev->priv = priv; in mt7988_phy_probe()
1470 /* Disable TX power saving at probing to: in mt7988_phy_probe()
1472 * 2. Make sure that TX-VCM calibration works fine in mt7988_phy_probe()
1484 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(struct mtk_socphy_priv), in mt7981_phy_probe()
1487 return -ENOMEM; in mt7981_phy_probe()
1489 phydev->priv = priv; in mt7981_phy_probe()