Lines Matching +full:rx +full:- +full:pcs +full:- +full:input
1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
26 #include <dt-bindings/phy/phy-qcom-qmp.h>
28 #include "phy-qcom-qmp.h"
29 #include "phy-qcom-qmp-pcs-misc-v3.h"
30 #include "phy-qcom-qmp-pcs-usb-v4.h"
31 #include "phy-qcom-qmp-pcs-usb-v5.h"
32 #include "phy-qcom-qmp-pcs-usb-v6.h"
99 /* set of registers with offsets different per-PHY */
101 /* PCS registers */
1213 { .name = "vdda-phy", .enable_load = 21800 },
1214 { .name = "vdda-pll", .enable_load = 36000 },
1322 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
1374 /* Offset from PCS to PCS_USB region */
1388 void __iomem *rx; member
1389 void __iomem *pcs; member
1882 if (!(t->lane_mask & lane_mask)) in qmp_combo_configure_lane()
1885 writel(t->val, base + t->offset); in qmp_combo_configure_lane()
1898 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_dp_serdes_init()
1899 void __iomem *serdes = qmp->dp_serdes; in qmp_combo_dp_serdes_init()
1900 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_combo_dp_serdes_init()
1902 qmp_combo_configure(serdes, cfg->dp_serdes_tbl, cfg->dp_serdes_tbl_num); in qmp_combo_dp_serdes_init()
1904 switch (dp_opts->link_rate) { in qmp_combo_dp_serdes_init()
1906 qmp_combo_configure(serdes, cfg->serdes_tbl_rbr, in qmp_combo_dp_serdes_init()
1907 cfg->serdes_tbl_rbr_num); in qmp_combo_dp_serdes_init()
1910 qmp_combo_configure(serdes, cfg->serdes_tbl_hbr, in qmp_combo_dp_serdes_init()
1911 cfg->serdes_tbl_hbr_num); in qmp_combo_dp_serdes_init()
1914 qmp_combo_configure(serdes, cfg->serdes_tbl_hbr2, in qmp_combo_dp_serdes_init()
1915 cfg->serdes_tbl_hbr2_num); in qmp_combo_dp_serdes_init()
1918 qmp_combo_configure(serdes, cfg->serdes_tbl_hbr3, in qmp_combo_dp_serdes_init()
1919 cfg->serdes_tbl_hbr3_num); in qmp_combo_dp_serdes_init()
1923 return -EINVAL; in qmp_combo_dp_serdes_init()
1931 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v3_dp_aux_init()
1935 qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_v3_dp_aux_init()
1940 qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]); in qmp_v3_dp_aux_init()
1942 writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_v3_dp_aux_init()
1948 qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_v3_dp_aux_init()
1954 qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]); in qmp_v3_dp_aux_init()
1956 writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); in qmp_v3_dp_aux_init()
1957 writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); in qmp_v3_dp_aux_init()
1958 writel(0x24, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); in qmp_v3_dp_aux_init()
1959 writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG3); in qmp_v3_dp_aux_init()
1960 writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG4); in qmp_v3_dp_aux_init()
1961 writel(0x26, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG5); in qmp_v3_dp_aux_init()
1962 writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG6); in qmp_v3_dp_aux_init()
1963 writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG7); in qmp_v3_dp_aux_init()
1964 writel(0xbb, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG8); in qmp_v3_dp_aux_init()
1965 writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG9); in qmp_v3_dp_aux_init()
1966 qmp->dp_aux_cfg = 0; in qmp_v3_dp_aux_init()
1971 qmp->dp_dp_phy + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); in qmp_v3_dp_aux_init()
1976 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_combo_configure_dp_swing()
1977 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_configure_dp_swing()
1982 for (i = 0; i < dp_opts->lanes; i++) { in qmp_combo_configure_dp_swing()
1983 v_level = max(v_level, dp_opts->voltage[i]); in qmp_combo_configure_dp_swing()
1984 p_level = max(p_level, dp_opts->pre[i]); in qmp_combo_configure_dp_swing()
1987 if (dp_opts->link_rate <= 2700) { in qmp_combo_configure_dp_swing()
1988 voltage_swing_cfg = (*cfg->swing_hbr_rbr)[v_level][p_level]; in qmp_combo_configure_dp_swing()
1989 pre_emphasis_cfg = (*cfg->pre_emphasis_hbr_rbr)[v_level][p_level]; in qmp_combo_configure_dp_swing()
1991 voltage_swing_cfg = (*cfg->swing_hbr3_hbr2)[v_level][p_level]; in qmp_combo_configure_dp_swing()
1992 pre_emphasis_cfg = (*cfg->pre_emphasis_hbr3_hbr2)[v_level][p_level]; in qmp_combo_configure_dp_swing()
1997 return -EINVAL; in qmp_combo_configure_dp_swing()
2003 writel(voltage_swing_cfg, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_combo_configure_dp_swing()
2004 writel(pre_emphasis_cfg, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_combo_configure_dp_swing()
2005 writel(voltage_swing_cfg, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_combo_configure_dp_swing()
2006 writel(pre_emphasis_cfg, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_combo_configure_dp_swing()
2013 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_v3_configure_dp_tx()
2019 if (dp_opts->lanes == 1) { in qmp_v3_configure_dp_tx()
2027 writel(drvr_en, qmp->dp_tx + QSERDES_V3_TX_HIGHZ_DRVR_EN); in qmp_v3_configure_dp_tx()
2028 writel(bias_en, qmp->dp_tx + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); in qmp_v3_configure_dp_tx()
2029 writel(drvr_en, qmp->dp_tx2 + QSERDES_V3_TX_HIGHZ_DRVR_EN); in qmp_v3_configure_dp_tx()
2030 writel(bias_en, qmp->dp_tx2 + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); in qmp_v3_configure_dp_tx()
2035 bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE); in qmp_combo_configure_dp_mode()
2036 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_combo_configure_dp_mode()
2042 if (dp_opts->lanes == 4 || reverse) in qmp_combo_configure_dp_mode()
2044 if (dp_opts->lanes == 4 || !reverse) in qmp_combo_configure_dp_mode()
2047 writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_combo_configure_dp_mode()
2050 writel(0x4c, qmp->pcs + QSERDES_DP_PHY_MODE); in qmp_combo_configure_dp_mode()
2052 writel(0x5c, qmp->pcs + QSERDES_DP_PHY_MODE); in qmp_combo_configure_dp_mode()
2059 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_combo_configure_dp_clocks()
2063 switch (dp_opts->link_rate) { in qmp_combo_configure_dp_clocks()
2082 return -EINVAL; in qmp_combo_configure_dp_clocks()
2084 writel(phy_vco_div, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_VCO_DIV); in qmp_combo_configure_dp_clocks()
2086 clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); in qmp_combo_configure_dp_clocks()
2087 clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); in qmp_combo_configure_dp_clocks()
2094 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v3_configure_dp_phy()
2100 writel(0x05, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); in qmp_v3_configure_dp_phy()
2101 writel(0x05, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); in qmp_v3_configure_dp_phy()
2107 writel(0x04, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); in qmp_v3_configure_dp_phy()
2108 writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2109 writel(0x05, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2110 writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2111 writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2113 writel(0x20, qmp->dp_serdes + cfg->regs[QPHY_COM_RESETSM_CNTRL]); in qmp_v3_configure_dp_phy()
2115 if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_C_READY_STATUS], in qmp_v3_configure_dp_phy()
2120 return -ETIMEDOUT; in qmp_v3_configure_dp_phy()
2122 writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2124 if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], in qmp_v3_configure_dp_phy()
2129 return -ETIMEDOUT; in qmp_v3_configure_dp_phy()
2131 writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2133 writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2135 return readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], in qmp_v3_configure_dp_phy()
2151 qmp->dp_aux_cfg++; in qmp_v3_calibrate_dp_phy()
2152 qmp->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); in qmp_v3_calibrate_dp_phy()
2153 val = cfg1_settings[qmp->dp_aux_cfg]; in qmp_v3_calibrate_dp_phy()
2155 writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); in qmp_v3_calibrate_dp_phy()
2162 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v4_dp_aux_init()
2166 qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_v4_dp_aux_init()
2169 writel(0x17, qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]); in qmp_v4_dp_aux_init()
2171 writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); in qmp_v4_dp_aux_init()
2172 writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); in qmp_v4_dp_aux_init()
2173 writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); in qmp_v4_dp_aux_init()
2174 writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG3); in qmp_v4_dp_aux_init()
2175 writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG4); in qmp_v4_dp_aux_init()
2176 writel(0x26, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG5); in qmp_v4_dp_aux_init()
2177 writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG6); in qmp_v4_dp_aux_init()
2178 writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG7); in qmp_v4_dp_aux_init()
2179 writel(0xb7, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG8); in qmp_v4_dp_aux_init()
2180 writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG9); in qmp_v4_dp_aux_init()
2181 qmp->dp_aux_cfg = 0; in qmp_v4_dp_aux_init()
2186 qmp->dp_dp_phy + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); in qmp_v4_dp_aux_init()
2191 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v4_configure_dp_tx()
2194 writel(0x27, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_v4_configure_dp_tx()
2195 writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_v4_configure_dp_tx()
2197 writel(0x20, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_v4_configure_dp_tx()
2198 writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_v4_configure_dp_tx()
2205 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v456_configure_dp_phy()
2209 writel(0x0f, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_CFG_1); in qmp_v456_configure_dp_phy()
2213 writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); in qmp_v456_configure_dp_phy()
2214 writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); in qmp_v456_configure_dp_phy()
2216 writel(0x05, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); in qmp_v456_configure_dp_phy()
2217 writel(0x05, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); in qmp_v456_configure_dp_phy()
2223 writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v456_configure_dp_phy()
2224 writel(0x05, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v456_configure_dp_phy()
2225 writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v456_configure_dp_phy()
2226 writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v456_configure_dp_phy()
2228 writel(0x20, qmp->dp_serdes + cfg->regs[QPHY_COM_RESETSM_CNTRL]); in qmp_v456_configure_dp_phy()
2230 if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_C_READY_STATUS], in qmp_v456_configure_dp_phy()
2235 return -ETIMEDOUT; in qmp_v456_configure_dp_phy()
2237 if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_CMN_STATUS], in qmp_v456_configure_dp_phy()
2242 return -ETIMEDOUT; in qmp_v456_configure_dp_phy()
2244 if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_CMN_STATUS], in qmp_v456_configure_dp_phy()
2249 return -ETIMEDOUT; in qmp_v456_configure_dp_phy()
2251 writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v456_configure_dp_phy()
2253 if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], in qmp_v456_configure_dp_phy()
2258 return -ETIMEDOUT; in qmp_v456_configure_dp_phy()
2260 if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], in qmp_v456_configure_dp_phy()
2265 return -ETIMEDOUT; in qmp_v456_configure_dp_phy()
2272 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v4_configure_dp_phy()
2273 bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE); in qmp_v4_configure_dp_phy()
2274 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_v4_configure_dp_phy()
2288 if (dp_opts->lanes == 1) { in qmp_v4_configure_dp_phy()
2293 } else if (dp_opts->lanes == 2) { in qmp_v4_configure_dp_phy()
2305 writel(drvr0_en, qmp->dp_tx + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]); in qmp_v4_configure_dp_phy()
2306 writel(bias0_en, qmp->dp_tx + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]); in qmp_v4_configure_dp_phy()
2307 writel(drvr1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]); in qmp_v4_configure_dp_phy()
2308 writel(bias1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]); in qmp_v4_configure_dp_phy()
2310 writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v4_configure_dp_phy()
2312 writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v4_configure_dp_phy()
2314 if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], in qmp_v4_configure_dp_phy()
2319 return -ETIMEDOUT; in qmp_v4_configure_dp_phy()
2321 writel(0x0a, qmp->dp_tx + cfg->regs[QPHY_TX_TX_POL_INV]); in qmp_v4_configure_dp_phy()
2322 writel(0x0a, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_POL_INV]); in qmp_v4_configure_dp_phy()
2324 writel(0x27, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_v4_configure_dp_phy()
2325 writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_v4_configure_dp_phy()
2327 writel(0x20, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_v4_configure_dp_phy()
2328 writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_v4_configure_dp_phy()
2344 qmp->dp_aux_cfg++; in qmp_v4_calibrate_dp_phy()
2345 qmp->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); in qmp_v4_calibrate_dp_phy()
2346 val = cfg1_settings[qmp->dp_aux_cfg]; in qmp_v4_calibrate_dp_phy()
2348 writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); in qmp_v4_calibrate_dp_phy()
2355 const struct phy_configure_opts_dp *dp_opts = &opts->dp; in qmp_combo_dp_configure()
2357 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_dp_configure()
2359 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_configure()
2361 memcpy(&qmp->dp_opts, dp_opts, sizeof(*dp_opts)); in qmp_combo_dp_configure()
2362 if (qmp->dp_opts.set_voltages) { in qmp_combo_dp_configure()
2363 cfg->configure_dp_tx(qmp); in qmp_combo_dp_configure()
2364 qmp->dp_opts.set_voltages = 0; in qmp_combo_dp_configure()
2367 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_configure()
2375 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_dp_calibrate()
2378 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_calibrate()
2380 if (cfg->calibrate_dp_phy) in qmp_combo_dp_calibrate()
2381 ret = cfg->calibrate_dp_phy(qmp); in qmp_combo_dp_calibrate()
2383 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_calibrate()
2390 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_com_init()
2391 void __iomem *com = qmp->com; in qmp_combo_com_init()
2395 if (!force && qmp->init_count++) in qmp_combo_com_init()
2398 ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs); in qmp_combo_com_init()
2400 dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret); in qmp_combo_com_init()
2404 ret = reset_control_bulk_assert(cfg->num_resets, qmp->resets); in qmp_combo_com_init()
2406 dev_err(qmp->dev, "reset assert failed\n"); in qmp_combo_com_init()
2410 ret = reset_control_bulk_deassert(cfg->num_resets, qmp->resets); in qmp_combo_com_init()
2412 dev_err(qmp->dev, "reset deassert failed\n"); in qmp_combo_com_init()
2416 ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks); in qmp_combo_com_init()
2429 if (qmp->orientation == TYPEC_ORIENTATION_REVERSE) in qmp_combo_com_init()
2434 /* bring both QMP USB and QMP DP PHYs PCS block out of reset */ in qmp_combo_com_init()
2442 qphy_setbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], in qmp_combo_com_init()
2448 reset_control_bulk_assert(cfg->num_resets, qmp->resets); in qmp_combo_com_init()
2450 regulator_bulk_disable(cfg->num_vregs, qmp->vregs); in qmp_combo_com_init()
2452 qmp->init_count--; in qmp_combo_com_init()
2459 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_com_exit()
2461 if (!force && --qmp->init_count) in qmp_combo_com_exit()
2464 reset_control_bulk_assert(cfg->num_resets, qmp->resets); in qmp_combo_com_exit()
2466 clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); in qmp_combo_com_exit()
2468 regulator_bulk_disable(cfg->num_vregs, qmp->vregs); in qmp_combo_com_exit()
2476 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_dp_init()
2479 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_init()
2485 cfg->dp_aux_init(qmp); in qmp_combo_dp_init()
2487 qmp->dp_init_count++; in qmp_combo_dp_init()
2490 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_init()
2498 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_exit()
2502 qmp->dp_init_count--; in qmp_combo_dp_exit()
2504 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_exit()
2512 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_dp_power_on()
2513 void __iomem *tx = qmp->dp_tx; in qmp_combo_dp_power_on()
2514 void __iomem *tx2 = qmp->dp_tx2; in qmp_combo_dp_power_on()
2516 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_power_on()
2520 qmp_combo_configure_lane(tx, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 1); in qmp_combo_dp_power_on()
2521 qmp_combo_configure_lane(tx2, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 2); in qmp_combo_dp_power_on()
2524 cfg->configure_dp_tx(qmp); in qmp_combo_dp_power_on()
2527 cfg->configure_dp_phy(qmp); in qmp_combo_dp_power_on()
2529 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_power_on()
2538 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_power_off()
2541 writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_combo_dp_power_off()
2543 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_power_off()
2551 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_usb_power_on()
2552 void __iomem *serdes = qmp->serdes; in qmp_combo_usb_power_on()
2553 void __iomem *tx = qmp->tx; in qmp_combo_usb_power_on()
2554 void __iomem *rx = qmp->rx; in qmp_combo_usb_power_on() local
2555 void __iomem *tx2 = qmp->tx2; in qmp_combo_usb_power_on()
2556 void __iomem *rx2 = qmp->rx2; in qmp_combo_usb_power_on()
2557 void __iomem *pcs = qmp->pcs; in qmp_combo_usb_power_on() local
2558 void __iomem *pcs_usb = qmp->pcs_usb; in qmp_combo_usb_power_on()
2563 qmp_combo_configure(serdes, cfg->serdes_tbl, cfg->serdes_tbl_num); in qmp_combo_usb_power_on()
2565 ret = clk_prepare_enable(qmp->pipe_clk); in qmp_combo_usb_power_on()
2567 dev_err(qmp->dev, "pipe_clk enable failed err=%d\n", ret); in qmp_combo_usb_power_on()
2571 /* Tx, Rx, and PCS configurations */ in qmp_combo_usb_power_on()
2572 qmp_combo_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); in qmp_combo_usb_power_on()
2573 qmp_combo_configure_lane(tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); in qmp_combo_usb_power_on()
2575 qmp_combo_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); in qmp_combo_usb_power_on()
2576 qmp_combo_configure_lane(rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2); in qmp_combo_usb_power_on()
2578 qmp_combo_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); in qmp_combo_usb_power_on()
2581 qmp_combo_configure(pcs_usb, cfg->pcs_usb_tbl, cfg->pcs_usb_tbl_num); in qmp_combo_usb_power_on()
2583 if (cfg->has_pwrdn_delay) in qmp_combo_usb_power_on()
2587 qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_combo_usb_power_on()
2589 /* start SerDes and Phy-Coding-Sublayer */ in qmp_combo_usb_power_on()
2590 qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], SERDES_START | PCS_START); in qmp_combo_usb_power_on()
2592 status = pcs + cfg->regs[QPHY_PCS_STATUS]; in qmp_combo_usb_power_on()
2596 dev_err(qmp->dev, "phy initialization timed-out\n"); in qmp_combo_usb_power_on()
2603 clk_disable_unprepare(qmp->pipe_clk); in qmp_combo_usb_power_on()
2611 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_usb_power_off()
2613 clk_disable_unprepare(qmp->pipe_clk); in qmp_combo_usb_power_off()
2616 qphy_setbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_combo_usb_power_off()
2618 /* stop SerDes and Phy-Coding-Sublayer */ in qmp_combo_usb_power_off()
2619 qphy_clrbits(qmp->pcs, cfg->regs[QPHY_START_CTRL], in qmp_combo_usb_power_off()
2623 qphy_clrbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], in qmp_combo_usb_power_off()
2634 mutex_lock(&qmp->phy_mutex); in qmp_combo_usb_init()
2645 qmp->usb_init_count++; in qmp_combo_usb_init()
2648 mutex_unlock(&qmp->phy_mutex); in qmp_combo_usb_init()
2657 mutex_lock(&qmp->phy_mutex); in qmp_combo_usb_exit()
2666 qmp->usb_init_count--; in qmp_combo_usb_exit()
2669 mutex_unlock(&qmp->phy_mutex); in qmp_combo_usb_exit()
2677 qmp->mode = mode; in qmp_combo_usb_set_mode()
2701 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_enable_autonomous_mode()
2702 void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs; in qmp_combo_enable_autonomous_mode()
2703 void __iomem *pcs_misc = qmp->pcs_misc; in qmp_combo_enable_autonomous_mode()
2706 if (qmp->mode == PHY_MODE_USB_HOST_SS || in qmp_combo_enable_autonomous_mode()
2707 qmp->mode == PHY_MODE_USB_DEVICE_SS) in qmp_combo_enable_autonomous_mode()
2713 qphy_setbits(pcs_usb, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qmp_combo_enable_autonomous_mode()
2715 qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qmp_combo_enable_autonomous_mode()
2717 qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], in qmp_combo_enable_autonomous_mode()
2721 qphy_setbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], intr_mask); in qmp_combo_enable_autonomous_mode()
2730 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_disable_autonomous_mode()
2731 void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs; in qmp_combo_disable_autonomous_mode()
2732 void __iomem *pcs_misc = qmp->pcs_misc; in qmp_combo_disable_autonomous_mode()
2738 qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], in qmp_combo_disable_autonomous_mode()
2741 qphy_setbits(pcs_usb, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qmp_combo_disable_autonomous_mode()
2743 qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qmp_combo_disable_autonomous_mode()
2750 dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qmp->mode); in qmp_combo_runtime_suspend()
2752 if (!qmp->init_count) { in qmp_combo_runtime_suspend()
2759 clk_disable_unprepare(qmp->pipe_clk); in qmp_combo_runtime_suspend()
2760 clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); in qmp_combo_runtime_suspend()
2770 dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qmp->mode); in qmp_combo_runtime_resume()
2772 if (!qmp->init_count) { in qmp_combo_runtime_resume()
2777 ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks); in qmp_combo_runtime_resume()
2781 ret = clk_prepare_enable(qmp->pipe_clk); in qmp_combo_runtime_resume()
2784 clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); in qmp_combo_runtime_resume()
2800 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_vreg_init()
2801 struct device *dev = qmp->dev; in qmp_combo_vreg_init()
2802 int num = cfg->num_vregs; in qmp_combo_vreg_init()
2805 qmp->vregs = devm_kcalloc(dev, num, sizeof(*qmp->vregs), GFP_KERNEL); in qmp_combo_vreg_init()
2806 if (!qmp->vregs) in qmp_combo_vreg_init()
2807 return -ENOMEM; in qmp_combo_vreg_init()
2810 qmp->vregs[i].supply = cfg->vreg_list[i].name; in qmp_combo_vreg_init()
2812 ret = devm_regulator_bulk_get(dev, num, qmp->vregs); in qmp_combo_vreg_init()
2819 ret = regulator_set_load(qmp->vregs[i].consumer, in qmp_combo_vreg_init()
2820 cfg->vreg_list[i].enable_load); in qmp_combo_vreg_init()
2823 qmp->vregs[i].supply); in qmp_combo_vreg_init()
2833 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_reset_init()
2834 struct device *dev = qmp->dev; in qmp_combo_reset_init()
2838 qmp->resets = devm_kcalloc(dev, cfg->num_resets, in qmp_combo_reset_init()
2839 sizeof(*qmp->resets), GFP_KERNEL); in qmp_combo_reset_init()
2840 if (!qmp->resets) in qmp_combo_reset_init()
2841 return -ENOMEM; in qmp_combo_reset_init()
2843 for (i = 0; i < cfg->num_resets; i++) in qmp_combo_reset_init()
2844 qmp->resets[i].id = cfg->reset_list[i]; in qmp_combo_reset_init()
2846 ret = devm_reset_control_bulk_get_exclusive(dev, cfg->num_resets, qmp->resets); in qmp_combo_reset_init()
2855 struct device *dev = qmp->dev; in qmp_combo_clk_init()
2859 qmp->clks = devm_kcalloc(dev, num, sizeof(*qmp->clks), GFP_KERNEL); in qmp_combo_clk_init()
2860 if (!qmp->clks) in qmp_combo_clk_init()
2861 return -ENOMEM; in qmp_combo_clk_init()
2864 qmp->clks[i].id = qmp_combo_phy_clk_l[i]; in qmp_combo_clk_init()
2866 qmp->num_clks = num; in qmp_combo_clk_init()
2868 return devm_clk_bulk_get_optional(dev, num, qmp->clks); in qmp_combo_clk_init()
2886 * +---------------+
2887 * | PHY block |<<---------------------------------------+
2889 * | +-------+ | +-----+ |
2890 * I/P---^-->| PLL |---^--->pipe_clksrc--->| GCC |--->pipe_clk---+
2891 * clk | +-------+ | +-----+
2892 * +---------------+
2896 struct clk_fixed_rate *fixed = &qmp->pipe_clk_fixed; in phy_pipe_clk_register()
2900 snprintf(name, sizeof(name), "%s::pipe_clk", dev_name(qmp->dev)); in phy_pipe_clk_register()
2905 fixed->fixed_rate = 125000000; in phy_pipe_clk_register()
2906 fixed->hw.init = &init; in phy_pipe_clk_register()
2908 return devm_clk_hw_register(qmp->dev, &fixed->hw); in phy_pipe_clk_register()
2914 * +------------------------------+
2917 * | +-------------------+ |
2919 * | +---------+---------+ |
2921 * | +----------+-----------+ |
2923 * | +----------+-----------+ |
2924 * +------------------------------+
2926 * +---------<---------v------------>----------+
2928 * +--------v----------------+ |
2931 * +--------+----------------+ |
2935 * Input to DISPCC block |
2940 * +--------<------------+-----------------+---<---+
2942 * +----v---------+ +--------v-----+ +--------v------+
2947 * +-------+------+ +-----+--------+ +--------+------+
2949 * v---->----------v-------------<------v
2951 * +----------+-----------------+
2953 * +---------+------------------+
2956 * Input to DISPCC block
2962 switch (req->rate) { in qmp_dp_pixel_clk_determine_rate()
2968 return -EINVAL; in qmp_dp_pixel_clk_determine_rate()
2978 dp_opts = &qmp->dp_opts; in qmp_dp_pixel_clk_recalc_rate()
2980 switch (dp_opts->link_rate) { in qmp_dp_pixel_clk_recalc_rate()
3001 switch (req->rate) { in qmp_dp_link_clk_determine_rate()
3008 return -EINVAL; in qmp_dp_link_clk_determine_rate()
3018 dp_opts = &qmp->dp_opts; in qmp_dp_link_clk_recalc_rate()
3020 switch (dp_opts->link_rate) { in qmp_dp_link_clk_recalc_rate()
3025 return dp_opts->link_rate * 100000; in qmp_dp_link_clk_recalc_rate()
3039 unsigned int idx = clkspec->args[0]; in qmp_dp_clks_hw_get()
3043 return ERR_PTR(-EINVAL); in qmp_dp_clks_hw_get()
3047 return &qmp->dp_link_hw; in qmp_dp_clks_hw_get()
3049 return &qmp->dp_pixel_hw; in qmp_dp_clks_hw_get()
3058 snprintf(name, sizeof(name), "%s::link_clk", dev_name(qmp->dev)); in phy_dp_clks_register()
3061 qmp->dp_link_hw.init = &init; in phy_dp_clks_register()
3062 ret = devm_clk_hw_register(qmp->dev, &qmp->dp_link_hw); in phy_dp_clks_register()
3066 snprintf(name, sizeof(name), "%s::vco_div_clk", dev_name(qmp->dev)); in phy_dp_clks_register()
3069 qmp->dp_pixel_hw.init = &init; in phy_dp_clks_register()
3070 ret = devm_clk_hw_register(qmp->dev, &qmp->dp_pixel_hw); in phy_dp_clks_register()
3081 switch (clkspec->args[0]) { in qmp_combo_clk_hw_get()
3083 return &qmp->pipe_clk_fixed.hw; in qmp_combo_clk_hw_get()
3085 return &qmp->dp_link_hw; in qmp_combo_clk_hw_get()
3087 return &qmp->dp_pixel_hw; in qmp_combo_clk_hw_get()
3090 return ERR_PTR(-EINVAL); in qmp_combo_clk_hw_get()
3109 if (usb_np == qmp->dev->of_node) in qmp_combo_register_clocks()
3110 return devm_of_clk_add_hw_provider(qmp->dev, qmp_combo_clk_hw_get, qmp); in qmp_combo_register_clocks()
3116 &qmp->pipe_clk_fixed.hw); in qmp_combo_register_clocks()
3124 ret = devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, usb_np); in qmp_combo_register_clocks()
3132 return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, dp_np); in qmp_combo_register_clocks()
3140 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_typec_switch_set()
3142 if (orientation == qmp->orientation || orientation == TYPEC_ORIENTATION_NONE) in qmp_combo_typec_switch_set()
3145 mutex_lock(&qmp->phy_mutex); in qmp_combo_typec_switch_set()
3146 qmp->orientation = orientation; in qmp_combo_typec_switch_set()
3148 if (qmp->init_count) { in qmp_combo_typec_switch_set()
3149 if (qmp->usb_init_count) in qmp_combo_typec_switch_set()
3150 qmp_combo_usb_power_off(qmp->usb_phy); in qmp_combo_typec_switch_set()
3154 if (qmp->usb_init_count) in qmp_combo_typec_switch_set()
3155 qmp_combo_usb_power_on(qmp->usb_phy); in qmp_combo_typec_switch_set()
3156 if (qmp->dp_init_count) in qmp_combo_typec_switch_set()
3157 cfg->dp_aux_init(qmp); in qmp_combo_typec_switch_set()
3159 mutex_unlock(&qmp->phy_mutex); in qmp_combo_typec_switch_set()
3168 typec_switch_unregister(qmp->sw); in qmp_combo_typec_unregister()
3174 struct device *dev = qmp->dev; in qmp_combo_typec_switch_register()
3177 sw_desc.fwnode = dev->fwnode; in qmp_combo_typec_switch_register()
3179 qmp->sw = typec_switch_register(dev, &sw_desc); in qmp_combo_typec_switch_register()
3180 if (IS_ERR(qmp->sw)) { in qmp_combo_typec_switch_register()
3181 dev_err(dev, "Unable to register typec switch: %pe\n", qmp->sw); in qmp_combo_typec_switch_register()
3182 return PTR_ERR(qmp->sw); in qmp_combo_typec_switch_register()
3202 return -EINVAL; in qmp_combo_bridge_attach()
3204 next_bridge = devm_drm_of_get_bridge(qmp->dev, qmp->dev->of_node, 0, 0); in qmp_combo_bridge_attach()
3206 dev_err(qmp->dev, "failed to acquire drm_bridge: %pe\n", next_bridge); in qmp_combo_bridge_attach()
3210 return drm_bridge_attach(bridge->encoder, next_bridge, bridge, in qmp_combo_bridge_attach()
3220 qmp->bridge.funcs = &qmp_combo_bridge_funcs; in qmp_combo_dp_register_bridge()
3221 qmp->bridge.of_node = qmp->dev->of_node; in qmp_combo_dp_register_bridge()
3223 return devm_drm_bridge_add(qmp->dev, &qmp->bridge); in qmp_combo_dp_register_bridge()
3234 struct device *dev = qmp->dev; in qmp_combo_parse_dt_lecacy_dp()
3238 * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2; in qmp_combo_parse_dt_lecacy_dp()
3239 * tx2 -> 3; rx2 -> 4 in qmp_combo_parse_dt_lecacy_dp()
3241 * Note that only tx/tx2 and pcs (dp_phy) are used by the DP in qmp_combo_parse_dt_lecacy_dp()
3244 qmp->dp_tx = devm_of_iomap(dev, np, 0, NULL); in qmp_combo_parse_dt_lecacy_dp()
3245 if (IS_ERR(qmp->dp_tx)) in qmp_combo_parse_dt_lecacy_dp()
3246 return PTR_ERR(qmp->dp_tx); in qmp_combo_parse_dt_lecacy_dp()
3248 qmp->dp_dp_phy = devm_of_iomap(dev, np, 2, NULL); in qmp_combo_parse_dt_lecacy_dp()
3249 if (IS_ERR(qmp->dp_dp_phy)) in qmp_combo_parse_dt_lecacy_dp()
3250 return PTR_ERR(qmp->dp_dp_phy); in qmp_combo_parse_dt_lecacy_dp()
3252 qmp->dp_tx2 = devm_of_iomap(dev, np, 3, NULL); in qmp_combo_parse_dt_lecacy_dp()
3253 if (IS_ERR(qmp->dp_tx2)) in qmp_combo_parse_dt_lecacy_dp()
3254 return PTR_ERR(qmp->dp_tx2); in qmp_combo_parse_dt_lecacy_dp()
3261 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_parse_dt_lecacy_usb()
3262 struct device *dev = qmp->dev; in qmp_combo_parse_dt_lecacy_usb()
3266 * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2; in qmp_combo_parse_dt_lecacy_usb()
3267 * tx2 -> 3; rx2 -> 4; pcs_misc (optional) -> 5 in qmp_combo_parse_dt_lecacy_usb()
3269 qmp->tx = devm_of_iomap(dev, np, 0, NULL); in qmp_combo_parse_dt_lecacy_usb()
3270 if (IS_ERR(qmp->tx)) in qmp_combo_parse_dt_lecacy_usb()
3271 return PTR_ERR(qmp->tx); in qmp_combo_parse_dt_lecacy_usb()
3273 qmp->rx = devm_of_iomap(dev, np, 1, NULL); in qmp_combo_parse_dt_lecacy_usb()
3274 if (IS_ERR(qmp->rx)) in qmp_combo_parse_dt_lecacy_usb()
3275 return PTR_ERR(qmp->rx); in qmp_combo_parse_dt_lecacy_usb()
3277 qmp->pcs = devm_of_iomap(dev, np, 2, NULL); in qmp_combo_parse_dt_lecacy_usb()
3278 if (IS_ERR(qmp->pcs)) in qmp_combo_parse_dt_lecacy_usb()
3279 return PTR_ERR(qmp->pcs); in qmp_combo_parse_dt_lecacy_usb()
3281 if (cfg->pcs_usb_offset) in qmp_combo_parse_dt_lecacy_usb()
3282 qmp->pcs_usb = qmp->pcs + cfg->pcs_usb_offset; in qmp_combo_parse_dt_lecacy_usb()
3284 qmp->tx2 = devm_of_iomap(dev, np, 3, NULL); in qmp_combo_parse_dt_lecacy_usb()
3285 if (IS_ERR(qmp->tx2)) in qmp_combo_parse_dt_lecacy_usb()
3286 return PTR_ERR(qmp->tx2); in qmp_combo_parse_dt_lecacy_usb()
3288 qmp->rx2 = devm_of_iomap(dev, np, 4, NULL); in qmp_combo_parse_dt_lecacy_usb()
3289 if (IS_ERR(qmp->rx2)) in qmp_combo_parse_dt_lecacy_usb()
3290 return PTR_ERR(qmp->rx2); in qmp_combo_parse_dt_lecacy_usb()
3292 qmp->pcs_misc = devm_of_iomap(dev, np, 5, NULL); in qmp_combo_parse_dt_lecacy_usb()
3293 if (IS_ERR(qmp->pcs_misc)) { in qmp_combo_parse_dt_lecacy_usb()
3294 dev_vdbg(dev, "PHY pcs_misc-reg not used\n"); in qmp_combo_parse_dt_lecacy_usb()
3295 qmp->pcs_misc = NULL; in qmp_combo_parse_dt_lecacy_usb()
3298 qmp->pipe_clk = devm_get_clk_from_child(dev, np, NULL); in qmp_combo_parse_dt_lecacy_usb()
3299 if (IS_ERR(qmp->pipe_clk)) { in qmp_combo_parse_dt_lecacy_usb()
3300 return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), in qmp_combo_parse_dt_lecacy_usb()
3310 struct platform_device *pdev = to_platform_device(qmp->dev); in qmp_combo_parse_dt_legacy()
3313 qmp->serdes = devm_platform_ioremap_resource(pdev, 0); in qmp_combo_parse_dt_legacy()
3314 if (IS_ERR(qmp->serdes)) in qmp_combo_parse_dt_legacy()
3315 return PTR_ERR(qmp->serdes); in qmp_combo_parse_dt_legacy()
3317 qmp->com = devm_platform_ioremap_resource(pdev, 1); in qmp_combo_parse_dt_legacy()
3318 if (IS_ERR(qmp->com)) in qmp_combo_parse_dt_legacy()
3319 return PTR_ERR(qmp->com); in qmp_combo_parse_dt_legacy()
3321 qmp->dp_serdes = devm_platform_ioremap_resource(pdev, 2); in qmp_combo_parse_dt_legacy()
3322 if (IS_ERR(qmp->dp_serdes)) in qmp_combo_parse_dt_legacy()
3323 return PTR_ERR(qmp->dp_serdes); in qmp_combo_parse_dt_legacy()
3333 ret = devm_clk_bulk_get_all(qmp->dev, &qmp->clks); in qmp_combo_parse_dt_legacy()
3337 qmp->num_clks = ret; in qmp_combo_parse_dt_legacy()
3344 struct platform_device *pdev = to_platform_device(qmp->dev); in qmp_combo_parse_dt()
3345 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_parse_dt()
3346 const struct qmp_combo_offsets *offs = cfg->offsets; in qmp_combo_parse_dt()
3347 struct device *dev = qmp->dev; in qmp_combo_parse_dt()
3352 return -EINVAL; in qmp_combo_parse_dt()
3358 qmp->com = base + offs->com; in qmp_combo_parse_dt()
3359 qmp->tx = base + offs->txa; in qmp_combo_parse_dt()
3360 qmp->rx = base + offs->rxa; in qmp_combo_parse_dt()
3361 qmp->tx2 = base + offs->txb; in qmp_combo_parse_dt()
3362 qmp->rx2 = base + offs->rxb; in qmp_combo_parse_dt()
3364 qmp->serdes = base + offs->usb3_serdes; in qmp_combo_parse_dt()
3365 qmp->pcs_misc = base + offs->usb3_pcs_misc; in qmp_combo_parse_dt()
3366 qmp->pcs = base + offs->usb3_pcs; in qmp_combo_parse_dt()
3367 qmp->pcs_usb = base + offs->usb3_pcs_usb; in qmp_combo_parse_dt()
3369 qmp->dp_serdes = base + offs->dp_serdes; in qmp_combo_parse_dt()
3370 if (offs->dp_txa) { in qmp_combo_parse_dt()
3371 qmp->dp_tx = base + offs->dp_txa; in qmp_combo_parse_dt()
3372 qmp->dp_tx2 = base + offs->dp_txb; in qmp_combo_parse_dt()
3374 qmp->dp_tx = base + offs->txa; in qmp_combo_parse_dt()
3375 qmp->dp_tx2 = base + offs->txb; in qmp_combo_parse_dt()
3377 qmp->dp_dp_phy = base + offs->dp_dp_phy; in qmp_combo_parse_dt()
3383 qmp->pipe_clk = devm_clk_get(dev, "usb3_pipe"); in qmp_combo_parse_dt()
3384 if (IS_ERR(qmp->pipe_clk)) { in qmp_combo_parse_dt()
3385 return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), in qmp_combo_parse_dt()
3396 if (args->args_count == 0) in qmp_combo_phy_xlate()
3397 return ERR_PTR(-EINVAL); in qmp_combo_phy_xlate()
3399 switch (args->args[0]) { in qmp_combo_phy_xlate()
3401 return qmp->usb_phy; in qmp_combo_phy_xlate()
3403 return qmp->dp_phy; in qmp_combo_phy_xlate()
3406 return ERR_PTR(-EINVAL); in qmp_combo_phy_xlate()
3412 struct device *dev = &pdev->dev; in qmp_combo_probe()
3419 return -ENOMEM; in qmp_combo_probe()
3421 qmp->dev = dev; in qmp_combo_probe()
3423 qmp->orientation = TYPEC_ORIENTATION_NORMAL; in qmp_combo_probe()
3425 qmp->cfg = of_device_get_match_data(dev); in qmp_combo_probe()
3426 if (!qmp->cfg) in qmp_combo_probe()
3427 return -EINVAL; in qmp_combo_probe()
3429 mutex_init(&qmp->phy_mutex); in qmp_combo_probe()
3448 usb_np = of_get_child_by_name(dev->of_node, "usb3-phy"); in qmp_combo_probe()
3450 dp_np = of_get_child_by_name(dev->of_node, "dp-phy"); in qmp_combo_probe()
3453 return -EINVAL; in qmp_combo_probe()
3458 usb_np = of_node_get(dev->of_node); in qmp_combo_probe()
3459 dp_np = of_node_get(dev->of_node); in qmp_combo_probe()
3480 qmp->usb_phy = devm_phy_create(dev, usb_np, &qmp_combo_usb_phy_ops); in qmp_combo_probe()
3481 if (IS_ERR(qmp->usb_phy)) { in qmp_combo_probe()
3482 ret = PTR_ERR(qmp->usb_phy); in qmp_combo_probe()
3487 phy_set_drvdata(qmp->usb_phy, qmp); in qmp_combo_probe()
3489 qmp->dp_phy = devm_phy_create(dev, dp_np, &qmp_combo_dp_phy_ops); in qmp_combo_probe()
3490 if (IS_ERR(qmp->dp_phy)) { in qmp_combo_probe()
3491 ret = PTR_ERR(qmp->dp_phy); in qmp_combo_probe()
3496 phy_set_drvdata(qmp->dp_phy, qmp); in qmp_combo_probe()
3500 if (usb_np == dev->of_node) in qmp_combo_probe()
3518 .compatible = "qcom,sc7180-qmp-usb3-dp-phy",
3522 .compatible = "qcom,sc7280-qmp-usb3-dp-phy",
3526 .compatible = "qcom,sc8180x-qmp-usb3-dp-phy",
3530 .compatible = "qcom,sc8280xp-qmp-usb43dp-phy",
3534 .compatible = "qcom,sdm845-qmp-usb3-dp-phy",
3538 .compatible = "qcom,sm6350-qmp-usb3-dp-phy",
3542 .compatible = "qcom,sm8150-qmp-usb3-dp-phy",
3546 .compatible = "qcom,sm8250-qmp-usb3-dp-phy",
3550 .compatible = "qcom,sm8350-qmp-usb3-dp-phy",
3554 .compatible = "qcom,sm8450-qmp-usb3-dp-phy",
3558 .compatible = "qcom,sm8550-qmp-usb3-dp-phy",
3568 .name = "qcom-qmp-combo-phy",