1 // SPDX-License-Identifier: GPL-2.0
59 	iowrite32(bank, channel->addr + R8A779F0_ETH_SERDES_BANK_SELECT);  in r8a779f0_eth_serdes_reg_wait()
61 	ret = readl_poll_timeout_atomic(channel->addr + offs, val,  in r8a779f0_eth_serdes_reg_wait()
65 		dev_dbg(&channel->phy->dev,  in r8a779f0_eth_serdes_reg_wait()
67 			 __func__, channel->index, offs, bank, mask, expected);  in r8a779f0_eth_serdes_reg_wait()
79 		channel = &dd->channel[i];  in r8a779f0_eth_serdes_common_init_ram()
85 	r8a779f0_eth_serdes_write32(dd->addr, 0x026c, 0x180, 0x03);  in r8a779f0_eth_serdes_common_init_ram()
93 	struct r8a779f0_eth_serdes_drv_data *dd = channel->dd;  in r8a779f0_eth_serdes_common_setting()
95 	switch (channel->phy_interface) {  in r8a779f0_eth_serdes_common_setting()
97 		r8a779f0_eth_serdes_write32(dd->addr, 0x0244, 0x180, 0x0097);  in r8a779f0_eth_serdes_common_setting()
98 		r8a779f0_eth_serdes_write32(dd->addr, 0x01d0, 0x180, 0x0060);  in r8a779f0_eth_serdes_common_setting()
99 		r8a779f0_eth_serdes_write32(dd->addr, 0x01d8, 0x180, 0x2200);  in r8a779f0_eth_serdes_common_setting()
100 		r8a779f0_eth_serdes_write32(dd->addr, 0x01d4, 0x180, 0x0000);  in r8a779f0_eth_serdes_common_setting()
101 		r8a779f0_eth_serdes_write32(dd->addr, 0x01e0, 0x180, 0x003d);  in r8a779f0_eth_serdes_common_setting()
104 		return -EOPNOTSUPP;  in r8a779f0_eth_serdes_common_setting()
113 	switch (channel->phy_interface) {  in r8a779f0_eth_serdes_chan_setting()
115 		r8a779f0_eth_serdes_write32(channel->addr, 0x0000, 0x380, 0x2000);  in r8a779f0_eth_serdes_chan_setting()
116 		r8a779f0_eth_serdes_write32(channel->addr, 0x01c0, 0x180, 0x0011);  in r8a779f0_eth_serdes_chan_setting()
117 		r8a779f0_eth_serdes_write32(channel->addr, 0x0248, 0x180, 0x0540);  in r8a779f0_eth_serdes_chan_setting()
118 		r8a779f0_eth_serdes_write32(channel->addr, 0x0258, 0x180, 0x0015);  in r8a779f0_eth_serdes_chan_setting()
119 		r8a779f0_eth_serdes_write32(channel->addr, 0x0144, 0x180, 0x0100);  in r8a779f0_eth_serdes_chan_setting()
120 		r8a779f0_eth_serdes_write32(channel->addr, 0x01a0, 0x180, 0x0000);  in r8a779f0_eth_serdes_chan_setting()
121 		r8a779f0_eth_serdes_write32(channel->addr, 0x00d0, 0x180, 0x0002);  in r8a779f0_eth_serdes_chan_setting()
122 		r8a779f0_eth_serdes_write32(channel->addr, 0x0150, 0x180, 0x0003);  in r8a779f0_eth_serdes_chan_setting()
123 		r8a779f0_eth_serdes_write32(channel->addr, 0x00c8, 0x180, 0x0100);  in r8a779f0_eth_serdes_chan_setting()
124 		r8a779f0_eth_serdes_write32(channel->addr, 0x0148, 0x180, 0x0100);  in r8a779f0_eth_serdes_chan_setting()
125 		r8a779f0_eth_serdes_write32(channel->addr, 0x0174, 0x180, 0x0000);  in r8a779f0_eth_serdes_chan_setting()
126 		r8a779f0_eth_serdes_write32(channel->addr, 0x0160, 0x180, 0x0007);  in r8a779f0_eth_serdes_chan_setting()
127 		r8a779f0_eth_serdes_write32(channel->addr, 0x01ac, 0x180, 0x0000);  in r8a779f0_eth_serdes_chan_setting()
128 		r8a779f0_eth_serdes_write32(channel->addr, 0x00c4, 0x180, 0x0310);  in r8a779f0_eth_serdes_chan_setting()
129 		r8a779f0_eth_serdes_write32(channel->addr, 0x00c8, 0x180, 0x0101);  in r8a779f0_eth_serdes_chan_setting()
134 		r8a779f0_eth_serdes_write32(channel->addr, 0x0148, 0x180, 0x0101);  in r8a779f0_eth_serdes_chan_setting()
139 		r8a779f0_eth_serdes_write32(channel->addr, 0x00c4, 0x180, 0x1310);  in r8a779f0_eth_serdes_chan_setting()
140 		r8a779f0_eth_serdes_write32(channel->addr, 0x00d8, 0x180, 0x1800);  in r8a779f0_eth_serdes_chan_setting()
141 		r8a779f0_eth_serdes_write32(channel->addr, 0x00dc, 0x180, 0x0000);  in r8a779f0_eth_serdes_chan_setting()
142 		r8a779f0_eth_serdes_write32(channel->addr, 0x001c, 0x300, 0x0001);  in r8a779f0_eth_serdes_chan_setting()
143 		r8a779f0_eth_serdes_write32(channel->addr, 0x0000, 0x380, 0x2100);  in r8a779f0_eth_serdes_chan_setting()
148 		if (channel->speed == 1000)  in r8a779f0_eth_serdes_chan_setting()
149 			r8a779f0_eth_serdes_write32(channel->addr, 0x0000, 0x1f00, 0x0140);  in r8a779f0_eth_serdes_chan_setting()
150 		else if (channel->speed == 100)  in r8a779f0_eth_serdes_chan_setting()
151 			r8a779f0_eth_serdes_write32(channel->addr, 0x0000, 0x1f00, 0x2100);  in r8a779f0_eth_serdes_chan_setting()
154 		r8a779f0_eth_serdes_write32(channel->addr, 0x0004, 0x1f80, 0x0005);  in r8a779f0_eth_serdes_chan_setting()
155 		r8a779f0_eth_serdes_write32(channel->addr, 0x0028, 0x1f80, 0x07a1);  in r8a779f0_eth_serdes_chan_setting()
156 		r8a779f0_eth_serdes_write32(channel->addr, 0x0000, 0x1f80, 0x0208);  in r8a779f0_eth_serdes_chan_setting()
159 		return -EOPNOTSUPP;  in r8a779f0_eth_serdes_chan_setting()
170 	switch (channel->phy_interface) {  in r8a779f0_eth_serdes_chan_speed()
173 		if (channel->speed == 1000)  in r8a779f0_eth_serdes_chan_speed()
174 			r8a779f0_eth_serdes_write32(channel->addr, 0x0000, 0x1f00, 0x1140);  in r8a779f0_eth_serdes_chan_speed()
175 		else if (channel->speed == 100)  in r8a779f0_eth_serdes_chan_speed()
176 			r8a779f0_eth_serdes_write32(channel->addr, 0x0000, 0x1f00, 0x3100);  in r8a779f0_eth_serdes_chan_speed()
180 		r8a779f0_eth_serdes_write32(channel->addr, 0x0008, 0x1f80, 0x0000);  in r8a779f0_eth_serdes_chan_speed()
183 		return -EOPNOTSUPP;  in r8a779f0_eth_serdes_chan_speed()
201 		r8a779f0_eth_serdes_write32(channel->addr, 0x0144, 0x180, 0x0100);  in r8a779f0_eth_serdes_monitor_linkup()
203 		r8a779f0_eth_serdes_write32(channel->addr, 0x0144, 0x180, 0x0000);  in r8a779f0_eth_serdes_monitor_linkup()
211 	struct r8a779f0_eth_serdes_drv_data *dd = channel->dd;  in r8a779f0_eth_serdes_hw_init()
214 	if (dd->initialized)  in r8a779f0_eth_serdes_hw_init()
222 		ret = r8a779f0_eth_serdes_reg_wait(&dd->channel[i], 0x0000,  in r8a779f0_eth_serdes_hw_init()
229 		r8a779f0_eth_serdes_write32(dd->channel[i].addr, 0x03d4, 0x380, 0x0443);  in r8a779f0_eth_serdes_hw_init()
236 		r8a779f0_eth_serdes_write32(dd->channel[i].addr, 0x03d0, 0x380, 0x0001);  in r8a779f0_eth_serdes_hw_init()
239 	r8a779f0_eth_serdes_write32(dd->addr, 0x0000, 0x380, 0x8000);  in r8a779f0_eth_serdes_hw_init()
245 	return r8a779f0_eth_serdes_reg_wait(&dd->channel[0], 0x0000, 0x380, BIT(15), 0);  in r8a779f0_eth_serdes_hw_init()
255 		channel->dd->initialized = true;  in r8a779f0_eth_serdes_init()
273 	r8a779f0_eth_serdes_write32(channel->addr, 0x03c0, 0x380, 0x0000);  in r8a779f0_eth_serdes_hw_init_late()
275 	r8a779f0_eth_serdes_write32(channel->addr, 0x03d0, 0x380, 0x0000);  in r8a779f0_eth_serdes_hw_init_late()
293 		return -EOPNOTSUPP;  in r8a779f0_eth_serdes_set_mode()
295 	switch (submode) {  in r8a779f0_eth_serdes_set_mode()
299 		channel->phy_interface = submode;  in r8a779f0_eth_serdes_set_mode()
302 		return -EOPNOTSUPP;  in r8a779f0_eth_serdes_set_mode()
310 	channel->speed = speed;  in r8a779f0_eth_serdes_set_speed()
327 	if (args->args[0] >= R8A779F0_ETH_SERDES_NUM)  in r8a779f0_eth_serdes_xlate()
328 		return ERR_PTR(-ENODEV);  in r8a779f0_eth_serdes_xlate()
330 	return dd->channel[args->args[0]].phy;  in r8a779f0_eth_serdes_xlate()
334 	{ .compatible = "renesas,r8a779f0-ether-serdes", },
345 	dd = devm_kzalloc(&pdev->dev, sizeof(*dd), GFP_KERNEL);  in r8a779f0_eth_serdes_probe()
347 		return -ENOMEM;  in r8a779f0_eth_serdes_probe()
350 	dd->pdev = pdev;  in r8a779f0_eth_serdes_probe()
351 	dd->addr = devm_platform_ioremap_resource(pdev, 0);  in r8a779f0_eth_serdes_probe()
352 	if (IS_ERR(dd->addr))  in r8a779f0_eth_serdes_probe()
353 		return PTR_ERR(dd->addr);  in r8a779f0_eth_serdes_probe()
355 	dd->reset = devm_reset_control_get(&pdev->dev, NULL);  in r8a779f0_eth_serdes_probe()
356 	if (IS_ERR(dd->reset))  in r8a779f0_eth_serdes_probe()
357 		return PTR_ERR(dd->reset);  in r8a779f0_eth_serdes_probe()
359 	reset_control_reset(dd->reset);  in r8a779f0_eth_serdes_probe()
362 		struct r8a779f0_eth_serdes_channel *channel = &dd->channel[i];  in r8a779f0_eth_serdes_probe()
364 		channel->phy = devm_phy_create(&pdev->dev, NULL,  in r8a779f0_eth_serdes_probe()
366 		if (IS_ERR(channel->phy))  in r8a779f0_eth_serdes_probe()
367 			return PTR_ERR(channel->phy);  in r8a779f0_eth_serdes_probe()
368 		channel->addr = dd->addr + R8A779F0_ETH_SERDES_OFFSET * i;  in r8a779f0_eth_serdes_probe()
369 		channel->dd = dd;  in r8a779f0_eth_serdes_probe()
370 		channel->index = i;  in r8a779f0_eth_serdes_probe()
371 		phy_set_drvdata(channel->phy, channel);  in r8a779f0_eth_serdes_probe()
374 	provider = devm_of_phy_provider_register(&pdev->dev,  in r8a779f0_eth_serdes_probe()
379 	pm_runtime_enable(&pdev->dev);  in r8a779f0_eth_serdes_probe()
380 	pm_runtime_get_sync(&pdev->dev);  in r8a779f0_eth_serdes_probe()
387 	pm_runtime_put(&pdev->dev);  in r8a779f0_eth_serdes_remove()
388 	pm_runtime_disable(&pdev->dev);  in r8a779f0_eth_serdes_remove()