Lines Matching +full:sdm845 +full:- +full:llcc
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
19 #include <linux/soc/qcom/llcc-qcom.h>
69 * struct llcc_slice_config - Data associated with the llcc slice
71 * @slice_id: llcc slice id for each client
85 * When configured to 0 all ways in llcc are probed.
369 /* LLCC Common registers */
374 /* LLCC DRP registers */
396 /* LLCC Common registers */
401 /* LLCC DRP registers */
413 /* LLCC register offset starting from v1.0.0 */
419 /* LLCC register offset starting from v2.0.1 */
522 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
525 * llcc_slice_getd - get llcc slice descriptor
528 * A pointer to llcc slice descriptor will be returned on success
540 cfg = drv_data->cfg; in llcc_slice_getd()
541 sz = drv_data->cfg_size; in llcc_slice_getd()
544 if (cfg->usecase_id == uid) in llcc_slice_getd()
548 return ERR_PTR(-ENODEV); in llcc_slice_getd()
552 return ERR_PTR(-ENOMEM); in llcc_slice_getd()
554 desc->slice_id = cfg->slice_id; in llcc_slice_getd()
555 desc->slice_size = cfg->max_cap; in llcc_slice_getd()
562 * llcc_slice_putd - llcc slice descritpor
563 * @desc: Pointer to llcc slice descriptor
590 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, in llcc_update_act_ctrl()
597 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, in llcc_update_act_ctrl()
602 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in llcc_update_act_ctrl()
603 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg, in llcc_update_act_ctrl()
610 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg, in llcc_update_act_ctrl()
616 if (drv_data->version >= LLCC_VERSION_4_1_0_0) in llcc_update_act_ctrl()
617 ret = regmap_write(drv_data->bcast_regmap, act_clear_reg, in llcc_update_act_ctrl()
624 * llcc_slice_activate - Activate the llcc slice
625 * @desc: Pointer to llcc slice descriptor
639 return -EINVAL; in llcc_slice_activate()
641 mutex_lock(&drv_data->lock); in llcc_slice_activate()
642 if (test_bit(desc->slice_id, drv_data->bitmap)) { in llcc_slice_activate()
643 mutex_unlock(&drv_data->lock); in llcc_slice_activate()
649 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, in llcc_slice_activate()
652 mutex_unlock(&drv_data->lock); in llcc_slice_activate()
656 __set_bit(desc->slice_id, drv_data->bitmap); in llcc_slice_activate()
657 mutex_unlock(&drv_data->lock); in llcc_slice_activate()
664 * llcc_slice_deactivate - Deactivate the llcc slice
665 * @desc: Pointer to llcc slice descriptor
679 return -EINVAL; in llcc_slice_deactivate()
681 mutex_lock(&drv_data->lock); in llcc_slice_deactivate()
682 if (!test_bit(desc->slice_id, drv_data->bitmap)) { in llcc_slice_deactivate()
683 mutex_unlock(&drv_data->lock); in llcc_slice_deactivate()
688 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, in llcc_slice_deactivate()
691 mutex_unlock(&drv_data->lock); in llcc_slice_deactivate()
695 __clear_bit(desc->slice_id, drv_data->bitmap); in llcc_slice_deactivate()
696 mutex_unlock(&drv_data->lock); in llcc_slice_deactivate()
703 * llcc_get_slice_id - return the slice id
704 * @desc: Pointer to llcc slice descriptor
709 return -EINVAL; in llcc_get_slice_id()
711 return desc->slice_id; in llcc_get_slice_id()
716 * llcc_get_slice_size - return the slice id
717 * @desc: Pointer to llcc slice descriptor
724 return desc->slice_size; in llcc_get_slice_size()
741 attr1_val = config->cache_mode; in _qcom_llcc_cfg_program()
742 attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT; in _qcom_llcc_cfg_program()
743 attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT; in _qcom_llcc_cfg_program()
744 attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT; in _qcom_llcc_cfg_program()
746 max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap); in _qcom_llcc_cfg_program()
749 * LLCC instances can vary for each target. in _qcom_llcc_cfg_program()
751 * to each llcc instance (llcc0,.. llccN). in _qcom_llcc_cfg_program()
753 * llcc instances, we need to configure the max cap accordingly. in _qcom_llcc_cfg_program()
755 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks; in _qcom_llcc_cfg_program()
759 attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id); in _qcom_llcc_cfg_program()
761 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val); in _qcom_llcc_cfg_program()
765 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
766 attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id); in _qcom_llcc_cfg_program()
767 attr0_val = config->res_ways; in _qcom_llcc_cfg_program()
768 attr2_val = config->bonus_ways; in _qcom_llcc_cfg_program()
770 attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK; in _qcom_llcc_cfg_program()
771 attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT; in _qcom_llcc_cfg_program()
774 attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id); in _qcom_llcc_cfg_program()
776 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val); in _qcom_llcc_cfg_program()
780 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
781 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val); in _qcom_llcc_cfg_program()
786 if (cfg->need_llcc_cfg) { in _qcom_llcc_cfg_program()
789 disable_cap_alloc = config->dis_cap_alloc << config->slice_id; in _qcom_llcc_cfg_program()
790 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC, in _qcom_llcc_cfg_program()
791 BIT(config->slice_id), disable_cap_alloc); in _qcom_llcc_cfg_program()
795 if (drv_data->version < LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
796 retain_pc = config->retain_on_pc << config->slice_id; in _qcom_llcc_cfg_program()
797 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT, in _qcom_llcc_cfg_program()
798 BIT(config->slice_id), retain_pc); in _qcom_llcc_cfg_program()
804 if (drv_data->version >= LLCC_VERSION_2_0_0_0) { in _qcom_llcc_cfg_program()
807 wren = config->write_scid_en << config->slice_id; in _qcom_llcc_cfg_program()
808 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN, in _qcom_llcc_cfg_program()
809 BIT(config->slice_id), wren); in _qcom_llcc_cfg_program()
814 if (drv_data->version >= LLCC_VERSION_2_1_0_0) { in _qcom_llcc_cfg_program()
817 wr_cache_en = config->write_scid_cacheable_en << config->slice_id; in _qcom_llcc_cfg_program()
818 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN, in _qcom_llcc_cfg_program()
819 BIT(config->slice_id), wr_cache_en); in _qcom_llcc_cfg_program()
824 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
834 stale_en = config->stale_en << config->slice_id; in _qcom_llcc_cfg_program()
835 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1, in _qcom_llcc_cfg_program()
836 BIT(config->slice_id), stale_en); in _qcom_llcc_cfg_program()
840 stale_cap_en = config->stale_cap_en << config->slice_id; in _qcom_llcc_cfg_program()
841 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2, in _qcom_llcc_cfg_program()
842 BIT(config->slice_id), stale_cap_en); in _qcom_llcc_cfg_program()
846 mru_uncap_en = config->mru_uncap_en << config->slice_id; in _qcom_llcc_cfg_program()
847 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3, in _qcom_llcc_cfg_program()
848 BIT(config->slice_id), mru_uncap_en); in _qcom_llcc_cfg_program()
852 mru_rollover = config->mru_rollover << config->slice_id; in _qcom_llcc_cfg_program()
853 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4, in _qcom_llcc_cfg_program()
854 BIT(config->slice_id), mru_rollover); in _qcom_llcc_cfg_program()
858 alloc_oneway_en = config->alloc_oneway_en << config->slice_id; in _qcom_llcc_cfg_program()
859 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5, in _qcom_llcc_cfg_program()
860 BIT(config->slice_id), alloc_oneway_en); in _qcom_llcc_cfg_program()
864 ovcap_en = config->ovcap_en << config->slice_id; in _qcom_llcc_cfg_program()
865 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6, in _qcom_llcc_cfg_program()
866 BIT(config->slice_id), ovcap_en); in _qcom_llcc_cfg_program()
870 ovcap_prio = config->ovcap_prio << config->slice_id; in _qcom_llcc_cfg_program()
871 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7, in _qcom_llcc_cfg_program()
872 BIT(config->slice_id), ovcap_prio); in _qcom_llcc_cfg_program()
876 vict_prio = config->vict_prio << config->slice_id; in _qcom_llcc_cfg_program()
877 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8, in _qcom_llcc_cfg_program()
878 BIT(config->slice_id), vict_prio); in _qcom_llcc_cfg_program()
883 if (config->activate_on_init) { in _qcom_llcc_cfg_program()
884 desc.slice_id = config->slice_id; in _qcom_llcc_cfg_program()
899 sz = drv_data->cfg_size; in qcom_llcc_cfg_program()
900 llcc_table = drv_data->cfg; in qcom_llcc_cfg_program()
914 drv_data = ERR_PTR(-ENODEV); in qcom_llcc_remove()
934 return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config); in qcom_llcc_init_mmio()
940 struct device *dev = &pdev->dev; in qcom_llcc_probe()
950 return -EBUSY; in qcom_llcc_probe()
954 ret = -ENOMEM; in qcom_llcc_probe()
958 /* Initialize the first LLCC bank regmap */ in qcom_llcc_probe()
965 cfg = of_device_get_match_data(&pdev->dev); in qcom_llcc_probe()
967 ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); in qcom_llcc_probe()
973 drv_data->num_banks = num_banks; in qcom_llcc_probe()
975 drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL); in qcom_llcc_probe()
976 if (!drv_data->regmaps) { in qcom_llcc_probe()
977 ret = -ENOMEM; in qcom_llcc_probe()
981 drv_data->regmaps[0] = regmap; in qcom_llcc_probe()
983 /* Initialize rest of LLCC bank regmaps */ in qcom_llcc_probe()
985 char *base = kasprintf(GFP_KERNEL, "llcc%d_base", i); in qcom_llcc_probe()
987 drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base); in qcom_llcc_probe()
988 if (IS_ERR(drv_data->regmaps[i])) { in qcom_llcc_probe()
989 ret = PTR_ERR(drv_data->regmaps[i]); in qcom_llcc_probe()
997 drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); in qcom_llcc_probe()
998 if (IS_ERR(drv_data->bcast_regmap)) { in qcom_llcc_probe()
999 ret = PTR_ERR(drv_data->bcast_regmap); in qcom_llcc_probe()
1004 ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], in qcom_llcc_probe()
1009 drv_data->version = version; in qcom_llcc_probe()
1011 llcc_cfg = cfg->sct_data; in qcom_llcc_probe()
1012 sz = cfg->size; in qcom_llcc_probe()
1015 if (llcc_cfg[i].slice_id > drv_data->max_slices) in qcom_llcc_probe()
1016 drv_data->max_slices = llcc_cfg[i].slice_id; in qcom_llcc_probe()
1018 drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices, in qcom_llcc_probe()
1020 if (!drv_data->bitmap) { in qcom_llcc_probe()
1021 ret = -ENOMEM; in qcom_llcc_probe()
1025 drv_data->cfg = llcc_cfg; in qcom_llcc_probe()
1026 drv_data->cfg_size = sz; in qcom_llcc_probe()
1027 drv_data->edac_reg_offset = cfg->edac_reg_offset; in qcom_llcc_probe()
1028 mutex_init(&drv_data->lock); in qcom_llcc_probe()
1035 drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); in qcom_llcc_probe()
1043 if (!cfg->no_edac) { in qcom_llcc_probe()
1044 llcc_edac = platform_device_register_data(&pdev->dev, in qcom_llcc_probe()
1045 "qcom_llcc_edac", -1, drv_data, in qcom_llcc_probe()
1048 dev_err(dev, "Failed to register llcc edac driver\n"); in qcom_llcc_probe()
1053 drv_data = ERR_PTR(-ENODEV); in qcom_llcc_probe()
1058 { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfg },
1059 { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfg },
1060 { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfg },
1061 { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfg },
1062 { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfg },
1063 { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfg },
1064 { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfg },
1065 { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg },
1066 { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfg },
1067 { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfg },
1068 { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfg },
1069 { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfg },
1076 .name = "qcom-llcc",