Lines Matching +full:codec +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0-or-later
37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
59 #define WIDGET_CHIP_CTRL 0x15
60 #define WIDGET_DSP_CTRL 0x16
70 #define SCP_SET 0
74 #define DESKTOP_EFX_FILE "ctefx-desktop.bin"
75 #define R3DI_EFX_FILE "ctefx-r3di.bin"
107 #define VNODE_START_NID 0x80
115 #define VNODES_COUNT (VNODE_END_NID - VNODE_START_NID)
117 #define EFFECT_START_NID 0x90
126 #define OUT_EFFECTS_COUNT (OUT_EFFECT_END_NID - OUT_EFFECT_START_NID)
134 #define IN_EFFECTS_COUNT (IN_EFFECT_END_NID - IN_EFFECT_START_NID)
154 #define EFFECTS_COUNT (EFFECT_END_NID - EFFECT_START_NID)
163 * X-bass.
170 #define DSP_CAPTURE_INIT_LATENCY 0
181 int direct; /* 0:output; 1:input*/
182 int params; /* number of default non-on/off params */
187 #define EFX_DIR_OUT 0
193 .mid = 0x96,
194 .reqs = {0, 1},
197 .def_vals = {0x3F800000, 0x3F2B851F}
201 .mid = 0x96,
205 .def_vals = {0x3F800000, 0x3F266666}
209 .mid = 0x96,
213 .def_vals = {0x00000000, 0x3F000000}
217 .mid = 0x96,
221 .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
223 { .name = "X-Bass",
225 .mid = 0x96,
229 .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 .mid = 0x96,
238 .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 .mid = 0x95,
245 .reqs = {0, 1, 2, 3},
248 .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 .mid = 0x95,
256 .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
260 .mid = 0x95,
264 .def_vals = {0x00000000, 0x3F3D70A4}
268 .mid = 0x95,
272 .def_vals = {0x3F800000, 0x3F000000}
276 .mid = 0x95,
280 .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
281 0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
282 0x00000000}
290 #define TUNING_CTL_START_NID 0xC0
304 #define TUNING_CTLS_COUNT (TUNING_CTL_END_NID - TUNING_CTL_START_NID)
313 int direct; /* 0:output; 1:input*/
321 .mid = 0x95,
324 .def_val = 0x41F00000
329 .mid = 0x95,
332 .def_val = 0x3F3D70A4
337 .mid = 0x96,
340 .def_val = 0x00000000
345 .mid = 0x96,
348 .def_val = 0x00000000
353 .mid = 0x96,
356 .def_val = 0x00000000
361 .mid = 0x96,
364 .def_val = 0x00000000
369 .mid = 0x96,
372 .def_val = 0x00000000
377 .mid = 0x96,
380 .def_val = 0x00000000
385 .mid = 0x96,
388 .def_val = 0x00000000
393 .mid = 0x96,
396 .def_val = 0x00000000
401 .mid = 0x96,
404 .def_val = 0x00000000
409 .mid = 0x96,
412 .def_val = 0x00000000
435 .mid = 0x95,
441 .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
442 0x44FA0000, 0x3F800000, 0x3F800000,
443 0x3F800000, 0x00000000, 0x00000000 }
446 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
447 0x44FA0000, 0x3F19999A, 0x3F866666,
448 0x3F800000, 0x00000000, 0x00000000 }
451 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
452 0x450AC000, 0x4017AE14, 0x3F6B851F,
453 0x3F800000, 0x00000000, 0x00000000 }
456 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
457 0x44FA0000, 0x40400000, 0x3F28F5C3,
458 0x3F800000, 0x00000000, 0x00000000 }
461 .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
462 0x44E10000, 0x3FB33333, 0x3FB9999A,
463 0x3F800000, 0x3E3A2E43, 0x00000000 }
466 .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
467 0x45098000, 0x3F266666, 0x3FC00000,
468 0x3F800000, 0x00000000, 0x00000000 }
471 .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
472 0x45193000, 0x3F8E147B, 0x3F75C28F,
473 0x3F800000, 0x00000000, 0x00000000 }
476 .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
477 0x45007000, 0x3F451EB8, 0x3F7851EC,
478 0x3F800000, 0x00000000, 0x00000000 }
481 .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
482 0x451F6000, 0x3F266666, 0x3FA7D945,
483 0x3F800000, 0x3CF5C28F, 0x00000000 }
486 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
487 0x44FA0000, 0x3FB2718B, 0x3F800000,
488 0xBC07010E, 0x00000000, 0x00000000 }
491 .vals = { 0x3F800000, 0x43C20000, 0x44906000,
492 0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
493 0x3F0A3D71, 0x00000000, 0x00000000 }
496 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
497 0x44FA0000, 0x3F800000, 0x3F800000,
498 0x3E4CCCCD, 0x00000000, 0x00000000 }
501 .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
502 0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
503 0x3F800000, 0x00000000, 0x00000000 }
506 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
507 0x44FA0000, 0x3F800000, 0x3F1A043C,
508 0x3F800000, 0x00000000, 0x00000000 }
531 .mid = 0x96,
538 .vals = { 0x00000000, 0x00000000, 0x00000000,
539 0x00000000, 0x00000000, 0x00000000,
540 0x00000000, 0x00000000, 0x00000000,
541 0x00000000, 0x00000000 }
544 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
545 0x40000000, 0x00000000, 0x00000000,
546 0x00000000, 0x00000000, 0x40000000,
547 0x40000000, 0x40000000 }
550 .vals = { 0x00000000, 0x00000000, 0x40C00000,
551 0x40C00000, 0x40466666, 0x00000000,
552 0x00000000, 0x00000000, 0x00000000,
553 0x40466666, 0x40466666 }
556 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
557 0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
558 0x00000000, 0x00000000, 0x40000000,
559 0x40466666, 0x40800000 }
562 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
563 0x40466666, 0x40866666, 0xBF99999A,
564 0xBF99999A, 0x00000000, 0x00000000,
565 0x40800000, 0x40800000 }
568 .vals = { 0x00000000, 0x00000000, 0x00000000,
569 0x3F8CCCCD, 0x40800000, 0x40800000,
570 0x40800000, 0x00000000, 0x3F8CCCCD,
571 0x40466666, 0x40466666 }
574 .vals = { 0x00000000, 0x00000000, 0x40000000,
575 0x40000000, 0x00000000, 0x00000000,
576 0x00000000, 0x3F8CCCCD, 0x40000000,
577 0x40000000, 0x40000000 }
580 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
581 0x40000000, 0x40000000, 0x00000000,
582 0xBF99999A, 0xBF99999A, 0x00000000,
583 0x40466666, 0x40C00000 }
586 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
587 0x3F8CCCCD, 0x40000000, 0xBF99999A,
588 0xBF99999A, 0x00000000, 0x00000000,
589 0x40800000, 0x40800000 }
592 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
593 0xBF99999A, 0x00000000, 0x40466666,
594 0x40800000, 0x40466666, 0x00000000,
595 0x00000000, 0x3F8CCCCD }
600 * DSP reqs for handling full-range speakers/bass redirection. If a speaker is
604 * enabled. X-Bass must be disabled when using these.
607 SPEAKER_BASS_REDIRECT = 0x15,
608 SPEAKER_BASS_REDIRECT_XOVER_FREQ = 0x16,
609 /* Between 0x16-0x1a are the X-Bass reqs. */
610 SPEAKER_FULL_RANGE_FRONT_L_R = 0x1a,
611 SPEAKER_FULL_RANGE_CENTER_LFE = 0x1b,
612 SPEAKER_FULL_RANGE_REAR_L_R = 0x1c,
613 SPEAKER_FULL_RANGE_SURROUND_L_R = 0x1d,
614 SPEAKER_BASS_REDIRECT_SUB_GAIN = 0x1e,
619 * module ID 0x96, the output effects module.
625 * connect software, the QUERY_SPEAKER_EQ_ADDRESS req on mid 0x80 is
635 SPEAKER_TUNING_USE_SPEAKER_EQ = 0x1f,
636 SPEAKER_TUNING_ENABLE_CENTER_EQ = 0x20,
637 SPEAKER_TUNING_FRONT_LEFT_VOL_LEVEL = 0x21,
638 SPEAKER_TUNING_FRONT_RIGHT_VOL_LEVEL = 0x22,
639 SPEAKER_TUNING_CENTER_VOL_LEVEL = 0x23,
640 SPEAKER_TUNING_LFE_VOL_LEVEL = 0x24,
641 SPEAKER_TUNING_REAR_LEFT_VOL_LEVEL = 0x25,
642 SPEAKER_TUNING_REAR_RIGHT_VOL_LEVEL = 0x26,
643 SPEAKER_TUNING_SURROUND_LEFT_VOL_LEVEL = 0x27,
644 SPEAKER_TUNING_SURROUND_RIGHT_VOL_LEVEL = 0x28,
649 SPEAKER_TUNING_FRONT_LEFT_INVERT = 0x29,
650 SPEAKER_TUNING_FRONT_RIGHT_INVERT = 0x2a,
651 SPEAKER_TUNING_CENTER_INVERT = 0x2b,
652 SPEAKER_TUNING_LFE_INVERT = 0x2c,
653 SPEAKER_TUNING_REAR_LEFT_INVERT = 0x2d,
654 SPEAKER_TUNING_REAR_RIGHT_INVERT = 0x2e,
655 SPEAKER_TUNING_SURROUND_LEFT_INVERT = 0x2f,
656 SPEAKER_TUNING_SURROUND_RIGHT_INVERT = 0x30,
658 SPEAKER_TUNING_FRONT_LEFT_DELAY = 0x31,
659 SPEAKER_TUNING_FRONT_RIGHT_DELAY = 0x32,
660 SPEAKER_TUNING_CENTER_DELAY = 0x33,
661 SPEAKER_TUNING_LFE_DELAY = 0x34,
662 SPEAKER_TUNING_REAR_LEFT_DELAY = 0x35,
663 SPEAKER_TUNING_REAR_RIGHT_DELAY = 0x36,
664 SPEAKER_TUNING_SURROUND_LEFT_DELAY = 0x37,
665 SPEAKER_TUNING_SURROUND_RIGHT_DELAY = 0x38,
667 SPEAKER_TUNING_MAIN_VOLUME = 0x39,
668 SPEAKER_TUNING_MUTE = 0x3a,
709 #define DSP_VOL_OUT 0
720 .mid = 0x32,
724 .mid = 0x37,
738 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
739 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
741 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
743 { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 } },
747 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
748 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
750 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
752 { 0x3f, 0x3f, 0x00, 0x00, 0x02, 0x00 } },
763 { .name = "Low (16-31",
764 .vals = { 0xff, 0x2c, 0xf5, 0x32 }
766 { .name = "Medium (32-149",
767 .vals = { 0x38, 0xa8, 0x3e, 0x4c }
769 { .name = "High (150-600",
770 .vals = { 0xff, 0xff, 0xff, 0x7f }
781 .val = 0xa0
784 .val = 0xc0
787 .val = 0x80
804 { .stream_id = 0x14,
805 .count = 0x04,
806 .offset = { 0x00, 0x04, 0x08, 0x0c },
807 .value = { 0x0001f8c0, 0x0001f9c1, 0x0001fac6, 0x0001fbc7 },
809 { .stream_id = 0x0c,
810 .count = 0x0c,
811 .offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c,
812 0x20, 0x24, 0x28, 0x2c },
813 .value = { 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3,
814 0x0001e2c4, 0x0001e3c5, 0x0001e8c6, 0x0001e9c7,
815 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb },
817 { .stream_id = 0x0c,
818 .count = 0x08,
819 .offset = { 0x08, 0x0c, 0x10, 0x14, 0x20, 0x24, 0x28, 0x2c },
820 .value = { 0x000140c2, 0x000141c3, 0x000150c4, 0x000151c5,
821 0x000142c8, 0x000143c9, 0x000152ca, 0x000153cb },
827 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
828 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
830 VENDOR_DSPIO_STATUS = 0xF01,
831 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
832 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
833 VENDOR_DSPIO_DSP_INIT = 0x703,
834 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
835 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
838 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
839 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
840 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
841 VENDOR_CHIPIO_DATA_LOW = 0x300,
842 VENDOR_CHIPIO_DATA_HIGH = 0x400,
844 VENDOR_CHIPIO_8051_WRITE_DIRECT = 0x500,
845 VENDOR_CHIPIO_8051_READ_DIRECT = 0xD00,
847 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
848 VENDOR_CHIPIO_STATUS = 0xF01,
849 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
850 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
852 VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
853 VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
854 VENDOR_CHIPIO_8051_PMEM_READ = 0xF08,
855 VENDOR_CHIPIO_8051_IRAM_WRITE = 0x709,
856 VENDOR_CHIPIO_8051_IRAM_READ = 0xF09,
858 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
859 VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
861 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
862 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
863 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
864 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
865 VENDOR_CHIPIO_FLAG_SET = 0x70F,
866 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
867 VENDOR_CHIPIO_PARAM_SET = 0x710,
868 VENDOR_CHIPIO_PARAM_GET = 0xF10,
870 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
871 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
872 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
873 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
875 VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
876 VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
877 VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
878 VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
880 VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
881 VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
882 VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
883 VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
884 VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
885 VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
887 VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
895 CONTROL_FLAG_C_MGR = 0,
900 /* Tracker for the SPDIF-in path is bypassed/enabled */
918 /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
920 /* De-emphasis filter on DAC-1 disabled/enabled */
922 /* De-emphasis filter on DAC-2 disabled/enabled */
924 /* De-emphasis filter on DAC-3 disabled/enabled */
926 /* High-pass filter on ADC_B disabled/enabled */
928 /* High-pass filter on ADC_C disabled/enabled */
952 /* 0: None, 1: Mic1In*/
954 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
965 * sense given the fact the AE-5 uses it and has the ASI flag set.
1000 VENDOR_STATUS_DSPIO_OK = 0x00,
1002 VENDOR_STATUS_DSPIO_BUSY = 0x01,
1004 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
1006 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
1014 VENDOR_STATUS_CHIPIO_OK = 0x00,
1016 VENDOR_STATUS_CHIPIO_BUSY = 0x01
1023 SR_6_000 = 0x00,
1024 SR_8_000 = 0x01,
1025 SR_9_600 = 0x02,
1026 SR_11_025 = 0x03,
1027 SR_16_000 = 0x04,
1028 SR_22_050 = 0x05,
1029 SR_24_000 = 0x06,
1030 SR_32_000 = 0x07,
1031 SR_44_100 = 0x08,
1032 SR_48_000 = 0x09,
1033 SR_88_200 = 0x0A,
1034 SR_96_000 = 0x0B,
1035 SR_144_000 = 0x0C,
1036 SR_176_400 = 0x0D,
1037 SR_192_000 = 0x0E,
1038 SR_384_000 = 0x0F,
1040 SR_COUNT = 0x10,
1042 SR_RATE_UNKNOWN = 0x1F
1046 DSP_DOWNLOAD_FAILED = -1,
1047 DSP_DOWNLOAD_INIT = 0,
1053 #define get_hdafmt_chs(fmt) (fmt & 0xf)
1054 #define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7)
1055 #define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f)
1056 #define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
1129 /* AE-5 Control values */
1135 struct hda_codec *codec; member
1144 * AE-5 all use PCI region 2 to toggle GPIO and other currently unknown
1182 #define ca0132_quirk(spec) ((spec)->quirk)
1183 #define ca0132_use_pci_mmio(spec) ((spec)->use_pci_mmio)
1184 #define ca0132_use_alt_functions(spec) ((spec)->use_alt_functions)
1185 #define ca0132_use_alt_controls(spec) ((spec)->use_alt_controls)
1194 { 0x0b, 0x90170110 }, /* Builtin Speaker */
1195 { 0x0c, 0x411111f0 }, /* N/A */
1196 { 0x0d, 0x411111f0 }, /* N/A */
1197 { 0x0e, 0x411111f0 }, /* N/A */
1198 { 0x0f, 0x0321101f }, /* HP */
1199 { 0x10, 0x411111f0 }, /* Headset? disabled for now */
1200 { 0x11, 0x03a11021 }, /* Mic */
1201 { 0x12, 0xd5a30140 }, /* Builtin Mic */
1202 { 0x13, 0x411111f0 }, /* N/A */
1203 { 0x18, 0x411111f0 }, /* N/A */
1209 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1210 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1211 { 0x0d, 0x014510f0 }, /* Digital Out */
1212 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1213 { 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1214 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1215 { 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1216 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1217 { 0x13, 0x908700f0 }, /* What U Hear In*/
1218 { 0x18, 0x50d000f0 }, /* N/A */
1224 { 0x0b, 0x01047110 }, /* Port G -- Lineout FRONT L/R */
1225 { 0x0c, 0x414510f0 }, /* SPDIF Out 1 - Disabled*/
1226 { 0x0d, 0x014510f0 }, /* Digital Out */
1227 { 0x0e, 0x41c520f0 }, /* SPDIF In - Disabled*/
1228 { 0x0f, 0x0122711f }, /* Port A -- BackPanel HP */
1229 { 0x10, 0x01017111 }, /* Port D -- Center/LFE */
1230 { 0x11, 0x01017114 }, /* Port B -- LineMicIn2 / Rear L/R */
1231 { 0x12, 0x01a271f0 }, /* Port C -- LineIn1 */
1232 { 0x13, 0x908700f0 }, /* What U Hear In*/
1233 { 0x18, 0x50d000f0 }, /* N/A */
1239 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1240 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1241 { 0x0d, 0x014510f0 }, /* Digital Out */
1242 { 0x0e, 0x01c520f0 }, /* SPDIF In */
1243 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1244 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1245 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1246 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1247 { 0x13, 0x908700f0 }, /* What U Hear In*/
1248 { 0x18, 0x50d000f0 }, /* N/A */
1252 /* Sound Blaster AE-5 pin configs taken from Windows Driver */
1254 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1255 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1256 { 0x0d, 0x014510f0 }, /* Digital Out */
1257 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1258 { 0x0f, 0x01017114 }, /* Port A -- Rear L/R. */
1259 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1260 { 0x11, 0x012170ff }, /* Port B -- LineMicIn2 / Rear Headphone */
1261 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1262 { 0x13, 0x908700f0 }, /* What U Hear In*/
1263 { 0x18, 0x50d000f0 }, /* N/A */
1269 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1270 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1271 { 0x0d, 0x014510f0 }, /* Digital Out */
1272 { 0x0e, 0x41c520f0 }, /* SPDIF In */
1273 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1274 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1275 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1276 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1277 { 0x13, 0x908700f0 }, /* What U Hear In*/
1278 { 0x18, 0x500000f0 }, /* N/A */
1283 { 0x0b, 0x01017010 },
1284 { 0x0c, 0x014510f0 },
1285 { 0x0d, 0x414510f0 },
1286 { 0x0e, 0x01c520f0 },
1287 { 0x0f, 0x01017114 },
1288 { 0x10, 0x01017011 },
1289 { 0x11, 0x018170ff },
1290 { 0x12, 0x01a170f0 },
1291 { 0x13, 0x908700f0 },
1292 { 0x18, 0x500000f0 },
1297 SND_PCI_QUIRK(0x1028, 0x057b, "Alienware M17x R4", QUIRK_ALIENWARE_M17XR4),
1298 SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1299 SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1300 SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1301 SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1302 SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1303 SND_PCI_QUIRK(0x1102, 0x0027, "Sound Blaster Z", QUIRK_SBZ),
1304 SND_PCI_QUIRK(0x1102, 0x0033, "Sound Blaster ZxR", QUIRK_SBZ),
1305 SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1306 SND_PCI_QUIRK(0x1458, 0xA026, "Gigabyte G1.Sniper Z97", QUIRK_R3DI),
1307 SND_PCI_QUIRK(0x1458, 0xA036, "Gigabyte GA-Z170X-Gaming 7", QUIRK_R3DI),
1308 SND_PCI_QUIRK(0x3842, 0x1038, "EVGA X99 Classified", QUIRK_R3DI),
1309 SND_PCI_QUIRK(0x3842, 0x104b, "EVGA X299 Dark", QUIRK_R3DI),
1310 SND_PCI_QUIRK(0x3842, 0x1055, "EVGA Z390 DARK", QUIRK_R3DI),
1311 SND_PCI_QUIRK(0x1102, 0x0013, "Recon3D", QUIRK_R3D),
1312 SND_PCI_QUIRK(0x1102, 0x0018, "Recon3D", QUIRK_R3D),
1313 SND_PCI_QUIRK(0x1102, 0x0051, "Sound Blaster AE-5", QUIRK_AE5),
1314 SND_PCI_QUIRK(0x1102, 0x0191, "Sound Blaster AE-5 Plus", QUIRK_AE5),
1315 SND_PCI_QUIRK(0x1102, 0x0081, "Sound Blaster AE-7", QUIRK_AE7),
1323 unsigned int dac2port; /* ParamID 0x0d value. */
1358 { .dac2port = 0x24,
1362 .mmio_gpio_count = 0,
1363 .scp_cmds_count = 0,
1367 { .dac2port = 0x21,
1370 .hda_gpio_set = 0,
1371 .mmio_gpio_count = 0,
1372 .scp_cmds_count = 0,
1381 { .dac2port = 0x24,
1386 .scp_cmds_count = 0,
1390 { .dac2port = 0x21,
1394 .mmio_gpio_set = { 0 },
1395 .scp_cmds_count = 0,
1404 { .dac2port = 0x18,
1408 .mmio_gpio_set = { 0, 1, 1 },
1409 .scp_cmds_count = 0,
1412 { .dac2port = 0x12,
1416 .mmio_gpio_set = { 1, 1, 0 },
1417 .scp_cmds_count = 0,
1426 { .dac2port = 0x24,
1430 .mmio_gpio_set = { 1, 1, 0 },
1431 .scp_cmds_count = 0,
1435 { .dac2port = 0x21,
1439 .mmio_gpio_set = { 0, 1, 1 },
1440 .scp_cmds_count = 0,
1449 { .dac2port = 0xa4,
1451 .mmio_gpio_count = 0,
1453 .scp_cmd_mid = { 0x96, 0x96 },
1458 .chipio_write_addr = 0x0018b03c,
1459 .chipio_write_data = 0x00000012
1462 { .dac2port = 0xa1,
1464 .mmio_gpio_count = 0,
1466 .scp_cmd_mid = { 0x96, 0x96 },
1471 .chipio_write_addr = 0x0018b03c,
1472 .chipio_write_data = 0x00000012
1480 { .dac2port = 0x58,
1483 .mmio_gpio_pin = { 0 },
1486 .scp_cmd_mid = { 0x96, 0x96 },
1491 .chipio_write_addr = 0x0018b03c,
1492 .chipio_write_data = 0x00000000
1495 { .dac2port = 0x58,
1498 .mmio_gpio_pin = { 0 },
1501 .scp_cmd_mid = { 0x96, 0x96 },
1506 .chipio_write_addr = 0x0018b03c,
1507 .chipio_write_data = 0x00000010
1513 * CA0132 codec access
1515 static unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid, in codec_send_command() argument
1519 response = snd_hda_codec_read(codec, nid, 0, verb, parm); in codec_send_command()
1522 return ((response == -1) ? -1 : 0); in codec_send_command()
1525 static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid, in codec_set_converter_format() argument
1528 return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT, in codec_set_converter_format()
1529 converter_format & 0xffff, res); in codec_set_converter_format()
1532 static int codec_set_converter_stream_channel(struct hda_codec *codec, in codec_set_converter_stream_channel() argument
1536 unsigned char converter_stream_channel = 0; in codec_set_converter_stream_channel()
1538 converter_stream_channel = (stream << 4) | (channel & 0x0f); in codec_set_converter_stream_channel()
1539 return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID, in codec_set_converter_stream_channel()
1544 static int chipio_send(struct hda_codec *codec, in chipio_send() argument
1553 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_send()
1556 return 0; in chipio_send()
1560 return -EIO; in chipio_send()
1564 * Write chip address through the vendor widget -- NOT protected by the Mutex!
1566 static int chipio_write_address(struct hda_codec *codec, in chipio_write_address() argument
1569 struct ca0132_spec *spec = codec->spec; in chipio_write_address()
1572 if (spec->curr_chip_addx == chip_addx) in chipio_write_address()
1573 return 0; in chipio_write_address()
1576 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW, in chipio_write_address()
1577 chip_addx & 0xffff); in chipio_write_address()
1579 if (res != -EIO) { in chipio_write_address()
1581 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH, in chipio_write_address()
1585 spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx; in chipio_write_address()
1591 * Write data through the vendor widget -- NOT protected by the Mutex!
1593 static int chipio_write_data(struct hda_codec *codec, unsigned int data) in chipio_write_data() argument
1595 struct ca0132_spec *spec = codec->spec; in chipio_write_data()
1599 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); in chipio_write_data()
1601 if (res != -EIO) { in chipio_write_data()
1603 res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH, in chipio_write_data()
1609 spec->curr_chip_addx = (res != -EIO) ? in chipio_write_data()
1610 (spec->curr_chip_addx + 4) : ~0U; in chipio_write_data()
1615 * Write multiple data through the vendor widget -- NOT protected by the Mutex!
1617 static int chipio_write_data_multiple(struct hda_codec *codec, in chipio_write_data_multiple() argument
1621 int status = 0; in chipio_write_data_multiple()
1624 codec_dbg(codec, "chipio_write_data null ptr\n"); in chipio_write_data_multiple()
1625 return -EINVAL; in chipio_write_data_multiple()
1628 while ((count-- != 0) && (status == 0)) in chipio_write_data_multiple()
1629 status = chipio_write_data(codec, *data++); in chipio_write_data_multiple()
1636 * Read data through the vendor widget -- NOT protected by the Mutex!
1638 static int chipio_read_data(struct hda_codec *codec, unsigned int *data) in chipio_read_data() argument
1640 struct ca0132_spec *spec = codec->spec; in chipio_read_data()
1644 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); in chipio_read_data()
1646 if (res != -EIO) { in chipio_read_data()
1648 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in chipio_read_data()
1651 if (res != -EIO) { in chipio_read_data()
1653 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_read_data()
1655 0); in chipio_read_data()
1660 spec->curr_chip_addx = (res != -EIO) ? in chipio_read_data()
1661 (spec->curr_chip_addx + 4) : ~0U; in chipio_read_data()
1669 static int chipio_write(struct hda_codec *codec, in chipio_write() argument
1672 struct ca0132_spec *spec = codec->spec; in chipio_write()
1675 mutex_lock(&spec->chipio_mutex); in chipio_write()
1678 err = chipio_write_address(codec, chip_addx); in chipio_write()
1679 if (err < 0) in chipio_write()
1682 err = chipio_write_data(codec, data); in chipio_write()
1683 if (err < 0) in chipio_write()
1687 mutex_unlock(&spec->chipio_mutex); in chipio_write()
1695 static int chipio_write_no_mutex(struct hda_codec *codec, in chipio_write_no_mutex() argument
1702 err = chipio_write_address(codec, chip_addx); in chipio_write_no_mutex()
1703 if (err < 0) in chipio_write_no_mutex()
1706 err = chipio_write_data(codec, data); in chipio_write_no_mutex()
1707 if (err < 0) in chipio_write_no_mutex()
1718 static int chipio_write_multiple(struct hda_codec *codec, in chipio_write_multiple() argument
1723 struct ca0132_spec *spec = codec->spec; in chipio_write_multiple()
1726 mutex_lock(&spec->chipio_mutex); in chipio_write_multiple()
1727 status = chipio_write_address(codec, chip_addx); in chipio_write_multiple()
1728 if (status < 0) in chipio_write_multiple()
1731 status = chipio_write_data_multiple(codec, data, count); in chipio_write_multiple()
1733 mutex_unlock(&spec->chipio_mutex); in chipio_write_multiple()
1742 static int chipio_read(struct hda_codec *codec, in chipio_read() argument
1745 struct ca0132_spec *spec = codec->spec; in chipio_read()
1748 mutex_lock(&spec->chipio_mutex); in chipio_read()
1751 err = chipio_write_address(codec, chip_addx); in chipio_read()
1752 if (err < 0) in chipio_read()
1755 err = chipio_read_data(codec, data); in chipio_read()
1756 if (err < 0) in chipio_read()
1760 mutex_unlock(&spec->chipio_mutex); in chipio_read()
1767 static void chipio_set_control_flag(struct hda_codec *codec, in chipio_set_control_flag() argument
1774 flag_bit = (flag_state ? 1 : 0); in chipio_set_control_flag()
1776 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_flag()
1783 static void chipio_set_control_param(struct hda_codec *codec, in chipio_set_control_param() argument
1786 struct ca0132_spec *spec = codec->spec; in chipio_set_control_param()
1791 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1794 mutex_lock(&spec->chipio_mutex); in chipio_set_control_param()
1795 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param()
1796 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1799 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1803 mutex_unlock(&spec->chipio_mutex); in chipio_set_control_param()
1810 static void chipio_set_control_param_no_mutex(struct hda_codec *codec, in chipio_set_control_param_no_mutex() argument
1817 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1820 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param_no_mutex()
1821 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1824 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1834 static void chipio_set_stream_source_dest(struct hda_codec *codec, in chipio_set_stream_source_dest() argument
1837 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1839 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1841 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1848 static void chipio_set_stream_channels(struct hda_codec *codec, in chipio_set_stream_channels() argument
1851 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_channels()
1853 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_channels()
1860 static void chipio_set_stream_control(struct hda_codec *codec, in chipio_set_stream_control() argument
1863 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_control()
1865 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_control()
1872 static void chipio_get_stream_control(struct hda_codec *codec, in chipio_get_stream_control() argument
1875 chipio_set_control_param_no_mutex(codec, in chipio_get_stream_control()
1877 *enable = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_get_stream_control()
1885 static void chipio_set_conn_rate_no_mutex(struct hda_codec *codec, in chipio_set_conn_rate_no_mutex() argument
1888 chipio_set_control_param_no_mutex(codec, in chipio_set_conn_rate_no_mutex()
1890 chipio_set_control_param_no_mutex(codec, in chipio_set_conn_rate_no_mutex()
1897 static void chipio_set_conn_rate(struct hda_codec *codec, in chipio_set_conn_rate() argument
1900 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid); in chipio_set_conn_rate()
1901 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE, in chipio_set_conn_rate()
1908 * 0x80-0xFF.
1910 static void chipio_8051_write_direct(struct hda_codec *codec, in chipio_8051_write_direct() argument
1916 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr); in chipio_8051_write_direct()
1920 * Writes to the 8051's exram, which has 16-bits of address space.
1921 * Data at addresses 0x2000-0x7fff is mirrored to 0x8000-0xdfff.
1922 * Data at 0x8000-0xdfff can also be used as program memory for the 8051 by
1924 * 0xe000-0xffff is always mapped as program memory, with only 0xf000-0xffff
1927 static void chipio_8051_set_address(struct hda_codec *codec, unsigned int addr) in chipio_8051_set_address() argument
1931 /* Lower 8-bits. */ in chipio_8051_set_address()
1932 tmp = addr & 0xff; in chipio_8051_set_address()
1933 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_address()
1936 /* Upper 8-bits. */ in chipio_8051_set_address()
1937 tmp = (addr >> 8) & 0xff; in chipio_8051_set_address()
1938 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_address()
1942 static void chipio_8051_set_data(struct hda_codec *codec, unsigned int data) in chipio_8051_set_data() argument
1944 /* 8-bits of data. */ in chipio_8051_set_data()
1945 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_data()
1946 VENDOR_CHIPIO_8051_DATA_WRITE, data & 0xff); in chipio_8051_set_data()
1949 static unsigned int chipio_8051_get_data(struct hda_codec *codec) in chipio_8051_get_data() argument
1951 return snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_get_data()
1952 VENDOR_CHIPIO_8051_DATA_READ, 0); in chipio_8051_get_data()
1956 static void chipio_8051_set_data_pll(struct hda_codec *codec, unsigned int data) in chipio_8051_set_data_pll() argument
1958 /* 8-bits of data. */ in chipio_8051_set_data_pll()
1959 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_data_pll()
1960 VENDOR_CHIPIO_PLL_PMU_WRITE, data & 0xff); in chipio_8051_set_data_pll()
1963 static void chipio_8051_write_exram(struct hda_codec *codec, in chipio_8051_write_exram() argument
1966 struct ca0132_spec *spec = codec->spec; in chipio_8051_write_exram()
1968 mutex_lock(&spec->chipio_mutex); in chipio_8051_write_exram()
1970 chipio_8051_set_address(codec, addr); in chipio_8051_write_exram()
1971 chipio_8051_set_data(codec, data); in chipio_8051_write_exram()
1973 mutex_unlock(&spec->chipio_mutex); in chipio_8051_write_exram()
1976 static void chipio_8051_write_exram_no_mutex(struct hda_codec *codec, in chipio_8051_write_exram_no_mutex() argument
1979 chipio_8051_set_address(codec, addr); in chipio_8051_write_exram_no_mutex()
1980 chipio_8051_set_data(codec, data); in chipio_8051_write_exram_no_mutex()
1984 static void chipio_8051_read_exram(struct hda_codec *codec, in chipio_8051_read_exram() argument
1987 chipio_8051_set_address(codec, addr); in chipio_8051_read_exram()
1988 *data = chipio_8051_get_data(codec); in chipio_8051_read_exram()
1991 static void chipio_8051_write_pll_pmu(struct hda_codec *codec, in chipio_8051_write_pll_pmu() argument
1994 struct ca0132_spec *spec = codec->spec; in chipio_8051_write_pll_pmu()
1996 mutex_lock(&spec->chipio_mutex); in chipio_8051_write_pll_pmu()
1998 chipio_8051_set_address(codec, addr & 0xff); in chipio_8051_write_pll_pmu()
1999 chipio_8051_set_data_pll(codec, data); in chipio_8051_write_pll_pmu()
2001 mutex_unlock(&spec->chipio_mutex); in chipio_8051_write_pll_pmu()
2004 static void chipio_8051_write_pll_pmu_no_mutex(struct hda_codec *codec, in chipio_8051_write_pll_pmu_no_mutex() argument
2007 chipio_8051_set_address(codec, addr & 0xff); in chipio_8051_write_pll_pmu_no_mutex()
2008 chipio_8051_set_data_pll(codec, data); in chipio_8051_write_pll_pmu_no_mutex()
2014 static void chipio_enable_clocks(struct hda_codec *codec) in chipio_enable_clocks() argument
2016 struct ca0132_spec *spec = codec->spec; in chipio_enable_clocks()
2018 mutex_lock(&spec->chipio_mutex); in chipio_enable_clocks()
2020 chipio_8051_write_pll_pmu_no_mutex(codec, 0x00, 0xff); in chipio_enable_clocks()
2021 chipio_8051_write_pll_pmu_no_mutex(codec, 0x05, 0x0b); in chipio_enable_clocks()
2022 chipio_8051_write_pll_pmu_no_mutex(codec, 0x06, 0xff); in chipio_enable_clocks()
2024 mutex_unlock(&spec->chipio_mutex); in chipio_enable_clocks()
2030 static int dspio_send(struct hda_codec *codec, unsigned int reg, in dspio_send() argument
2038 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data); in dspio_send()
2039 if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY)) in dspio_send()
2044 return -EIO; in dspio_send()
2050 static void dspio_write_wait(struct hda_codec *codec) in dspio_write_wait() argument
2056 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write_wait()
2057 VENDOR_DSPIO_STATUS, 0); in dspio_write_wait()
2068 static int dspio_write(struct hda_codec *codec, unsigned int scp_data) in dspio_write() argument
2070 struct ca0132_spec *spec = codec->spec; in dspio_write()
2073 dspio_write_wait(codec); in dspio_write()
2075 mutex_lock(&spec->chipio_mutex); in dspio_write()
2076 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW, in dspio_write()
2077 scp_data & 0xffff); in dspio_write()
2078 if (status < 0) in dspio_write()
2081 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH, in dspio_write()
2083 if (status < 0) in dspio_write()
2087 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write()
2088 VENDOR_DSPIO_STATUS, 0); in dspio_write()
2090 mutex_unlock(&spec->chipio_mutex); in dspio_write()
2093 -EIO : 0; in dspio_write()
2099 static int dspio_write_multiple(struct hda_codec *codec, in dspio_write_multiple() argument
2102 int status = 0; in dspio_write_multiple()
2106 return -EINVAL; in dspio_write_multiple()
2108 count = 0; in dspio_write_multiple()
2110 status = dspio_write(codec, *buffer++); in dspio_write_multiple()
2111 if (status != 0) in dspio_write_multiple()
2119 static int dspio_read(struct hda_codec *codec, unsigned int *data) in dspio_read() argument
2123 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0); in dspio_read()
2124 if (status == -EIO) in dspio_read()
2127 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0); in dspio_read()
2128 if (status == -EIO || in dspio_read()
2130 return -EIO; in dspio_read()
2132 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_read()
2133 VENDOR_DSPIO_SCP_READ_DATA, 0); in dspio_read()
2135 return 0; in dspio_read()
2138 static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer, in dspio_read_multiple() argument
2141 int status = 0; in dspio_read_multiple()
2148 return -1; in dspio_read_multiple()
2150 count = 0; in dspio_read_multiple()
2152 status = dspio_read(codec, buffer++); in dspio_read_multiple()
2153 if (status != 0) in dspio_read_multiple()
2159 if (status == 0) { in dspio_read_multiple()
2161 status = dspio_read(codec, &dummy); in dspio_read_multiple()
2162 if (status != 0) in dspio_read_multiple()
2181 unsigned int header = 0; in make_scp_header()
2183 header = (data_size & 0x1f) << 27; in make_scp_header()
2184 header |= (error_flag & 0x01) << 26; in make_scp_header()
2185 header |= (resp_flag & 0x01) << 25; in make_scp_header()
2186 header |= (device_flag & 0x01) << 24; in make_scp_header()
2187 header |= (req & 0x7f) << 17; in make_scp_header()
2188 header |= (get_flag & 0x01) << 16; in make_scp_header()
2189 header |= (source_id & 0xff) << 8; in make_scp_header()
2190 header |= target_id & 0xff; in make_scp_header()
2206 *data_size = (header >> 27) & 0x1f; in extract_scp_header()
2208 *error_flag = (header >> 26) & 0x01; in extract_scp_header()
2210 *resp_flag = (header >> 25) & 0x01; in extract_scp_header()
2212 *device_flag = (header >> 24) & 0x01; in extract_scp_header()
2214 *req = (header >> 17) & 0x7f; in extract_scp_header()
2216 *get_flag = (header >> 16) & 0x01; in extract_scp_header()
2218 *source_id = (header >> 8) & 0xff; in extract_scp_header()
2220 *target_id = header & 0xff; in extract_scp_header()
2231 static void dspio_clear_response_queue(struct hda_codec *codec) in dspio_clear_response_queue() argument
2234 unsigned int dummy = 0; in dspio_clear_response_queue()
2239 status = dspio_read(codec, &dummy); in dspio_clear_response_queue()
2240 } while (status == 0 && time_before(jiffies, timeout)); in dspio_clear_response_queue()
2243 static int dspio_get_response_data(struct hda_codec *codec) in dspio_get_response_data() argument
2245 struct ca0132_spec *spec = codec->spec; in dspio_get_response_data()
2246 unsigned int data = 0; in dspio_get_response_data()
2249 if (dspio_read(codec, &data) < 0) in dspio_get_response_data()
2250 return -EIO; in dspio_get_response_data()
2252 if ((data & 0x00ffffff) == spec->wait_scp_header) { in dspio_get_response_data()
2253 spec->scp_resp_header = data; in dspio_get_response_data()
2254 spec->scp_resp_count = data >> 27; in dspio_get_response_data()
2255 count = spec->wait_num_data; in dspio_get_response_data()
2256 dspio_read_multiple(codec, spec->scp_resp_data, in dspio_get_response_data()
2257 &spec->scp_resp_count, count); in dspio_get_response_data()
2258 return 0; in dspio_get_response_data()
2261 return -EIO; in dspio_get_response_data()
2267 static int dspio_send_scp_message(struct hda_codec *codec, in dspio_send_scp_message() argument
2274 struct ca0132_spec *spec = codec->spec; in dspio_send_scp_message()
2276 unsigned int scp_send_size = 0; in dspio_send_scp_message()
2285 *bytes_returned = 0; in dspio_send_scp_message()
2295 return -EINVAL; in dspio_send_scp_message()
2299 return -EINVAL; in dspio_send_scp_message()
2301 spec->wait_scp_header = *((unsigned int *)send_buf); in dspio_send_scp_message()
2306 spec->wait_scp_header &= 0xffff0000; in dspio_send_scp_message()
2307 spec->wait_scp_header |= (resp_src_id << 8) | (resp_target_id); in dspio_send_scp_message()
2308 spec->wait_num_data = return_buf_size/sizeof(unsigned int) - 1; in dspio_send_scp_message()
2309 spec->wait_scp = 1; in dspio_send_scp_message()
2313 status = dspio_write_multiple(codec, (unsigned int *)send_buf, in dspio_send_scp_message()
2315 if (status < 0) { in dspio_send_scp_message()
2316 spec->wait_scp = 0; in dspio_send_scp_message()
2322 memset(return_buf, 0, return_buf_size); in dspio_send_scp_message()
2325 } while (spec->wait_scp && time_before(jiffies, timeout)); in dspio_send_scp_message()
2327 if (!spec->wait_scp) { in dspio_send_scp_message()
2329 memcpy(&ret_msg->hdr, &spec->scp_resp_header, 4); in dspio_send_scp_message()
2330 memcpy(&ret_msg->data, spec->scp_resp_data, in dspio_send_scp_message()
2331 spec->wait_num_data); in dspio_send_scp_message()
2332 *bytes_returned = (spec->scp_resp_count + 1) * 4; in dspio_send_scp_message()
2333 status = 0; in dspio_send_scp_message()
2335 status = -EIO; in dspio_send_scp_message()
2337 spec->wait_scp = 0; in dspio_send_scp_message()
2344 * dspio_scp - Prepare and send the SCP message to DSP
2345 * @codec: the HDA codec
2357 static int dspio_scp(struct hda_codec *codec, in dspio_scp() argument
2361 int status = 0; in dspio_scp()
2367 memset(&scp_send, 0, sizeof(scp_send)); in dspio_scp()
2368 memset(&scp_reply, 0, sizeof(scp_reply)); in dspio_scp()
2370 if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS)) in dspio_scp()
2371 return -EINVAL; in dspio_scp()
2374 codec_dbg(codec, "dspio_scp get but has no buffer\n"); in dspio_scp()
2375 return -EINVAL; in dspio_scp()
2378 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { in dspio_scp()
2379 codec_dbg(codec, "dspio_scp bad resp buf len parms\n"); in dspio_scp()
2380 return -EINVAL; in dspio_scp()
2384 0, 0, 0, len/sizeof(unsigned int)); in dspio_scp()
2385 if (data != NULL && len > 0) { in dspio_scp()
2390 ret_bytes = 0; in dspio_scp()
2392 status = dspio_send_scp_message(codec, (unsigned char *)&scp_send, in dspio_scp()
2396 if (status < 0) { in dspio_scp()
2397 codec_dbg(codec, "dspio_scp: send scp msg failed\n"); in dspio_scp()
2409 return 0; in dspio_scp()
2412 ret_size = (ret_bytes - sizeof(scp_reply.hdr)) in dspio_scp()
2416 codec_dbg(codec, "reply too long for buf\n"); in dspio_scp()
2417 return -EINVAL; in dspio_scp()
2419 codec_dbg(codec, "RetLen and HdrLen .NE.\n"); in dspio_scp()
2420 return -EINVAL; in dspio_scp()
2422 codec_dbg(codec, "NULL reply\n"); in dspio_scp()
2423 return -EINVAL; in dspio_scp()
2429 codec_dbg(codec, "reply ill-formed or errflag set\n"); in dspio_scp()
2430 return -EIO; in dspio_scp()
2439 static int dspio_set_param(struct hda_codec *codec, int mod_id, in dspio_set_param() argument
2442 return dspio_scp(codec, mod_id, src_id, req, SCP_SET, data, len, NULL, in dspio_set_param()
2446 static int dspio_set_uint_param(struct hda_codec *codec, int mod_id, in dspio_set_uint_param() argument
2449 return dspio_set_param(codec, mod_id, 0x20, req, &data, in dspio_set_uint_param()
2456 static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan) in dspio_alloc_dma_chan() argument
2458 int status = 0; in dspio_alloc_dma_chan()
2461 codec_dbg(codec, " dspio_alloc_dma_chan() -- begin\n"); in dspio_alloc_dma_chan()
2462 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_alloc_dma_chan()
2463 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0, in dspio_alloc_dma_chan()
2466 if (status < 0) { in dspio_alloc_dma_chan()
2467 codec_dbg(codec, "dspio_alloc_dma_chan: SCP Failed\n"); in dspio_alloc_dma_chan()
2471 if ((*dma_chan + 1) == 0) { in dspio_alloc_dma_chan()
2472 codec_dbg(codec, "no free dma channels to allocate\n"); in dspio_alloc_dma_chan()
2473 return -EBUSY; in dspio_alloc_dma_chan()
2476 codec_dbg(codec, "dspio_alloc_dma_chan: chan=%d\n", *dma_chan); in dspio_alloc_dma_chan()
2477 codec_dbg(codec, " dspio_alloc_dma_chan() -- complete\n"); in dspio_alloc_dma_chan()
2485 static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan) in dspio_free_dma_chan() argument
2487 int status = 0; in dspio_free_dma_chan()
2488 unsigned int dummy = 0; in dspio_free_dma_chan()
2490 codec_dbg(codec, " dspio_free_dma_chan() -- begin\n"); in dspio_free_dma_chan()
2491 codec_dbg(codec, "dspio_free_dma_chan: chan=%d\n", dma_chan); in dspio_free_dma_chan()
2493 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_free_dma_chan()
2497 if (status < 0) { in dspio_free_dma_chan()
2498 codec_dbg(codec, "dspio_free_dma_chan: SCP Failed\n"); in dspio_free_dma_chan()
2502 codec_dbg(codec, " dspio_free_dma_chan() -- complete\n"); in dspio_free_dma_chan()
2510 static int dsp_set_run_state(struct hda_codec *codec) in dsp_set_run_state() argument
2516 err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg); in dsp_set_run_state()
2517 if (err < 0) in dsp_set_run_state()
2523 if (halt_state != 0) { in dsp_set_run_state()
2526 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, in dsp_set_run_state()
2528 if (err < 0) in dsp_set_run_state()
2533 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, in dsp_set_run_state()
2535 if (err < 0) in dsp_set_run_state()
2539 return 0; in dsp_set_run_state()
2545 static int dsp_reset(struct hda_codec *codec) in dsp_reset() argument
2550 codec_dbg(codec, "dsp_reset\n"); in dsp_reset()
2552 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); in dsp_reset()
2553 retry--; in dsp_reset()
2554 } while (res == -EIO && retry); in dsp_reset()
2557 codec_dbg(codec, "dsp_reset timeout\n"); in dsp_reset()
2558 return -EIO; in dsp_reset()
2561 return 0; in dsp_reset()
2588 static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan) in dsp_is_dma_active() argument
2592 chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg); in dsp_is_dma_active()
2595 (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0); in dsp_is_dma_active()
2598 static int dsp_dma_setup_common(struct hda_codec *codec, in dsp_dma_setup_common() argument
2604 int status = 0; in dsp_dma_setup_common()
2610 codec_dbg(codec, "-- dsp_dma_setup_common() -- Begin ---------\n"); in dsp_dma_setup_common()
2613 codec_dbg(codec, "dma chan num invalid\n"); in dsp_dma_setup_common()
2614 return -EINVAL; in dsp_dma_setup_common()
2617 if (dsp_is_dma_active(codec, dma_chan)) { in dsp_dma_setup_common()
2618 codec_dbg(codec, "dma already active\n"); in dsp_dma_setup_common()
2619 return -EBUSY; in dsp_dma_setup_common()
2625 codec_dbg(codec, "invalid chip addr\n"); in dsp_dma_setup_common()
2626 return -ENXIO; in dsp_dma_setup_common()
2630 active = 0; in dsp_dma_setup_common()
2632 codec_dbg(codec, " dsp_dma_setup_common() start reg pgm\n"); in dsp_dma_setup_common()
2635 status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET, in dsp_dma_setup_common()
2638 if (status < 0) { in dsp_dma_setup_common()
2639 codec_dbg(codec, "read CHNLPROP Reg fail\n"); in dsp_dma_setup_common()
2642 codec_dbg(codec, "dsp_dma_setup_common() Read CHNLPROP\n"); in dsp_dma_setup_common()
2652 status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop); in dsp_dma_setup_common()
2653 if (status < 0) { in dsp_dma_setup_common()
2654 codec_dbg(codec, "write CHNLPROP Reg fail\n"); in dsp_dma_setup_common()
2657 codec_dbg(codec, " dsp_dma_setup_common() Write CHNLPROP\n"); in dsp_dma_setup_common()
2660 status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET, in dsp_dma_setup_common()
2663 if (status < 0) { in dsp_dma_setup_common()
2664 codec_dbg(codec, "read ACTIVE Reg fail\n"); in dsp_dma_setup_common()
2667 codec_dbg(codec, "dsp_dma_setup_common() Read ACTIVE\n"); in dsp_dma_setup_common()
2673 status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active); in dsp_dma_setup_common()
2674 if (status < 0) { in dsp_dma_setup_common()
2675 codec_dbg(codec, "write ACTIVE Reg fail\n"); in dsp_dma_setup_common()
2679 codec_dbg(codec, " dsp_dma_setup_common() Write ACTIVE\n"); in dsp_dma_setup_common()
2681 status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan), in dsp_dma_setup_common()
2683 if (status < 0) { in dsp_dma_setup_common()
2684 codec_dbg(codec, "write AUDCHSEL Reg fail\n"); in dsp_dma_setup_common()
2687 codec_dbg(codec, " dsp_dma_setup_common() Write AUDCHSEL\n"); in dsp_dma_setup_common()
2689 status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan), in dsp_dma_setup_common()
2691 if (status < 0) { in dsp_dma_setup_common()
2692 codec_dbg(codec, "write IRQCNT Reg fail\n"); in dsp_dma_setup_common()
2695 codec_dbg(codec, " dsp_dma_setup_common() Write IRQCNT\n"); in dsp_dma_setup_common()
2697 codec_dbg(codec, in dsp_dma_setup_common()
2698 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " in dsp_dma_setup_common()
2699 "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", in dsp_dma_setup_common()
2703 codec_dbg(codec, "-- dsp_dma_setup_common() -- Complete ------\n"); in dsp_dma_setup_common()
2705 return 0; in dsp_dma_setup_common()
2709 * Setup the DSP DMA per-transfer-specific registers
2711 static int dsp_dma_setup(struct hda_codec *codec, in dsp_dma_setup() argument
2716 int status = 0; in dsp_dma_setup()
2723 unsigned int dma_cfg = 0; in dsp_dma_setup()
2724 unsigned int adr_ofs = 0; in dsp_dma_setup()
2725 unsigned int xfr_cnt = 0; in dsp_dma_setup()
2726 const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT - in dsp_dma_setup()
2729 codec_dbg(codec, "-- dsp_dma_setup() -- Begin ---------\n"); in dsp_dma_setup()
2732 codec_dbg(codec, "count too big\n"); in dsp_dma_setup()
2733 return -EINVAL; in dsp_dma_setup()
2738 codec_dbg(codec, "invalid chip addr\n"); in dsp_dma_setup()
2739 return -ENXIO; in dsp_dma_setup()
2742 codec_dbg(codec, " dsp_dma_setup() start reg pgm\n"); in dsp_dma_setup()
2745 incr_field = 0; in dsp_dma_setup()
2756 status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan), in dsp_dma_setup()
2758 if (status < 0) { in dsp_dma_setup()
2759 codec_dbg(codec, "write DMACFG Reg fail\n"); in dsp_dma_setup()
2762 codec_dbg(codec, " dsp_dma_setup() Write DMACFG\n"); in dsp_dma_setup()
2764 adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT + in dsp_dma_setup()
2765 (code ? 0 : 1)); in dsp_dma_setup()
2767 status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan), in dsp_dma_setup()
2769 if (status < 0) { in dsp_dma_setup()
2770 codec_dbg(codec, "write DSPADROFS Reg fail\n"); in dsp_dma_setup()
2773 codec_dbg(codec, " dsp_dma_setup() Write DSPADROFS\n"); in dsp_dma_setup()
2775 base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT; in dsp_dma_setup()
2777 cur_cnt = (count - 1) << DSPDMAC_XFRCNT_CCNT_LOBIT; in dsp_dma_setup()
2781 status = chipio_write(codec, in dsp_dma_setup()
2783 if (status < 0) { in dsp_dma_setup()
2784 codec_dbg(codec, "write XFRCNT Reg fail\n"); in dsp_dma_setup()
2787 codec_dbg(codec, " dsp_dma_setup() Write XFRCNT\n"); in dsp_dma_setup()
2789 codec_dbg(codec, in dsp_dma_setup()
2790 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " in dsp_dma_setup()
2791 "ADROFS=0x%x, XFRCNT=0x%x\n", in dsp_dma_setup()
2794 codec_dbg(codec, "-- dsp_dma_setup() -- Complete ---------\n"); in dsp_dma_setup()
2796 return 0; in dsp_dma_setup()
2802 static int dsp_dma_start(struct hda_codec *codec, in dsp_dma_start() argument
2805 unsigned int reg = 0; in dsp_dma_start()
2806 int status = 0; in dsp_dma_start()
2808 codec_dbg(codec, "-- dsp_dma_start() -- Begin ---------\n"); in dsp_dma_start()
2811 status = chipio_read(codec, in dsp_dma_start()
2814 if (status < 0) { in dsp_dma_start()
2815 codec_dbg(codec, "read CHNLSTART reg fail\n"); in dsp_dma_start()
2818 codec_dbg(codec, "-- dsp_dma_start() Read CHNLSTART\n"); in dsp_dma_start()
2824 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, in dsp_dma_start()
2826 if (status < 0) { in dsp_dma_start()
2827 codec_dbg(codec, "write CHNLSTART reg fail\n"); in dsp_dma_start()
2830 codec_dbg(codec, "-- dsp_dma_start() -- Complete ---------\n"); in dsp_dma_start()
2838 static int dsp_dma_stop(struct hda_codec *codec, in dsp_dma_stop() argument
2841 unsigned int reg = 0; in dsp_dma_stop()
2842 int status = 0; in dsp_dma_stop()
2844 codec_dbg(codec, "-- dsp_dma_stop() -- Begin ---------\n"); in dsp_dma_stop()
2847 status = chipio_read(codec, in dsp_dma_stop()
2850 if (status < 0) { in dsp_dma_stop()
2851 codec_dbg(codec, "read CHNLSTART reg fail\n"); in dsp_dma_stop()
2854 codec_dbg(codec, "-- dsp_dma_stop() Read CHNLSTART\n"); in dsp_dma_stop()
2859 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, in dsp_dma_stop()
2861 if (status < 0) { in dsp_dma_stop()
2862 codec_dbg(codec, "write CHNLSTART reg fail\n"); in dsp_dma_stop()
2865 codec_dbg(codec, "-- dsp_dma_stop() -- Complete ---------\n"); in dsp_dma_stop()
2871 * dsp_allocate_router_ports - Allocate router ports
2873 * @codec: the HDA codec
2881 static int dsp_allocate_router_ports(struct hda_codec *codec, in dsp_allocate_router_ports() argument
2887 int status = 0; in dsp_allocate_router_ports()
2891 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2892 if (status < 0) in dsp_allocate_router_ports()
2896 val |= (ports_per_channel - 1) << 4; in dsp_allocate_router_ports()
2897 val |= num_chans - 1; in dsp_allocate_router_ports()
2899 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2903 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2907 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2908 if (status < 0) in dsp_allocate_router_ports()
2911 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2912 VENDOR_CHIPIO_PORT_ALLOC_GET, 0); in dsp_allocate_router_ports()
2916 return (res < 0) ? res : 0; in dsp_allocate_router_ports()
2922 static int dsp_free_router_ports(struct hda_codec *codec) in dsp_free_router_ports() argument
2924 int status = 0; in dsp_free_router_ports()
2926 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2927 if (status < 0) in dsp_free_router_ports()
2930 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_free_router_ports()
2934 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2942 static int dsp_allocate_ports(struct hda_codec *codec, in dsp_allocate_ports() argument
2948 codec_dbg(codec, " dsp_allocate_ports() -- begin\n"); in dsp_allocate_ports()
2951 codec_dbg(codec, "bad rate multiple\n"); in dsp_allocate_ports()
2952 return -EINVAL; in dsp_allocate_ports()
2955 status = dsp_allocate_router_ports(codec, num_chans, in dsp_allocate_ports()
2956 rate_multi, 0, port_map); in dsp_allocate_ports()
2958 codec_dbg(codec, " dsp_allocate_ports() -- complete\n"); in dsp_allocate_ports()
2963 static int dsp_allocate_ports_format(struct hda_codec *codec, in dsp_allocate_ports_format() argument
2969 unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1; in dsp_allocate_ports_format()
2974 codec_dbg(codec, "bad rate multiple\n"); in dsp_allocate_ports_format()
2975 return -EINVAL; in dsp_allocate_ports_format()
2980 return dsp_allocate_ports(codec, num_chans, rate_multi, port_map); in dsp_allocate_ports_format()
2986 static int dsp_free_ports(struct hda_codec *codec) in dsp_free_ports() argument
2990 codec_dbg(codec, " dsp_free_ports() -- begin\n"); in dsp_free_ports()
2992 status = dsp_free_router_ports(codec); in dsp_free_ports()
2993 if (status < 0) { in dsp_free_ports()
2994 codec_dbg(codec, "free router ports fail\n"); in dsp_free_ports()
2997 codec_dbg(codec, " dsp_free_ports() -- complete\n"); in dsp_free_ports()
3006 struct hda_codec *codec; member
3014 DMA_STATE_STOP = 0,
3018 static int dma_convert_to_hda_format(struct hda_codec *codec, in dma_convert_to_hda_format() argument
3026 channels, SNDRV_PCM_FORMAT_S32_LE, 32, 0); in dma_convert_to_hda_format()
3031 return 0; in dma_convert_to_hda_format()
3039 struct hda_codec *codec = dma->codec; in dma_reset() local
3040 struct ca0132_spec *spec = codec->spec; in dma_reset()
3043 if (dma->dmab->area) in dma_reset()
3044 snd_hda_codec_load_dsp_cleanup(codec, dma->dmab); in dma_reset()
3046 status = snd_hda_codec_load_dsp_prepare(codec, in dma_reset()
3047 dma->m_converter_format, in dma_reset()
3048 dma->buf_size, in dma_reset()
3049 dma->dmab); in dma_reset()
3050 if (status < 0) in dma_reset()
3052 spec->dsp_stream_id = status; in dma_reset()
3053 return 0; in dma_reset()
3068 return 0; in dma_set_state()
3071 snd_hda_codec_load_dsp_trigger(dma->codec, cmd); in dma_set_state()
3072 return 0; in dma_set_state()
3077 return dma->dmab->bytes; in dma_get_buffer_size()
3082 return dma->dmab->area; in dma_get_buffer_addr()
3089 memcpy(dma->dmab->area, data, count); in dma_xfer()
3090 return 0; in dma_xfer()
3098 *format = dma->m_converter_format; in dma_get_converter_format()
3103 struct ca0132_spec *spec = dma->codec->spec; in dma_get_stream_id()
3105 return spec->dsp_stream_id; in dma_get_stream_id()
3115 static const u32 g_magic_value = 0x4c46584d;
3116 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
3120 return p->magic == g_magic_value; in is_valid()
3125 return g_chip_addr_magic_value == p->chip_addr; in is_hci_prog_list_seg()
3130 return p->count == 0; in is_last()
3135 return struct_size(p, data, p->count); in dsp_sizeof()
3147 #define INVALID_DMA_CHANNEL (~0U)
3154 static int dspxfr_hci_write(struct hda_codec *codec, in dspxfr_hci_write() argument
3161 if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) { in dspxfr_hci_write()
3162 codec_dbg(codec, "hci_write invalid params\n"); in dspxfr_hci_write()
3163 return -EINVAL; in dspxfr_hci_write()
3166 count = fls->count; in dspxfr_hci_write()
3167 data = (u32 *)(fls->data); in dspxfr_hci_write()
3169 status = chipio_write(codec, data[0], data[1]); in dspxfr_hci_write()
3170 if (status < 0) { in dspxfr_hci_write()
3171 codec_dbg(codec, "hci_write chipio failed\n"); in dspxfr_hci_write()
3174 count -= 2; in dspxfr_hci_write()
3177 return 0; in dspxfr_hci_write()
3181 * dspxfr_one_seg - Write a block of data into DSP code or data RAM using pre-allocated DMA engine.
3183 * @codec: the HDA codec
3185 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3194 static int dspxfr_one_seg(struct hda_codec *codec, in dspxfr_one_seg() argument
3202 int status = 0; in dspxfr_one_seg()
3223 return -EINVAL; in dspxfr_one_seg()
3230 codec_dbg(codec, "hci_write\n"); in dspxfr_one_seg()
3231 return dspxfr_hci_write(codec, hci_write); in dspxfr_one_seg()
3234 if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { in dspxfr_one_seg()
3235 codec_dbg(codec, "Invalid Params\n"); in dspxfr_one_seg()
3236 return -EINVAL; in dspxfr_one_seg()
3239 data = fls->data; in dspxfr_one_seg()
3240 chip_addx = fls->chip_addr; in dspxfr_one_seg()
3241 words_to_write = fls->count; in dspxfr_one_seg()
3244 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0; in dspxfr_one_seg()
3246 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); in dspxfr_one_seg()
3251 codec_dbg(codec, "Invalid chip_addx Params\n"); in dspxfr_one_seg()
3252 return -EINVAL; in dspxfr_one_seg()
3261 codec_dbg(codec, "dma_engine buffer NULL\n"); in dspxfr_one_seg()
3262 return -EINVAL; in dspxfr_one_seg()
3266 sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1; in dspxfr_one_seg()
3270 hda_frame_size_words = ((sample_rate_div == 0) ? 0 : in dspxfr_one_seg()
3273 if (hda_frame_size_words == 0) { in dspxfr_one_seg()
3274 codec_dbg(codec, "frmsz zero\n"); in dspxfr_one_seg()
3275 return -EINVAL; in dspxfr_one_seg()
3281 buffer_size_words -= buffer_size_words % hda_frame_size_words; in dspxfr_one_seg()
3282 codec_dbg(codec, in dspxfr_one_seg()
3283 "chpadr=0x%08x frmsz=%u nchan=%u " in dspxfr_one_seg()
3289 codec_dbg(codec, "dspxfr_one_seg:failed\n"); in dspxfr_one_seg()
3290 return -EINVAL; in dspxfr_one_seg()
3299 words_to_write -= remainder_words; in dspxfr_one_seg()
3301 while (words_to_write != 0) { in dspxfr_one_seg()
3303 codec_dbg(codec, "dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n", in dspxfr_one_seg()
3307 status = dsp_dma_stop(codec, dma_chan, ovly); in dspxfr_one_seg()
3308 if (status < 0) in dspxfr_one_seg()
3310 status = dsp_dma_setup_common(codec, chip_addx, in dspxfr_one_seg()
3312 if (status < 0) in dspxfr_one_seg()
3317 status = dsp_dma_setup(codec, chip_addx, in dspxfr_one_seg()
3319 if (status < 0) in dspxfr_one_seg()
3321 status = dsp_dma_start(codec, dma_chan, ovly); in dspxfr_one_seg()
3322 if (status < 0) in dspxfr_one_seg()
3324 if (!dsp_is_dma_active(codec, dma_chan)) { in dspxfr_one_seg()
3325 codec_dbg(codec, "dspxfr:DMA did not start\n"); in dspxfr_one_seg()
3326 return -EIO; in dspxfr_one_seg()
3329 if (status < 0) in dspxfr_one_seg()
3331 if (remainder_words != 0) { in dspxfr_one_seg()
3332 status = chipio_write_multiple(codec, in dspxfr_one_seg()
3336 if (status < 0) in dspxfr_one_seg()
3338 remainder_words = 0; in dspxfr_one_seg()
3341 status = dspxfr_hci_write(codec, hci_write); in dspxfr_one_seg()
3342 if (status < 0) in dspxfr_one_seg()
3349 dma_active = dsp_is_dma_active(codec, dma_chan); in dspxfr_one_seg()
3357 codec_dbg(codec, "+++++ DMA complete\n"); in dspxfr_one_seg()
3361 if (status < 0) in dspxfr_one_seg()
3366 words_to_write -= run_size_words; in dspxfr_one_seg()
3369 if (remainder_words != 0) { in dspxfr_one_seg()
3370 status = chipio_write_multiple(codec, chip_addx_remainder, in dspxfr_one_seg()
3378 * dspxfr_image - Write the entire DSP image of a DSP code/data overlay to DSP memories
3380 * @codec: the HDA codec
3382 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3390 static int dspxfr_image(struct hda_codec *codec, in dspxfr_image() argument
3397 struct ca0132_spec *spec = codec->spec; in dspxfr_image()
3399 unsigned short hda_format = 0; in dspxfr_image()
3401 unsigned char stream_id = 0; in dspxfr_image()
3407 return -EINVAL; in dspxfr_image()
3411 return -ENOMEM; in dspxfr_image()
3413 dma_engine->dmab = kzalloc(sizeof(*dma_engine->dmab), GFP_KERNEL); in dspxfr_image()
3414 if (!dma_engine->dmab) { in dspxfr_image()
3416 return -ENOMEM; in dspxfr_image()
3419 dma_engine->codec = codec; in dspxfr_image()
3420 dma_convert_to_hda_format(codec, sample_rate, channels, &hda_format); in dspxfr_image()
3421 dma_engine->m_converter_format = hda_format; in dspxfr_image()
3422 dma_engine->buf_size = (ovly ? DSP_DMA_WRITE_BUFLEN_OVLY : in dspxfr_image()
3425 dma_chan = ovly ? INVALID_DMA_CHANNEL : 0; in dspxfr_image()
3427 status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL, in dspxfr_image()
3430 if (status < 0) { in dspxfr_image()
3431 codec_dbg(codec, "set converter format fail\n"); in dspxfr_image()
3435 status = snd_hda_codec_load_dsp_prepare(codec, in dspxfr_image()
3436 dma_engine->m_converter_format, in dspxfr_image()
3437 dma_engine->buf_size, in dspxfr_image()
3438 dma_engine->dmab); in dspxfr_image()
3439 if (status < 0) in dspxfr_image()
3441 spec->dsp_stream_id = status; in dspxfr_image()
3444 status = dspio_alloc_dma_chan(codec, &dma_chan); in dspxfr_image()
3445 if (status < 0) { in dspxfr_image()
3446 codec_dbg(codec, "alloc dmachan fail\n"); in dspxfr_image()
3452 port_map_mask = 0; in dspxfr_image()
3453 status = dsp_allocate_ports_format(codec, hda_format, in dspxfr_image()
3455 if (status < 0) { in dspxfr_image()
3456 codec_dbg(codec, "alloc ports fail\n"); in dspxfr_image()
3461 status = codec_set_converter_stream_channel(codec, in dspxfr_image()
3462 WIDGET_CHIP_CTRL, stream_id, 0, &response); in dspxfr_image()
3463 if (status < 0) { in dspxfr_image()
3464 codec_dbg(codec, "set stream chan fail\n"); in dspxfr_image()
3470 codec_dbg(codec, "FLS check fail\n"); in dspxfr_image()
3471 status = -EINVAL; in dspxfr_image()
3474 status = dspxfr_one_seg(codec, fls_data, reloc, in dspxfr_image()
3477 if (status < 0) in dspxfr_image()
3487 if (port_map_mask != 0) in dspxfr_image()
3488 status = dsp_free_ports(codec); in dspxfr_image()
3490 if (status < 0) in dspxfr_image()
3493 status = codec_set_converter_stream_channel(codec, in dspxfr_image()
3494 WIDGET_CHIP_CTRL, 0, 0, &response); in dspxfr_image()
3498 dspio_free_dma_chan(codec, dma_chan); in dspxfr_image()
3500 if (dma_engine->dmab->area) in dspxfr_image()
3501 snd_hda_codec_load_dsp_cleanup(codec, dma_engine->dmab); in dspxfr_image()
3502 kfree(dma_engine->dmab); in dspxfr_image()
3511 static void dspload_post_setup(struct hda_codec *codec) in dspload_post_setup() argument
3513 struct ca0132_spec *spec = codec->spec; in dspload_post_setup()
3514 codec_dbg(codec, "---- dspload_post_setup ------\n"); in dspload_post_setup()
3517 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); in dspload_post_setup()
3518 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); in dspload_post_setup()
3521 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002); in dspload_post_setup()
3526 * dspload_image - Download DSP from a DSP Image Fast Load structure.
3528 * @codec: the HDA codec
3531 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3534 * @router_chans: number of audio router channels to be allocated (0 means use
3538 * linear, non-constant sized element array of structures, each of which
3543 static int dspload_image(struct hda_codec *codec, in dspload_image() argument
3550 int status = 0; in dspload_image()
3554 codec_dbg(codec, "---- dspload_image begin ------\n"); in dspload_image()
3555 if (router_chans == 0) { in dspload_image()
3571 codec_dbg(codec, "Ready to program DMA\n"); in dspload_image()
3573 status = dsp_reset(codec); in dspload_image()
3575 if (status < 0) in dspload_image()
3578 codec_dbg(codec, "dsp_reset() complete\n"); in dspload_image()
3579 status = dspxfr_image(codec, fls, reloc, sample_rate, channels, in dspload_image()
3582 if (status < 0) in dspload_image()
3585 codec_dbg(codec, "dspxfr_image() complete\n"); in dspload_image()
3587 dspload_post_setup(codec); in dspload_image()
3588 status = dsp_set_run_state(codec); in dspload_image()
3591 codec_dbg(codec, "LOAD FINISHED\n"); in dspload_image()
3592 } while (0); in dspload_image()
3598 static bool dspload_is_loaded(struct hda_codec *codec) in dspload_is_loaded() argument
3600 unsigned int data = 0; in dspload_is_loaded()
3601 int status = 0; in dspload_is_loaded()
3603 status = chipio_read(codec, 0x40004, &data); in dspload_is_loaded()
3604 if ((status < 0) || (data != 1)) in dspload_is_loaded()
3610 #define dspload_is_loaded(codec) false argument
3613 static bool dspload_wait_loaded(struct hda_codec *codec) in dspload_wait_loaded() argument
3618 if (dspload_is_loaded(codec)) { in dspload_wait_loaded()
3619 codec_info(codec, "ca0132 DSP downloaded and running\n"); in dspload_wait_loaded()
3625 codec_err(codec, "ca0132 failed to download DSP\n"); in dspload_wait_loaded()
3630 * ca0113 related functions. The ca0113 acts as the HDA bus for the pci-e
3636 * For cards with PCI-E region2 (Sound Blaster Z/ZxR, Recon3D, and AE-5)
3637 * the mmio address 0x320 is used to set GPIO pins. The format for the data
3640 * AE-5 note: The AE-5 seems to use pins 2 and 3 to somehow set the color value
3641 * of the on-card LED. It seems to use pin 2 for data, then toggles 3 to on and
3644 static void ca0113_mmio_gpio_set(struct hda_codec *codec, unsigned int gpio_pin, in ca0113_mmio_gpio_set() argument
3647 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_gpio_set()
3650 gpio_data = gpio_pin & 0xF; in ca0113_mmio_gpio_set()
3651 gpio_data |= ((enable << 8) & 0x100); in ca0113_mmio_gpio_set()
3653 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3657 * Special pci region2 commands that are only used by the AE-5. They follow
3662 * target-id, and value.
3664 static void ca0113_mmio_command_set(struct hda_codec *codec, unsigned int group, in ca0113_mmio_command_set() argument
3667 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_command_set()
3670 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3671 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3672 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3673 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3674 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3676 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3677 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3679 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3680 write_val = (target & 0xff); in ca0113_mmio_command_set()
3684 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3690 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3691 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3692 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3694 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3695 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3696 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3697 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3703 static void ca0113_mmio_command_set_type2(struct hda_codec *codec, in ca0113_mmio_command_set_type2() argument
3706 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_command_set_type2()
3709 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3710 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3711 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3712 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3713 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3715 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3716 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3718 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3719 write_val = (target & 0xff); in ca0113_mmio_command_set_type2()
3723 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3725 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3726 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3727 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3729 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3730 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3731 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3732 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3743 static void ca0132_gpio_init(struct hda_codec *codec) in ca0132_gpio_init() argument
3745 struct ca0132_spec *spec = codec->spec; in ca0132_gpio_init()
3751 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3752 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ca0132_gpio_init()
3753 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23); in ca0132_gpio_init()
3756 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3757 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); in ca0132_gpio_init()
3766 static void ca0132_gpio_setup(struct hda_codec *codec) in ca0132_gpio_setup() argument
3768 struct ca0132_spec *spec = codec->spec; in ca0132_gpio_setup()
3772 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3773 AC_VERB_SET_GPIO_DIRECTION, 0x07); in ca0132_gpio_setup()
3774 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3775 AC_VERB_SET_GPIO_MASK, 0x07); in ca0132_gpio_setup()
3776 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3777 AC_VERB_SET_GPIO_DATA, 0x04); in ca0132_gpio_setup()
3778 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3779 AC_VERB_SET_GPIO_DATA, 0x06); in ca0132_gpio_setup()
3782 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3783 AC_VERB_SET_GPIO_DIRECTION, 0x1E); in ca0132_gpio_setup()
3784 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3785 AC_VERB_SET_GPIO_MASK, 0x1F); in ca0132_gpio_setup()
3786 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3787 AC_VERB_SET_GPIO_DATA, 0x0C); in ca0132_gpio_setup()
3799 /* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3801 /* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3816 /* Set GPIO bit 1 to 0 for rear mic */
3817 R3DI_REAR_MIC = 0,
3823 /* Set GPIO bit 2 to 0 for headphone */
3824 R3DI_HEADPHONE_OUT = 0,
3830 R3DI_DSP_DOWNLOADING = 0,
3836 static void r3di_gpio_mic_set(struct hda_codec *codec, in r3di_gpio_mic_set() argument
3842 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_mic_set()
3852 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_mic_set()
3856 static void r3di_gpio_dsp_status_set(struct hda_codec *codec, in r3di_gpio_dsp_status_set() argument
3862 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_dsp_status_set()
3867 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3871 /* Set DOWNLOADING bit to 0. */ in r3di_gpio_dsp_status_set()
3874 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3881 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3889 struct hda_codec *codec, in ca0132_playback_pcm_prepare() argument
3894 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_prepare()
3896 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); in ca0132_playback_pcm_prepare()
3898 return 0; in ca0132_playback_pcm_prepare()
3902 struct hda_codec *codec, in ca0132_playback_pcm_cleanup() argument
3905 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_cleanup()
3907 if (spec->dsp_state == DSP_DOWNLOADING) in ca0132_playback_pcm_cleanup()
3908 return 0; in ca0132_playback_pcm_cleanup()
3912 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) in ca0132_playback_pcm_cleanup()
3915 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_playback_pcm_cleanup()
3917 return 0; in ca0132_playback_pcm_cleanup()
3921 struct hda_codec *codec, in ca0132_playback_pcm_delay() argument
3924 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_delay()
3926 struct snd_pcm_runtime *runtime = substream->runtime; in ca0132_playback_pcm_delay()
3928 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_playback_pcm_delay()
3929 return 0; in ca0132_playback_pcm_delay()
3932 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) { in ca0132_playback_pcm_delay()
3933 if ((spec->effects_switch[SURROUND - EFFECT_START_NID]) || in ca0132_playback_pcm_delay()
3934 (spec->effects_switch[DIALOG_PLUS - EFFECT_START_NID])) in ca0132_playback_pcm_delay()
3939 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_playback_pcm_delay()
3942 return (latency * runtime->rate) / 1000; in ca0132_playback_pcm_delay()
3949 struct hda_codec *codec, in ca0132_dig_playback_pcm_open() argument
3952 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_open()
3953 return snd_hda_multi_out_dig_open(codec, &spec->multiout); in ca0132_dig_playback_pcm_open()
3957 struct hda_codec *codec, in ca0132_dig_playback_pcm_prepare() argument
3962 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_prepare()
3963 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, in ca0132_dig_playback_pcm_prepare()
3968 struct hda_codec *codec, in ca0132_dig_playback_pcm_cleanup() argument
3971 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_cleanup()
3972 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout); in ca0132_dig_playback_pcm_cleanup()
3976 struct hda_codec *codec, in ca0132_dig_playback_pcm_close() argument
3979 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_close()
3980 return snd_hda_multi_out_dig_close(codec, &spec->multiout); in ca0132_dig_playback_pcm_close()
3987 struct hda_codec *codec, in ca0132_capture_pcm_prepare() argument
3992 snd_hda_codec_setup_stream(codec, hinfo->nid, in ca0132_capture_pcm_prepare()
3993 stream_tag, 0, format); in ca0132_capture_pcm_prepare()
3995 return 0; in ca0132_capture_pcm_prepare()
3999 struct hda_codec *codec, in ca0132_capture_pcm_cleanup() argument
4002 struct ca0132_spec *spec = codec->spec; in ca0132_capture_pcm_cleanup()
4004 if (spec->dsp_state == DSP_DOWNLOADING) in ca0132_capture_pcm_cleanup()
4005 return 0; in ca0132_capture_pcm_cleanup()
4007 snd_hda_codec_cleanup_stream(codec, hinfo->nid); in ca0132_capture_pcm_cleanup()
4008 return 0; in ca0132_capture_pcm_cleanup()
4012 struct hda_codec *codec, in ca0132_capture_pcm_delay() argument
4015 struct ca0132_spec *spec = codec->spec; in ca0132_capture_pcm_delay()
4017 struct snd_pcm_runtime *runtime = substream->runtime; in ca0132_capture_pcm_delay()
4019 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_capture_pcm_delay()
4020 return 0; in ca0132_capture_pcm_delay()
4022 if (spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) in ca0132_capture_pcm_delay()
4025 return (latency * runtime->rate) / 1000; in ca0132_capture_pcm_delay()
4046 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4064 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4073 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4089 * values -90 to 9. -90 is the lowest decibel value for both the ADC's and the
4093 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
4094 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
4095 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
4096 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
4097 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
4098 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
4099 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
4100 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
4101 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
4102 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
4103 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
4104 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4105 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4106 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4107 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4108 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4109 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
4113 * This table counts from float 0 to 1 in increments of .01, which is
4117 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4118 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4119 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4120 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4121 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4122 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4123 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4124 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4125 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4126 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4127 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4128 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4129 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4130 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4131 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4132 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4133 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4137 * This table counts from float 10 to 1000, which is the range of the x-bass
4141 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
4142 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
4143 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
4144 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
4145 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
4146 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
4147 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
4148 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
4149 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
4150 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
4151 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
4152 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
4153 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
4154 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
4155 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
4156 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
4157 0x44728000, 0x44750000, 0x44778000, 0x447A0000
4164 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
4165 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
4166 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
4167 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
4168 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
4169 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
4170 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
4171 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
4172 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
4173 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
4174 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
4175 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
4176 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
4177 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
4178 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
4179 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
4180 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
4181 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
4182 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
4183 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
4184 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
4185 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
4186 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
4187 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
4188 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
4189 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
4190 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
4194 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4195 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4196 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4197 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4198 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4199 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4200 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4201 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4202 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4203 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4204 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4205 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4206 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4207 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4208 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4209 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4210 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4214 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4215 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4216 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4217 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4218 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4219 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
4220 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
4221 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
4222 0x41C00000
4225 static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid, in tuning_ctl_set() argument
4228 int i = 0; in tuning_ctl_set()
4230 for (i = 0; i < TUNING_CTLS_COUNT; i++) in tuning_ctl_set()
4234 return -EINVAL; in tuning_ctl_set()
4236 snd_hda_power_up(codec); in tuning_ctl_set()
4237 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20, in tuning_ctl_set()
4240 snd_hda_power_down(codec); in tuning_ctl_set()
4248 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in tuning_ctl_get() local
4249 struct ca0132_spec *spec = codec->spec; in tuning_ctl_get()
4251 long *valp = ucontrol->value.integer.value; in tuning_ctl_get()
4252 int idx = nid - TUNING_CTL_START_NID; in tuning_ctl_get()
4254 *valp = spec->cur_ctl_vals[idx]; in tuning_ctl_get()
4255 return 0; in tuning_ctl_get()
4262 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in voice_focus_ctl_info()
4263 uinfo->count = chs == 3 ? 2 : 1; in voice_focus_ctl_info()
4264 uinfo->value.integer.min = 20; in voice_focus_ctl_info()
4265 uinfo->value.integer.max = 180; in voice_focus_ctl_info()
4266 uinfo->value.integer.step = 1; in voice_focus_ctl_info()
4268 return 0; in voice_focus_ctl_info()
4274 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in voice_focus_ctl_put() local
4275 struct ca0132_spec *spec = codec->spec; in voice_focus_ctl_put()
4277 long *valp = ucontrol->value.integer.value; in voice_focus_ctl_put()
4280 idx = nid - TUNING_CTL_START_NID; in voice_focus_ctl_put()
4282 if (spec->cur_ctl_vals[idx] == *valp) in voice_focus_ctl_put()
4283 return 0; in voice_focus_ctl_put()
4285 spec->cur_ctl_vals[idx] = *valp; in voice_focus_ctl_put()
4287 idx = *valp - 20; in voice_focus_ctl_put()
4288 tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx); in voice_focus_ctl_put()
4297 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in mic_svm_ctl_info()
4298 uinfo->count = chs == 3 ? 2 : 1; in mic_svm_ctl_info()
4299 uinfo->value.integer.min = 0; in mic_svm_ctl_info()
4300 uinfo->value.integer.max = 100; in mic_svm_ctl_info()
4301 uinfo->value.integer.step = 1; in mic_svm_ctl_info()
4303 return 0; in mic_svm_ctl_info()
4309 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in mic_svm_ctl_put() local
4310 struct ca0132_spec *spec = codec->spec; in mic_svm_ctl_put()
4312 long *valp = ucontrol->value.integer.value; in mic_svm_ctl_put()
4315 idx = nid - TUNING_CTL_START_NID; in mic_svm_ctl_put()
4317 if (spec->cur_ctl_vals[idx] == *valp) in mic_svm_ctl_put()
4318 return 0; in mic_svm_ctl_put()
4320 spec->cur_ctl_vals[idx] = *valp; in mic_svm_ctl_put()
4323 tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx); in mic_svm_ctl_put()
4325 return 0; in mic_svm_ctl_put()
4332 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in equalizer_ctl_info()
4333 uinfo->count = chs == 3 ? 2 : 1; in equalizer_ctl_info()
4334 uinfo->value.integer.min = 0; in equalizer_ctl_info()
4335 uinfo->value.integer.max = 48; in equalizer_ctl_info()
4336 uinfo->value.integer.step = 1; in equalizer_ctl_info()
4338 return 0; in equalizer_ctl_info()
4344 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in equalizer_ctl_put() local
4345 struct ca0132_spec *spec = codec->spec; in equalizer_ctl_put()
4347 long *valp = ucontrol->value.integer.value; in equalizer_ctl_put()
4350 idx = nid - TUNING_CTL_START_NID; in equalizer_ctl_put()
4352 if (spec->cur_ctl_vals[idx] == *valp) in equalizer_ctl_put()
4353 return 0; in equalizer_ctl_put()
4355 spec->cur_ctl_vals[idx] = *valp; in equalizer_ctl_put()
4358 tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx); in equalizer_ctl_put()
4363 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
4364 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
4366 static int add_tuning_control(struct hda_codec *codec, in add_tuning_control() argument
4373 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in add_tuning_control()
4377 knew.tlv.c = 0; in add_tuning_control()
4378 knew.tlv.p = 0; in add_tuning_control()
4398 return 0; in add_tuning_control()
4401 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in add_tuning_control()
4403 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in add_tuning_control()
4406 static int add_tuning_ctls(struct hda_codec *codec) in add_tuning_ctls() argument
4411 for (i = 0; i < TUNING_CTLS_COUNT; i++) { in add_tuning_ctls()
4412 err = add_tuning_control(codec, in add_tuning_ctls()
4417 if (err < 0) in add_tuning_ctls()
4421 return 0; in add_tuning_ctls()
4424 static void ca0132_init_tuning_defaults(struct hda_codec *codec) in ca0132_init_tuning_defaults() argument
4426 struct ca0132_spec *spec = codec->spec; in ca0132_init_tuning_defaults()
4429 /* Wedge Angle defaults to 30. 10 below is 30 - 20. 20 is min. */ in ca0132_init_tuning_defaults()
4430 spec->cur_ctl_vals[WEDGE_ANGLE - TUNING_CTL_START_NID] = 10; in ca0132_init_tuning_defaults()
4432 spec->cur_ctl_vals[SVM_LEVEL - TUNING_CTL_START_NID] = 74; in ca0132_init_tuning_defaults()
4434 /* EQ defaults to 0dB. */ in ca0132_init_tuning_defaults()
4436 spec->cur_ctl_vals[i] = 24; in ca0132_init_tuning_defaults()
4443 * If jack inserted, headphone will be selected, else built-in speakers
4446 static int ca0132_select_out(struct hda_codec *codec) in ca0132_select_out() argument
4448 struct ca0132_spec *spec = codec->spec; in ca0132_select_out()
4455 codec_dbg(codec, "ca0132_select_out\n"); in ca0132_select_out()
4457 snd_hda_power_up_pm(codec); in ca0132_select_out()
4459 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_select_out()
4462 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp); in ca0132_select_out()
4465 spec->vnode_lswitch[VNID_HP_SEL - VNODE_START_NID]; in ca0132_select_out()
4468 spec->cur_out_type = HEADPHONE_OUT; in ca0132_select_out()
4470 spec->cur_out_type = SPEAKER_OUT; in ca0132_select_out()
4472 if (spec->cur_out_type == SPEAKER_OUT) { in ca0132_select_out()
4473 codec_dbg(codec, "ca0132_select_out speaker\n"); in ca0132_select_out()
4476 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4477 if (err < 0) in ca0132_select_out()
4481 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4482 if (err < 0) in ca0132_select_out()
4486 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4487 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4488 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4489 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4490 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4491 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4492 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4493 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4496 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4497 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4498 snd_hda_set_pin_ctl(codec, spec->out_pins[1], in ca0132_select_out()
4501 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4502 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4503 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4506 codec_dbg(codec, "ca0132_select_out hp\n"); in ca0132_select_out()
4509 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4510 if (err < 0) in ca0132_select_out()
4514 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4515 if (err < 0) in ca0132_select_out()
4519 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4520 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4521 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4522 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4523 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4524 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4525 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4526 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4529 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4530 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4531 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4534 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4535 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4536 snd_hda_set_pin_ctl(codec, spec->out_pins[1], in ca0132_select_out()
4541 snd_hda_power_down_pm(codec); in ca0132_select_out()
4543 return err < 0 ? err : 0; in ca0132_select_out()
4546 static int ae5_headphone_gain_set(struct hda_codec *codec, long val);
4547 static int zxr_headphone_gain_set(struct hda_codec *codec, long val);
4548 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val);
4550 static void ae5_mmio_select_out(struct hda_codec *codec) in ae5_mmio_select_out() argument
4552 struct ca0132_spec *spec = codec->spec; in ae5_mmio_select_out()
4561 for (i = 0; i < AE_CA0113_OUT_SET_COMMANDS; i++) in ae5_mmio_select_out()
4562 ca0113_mmio_command_set(codec, out_cmds->group[i], in ae5_mmio_select_out()
4563 out_cmds->target[i], in ae5_mmio_select_out()
4564 out_cmds->vals[spec->cur_out_type][i]); in ae5_mmio_select_out()
4567 static int ca0132_alt_set_full_range_speaker(struct hda_codec *codec) in ca0132_alt_set_full_range_speaker() argument
4569 struct ca0132_spec *spec = codec->spec; in ca0132_alt_set_full_range_speaker()
4574 /* 2.0/4.0 setup has no LFE channel, so setting full-range does nothing. */ in ca0132_alt_set_full_range_speaker()
4575 if (spec->channel_cfg_val == SPEAKER_CHANNELS_4_0 in ca0132_alt_set_full_range_speaker()
4576 || spec->channel_cfg_val == SPEAKER_CHANNELS_2_0) in ca0132_alt_set_full_range_speaker()
4577 return 0; in ca0132_alt_set_full_range_speaker()
4579 /* Set front L/R full range. Zero for full-range, one for redirection. */ in ca0132_alt_set_full_range_speaker()
4580 tmp = spec->speaker_range_val[0] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4581 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4583 if (err < 0) in ca0132_alt_set_full_range_speaker()
4586 /* When setting full-range rear, both rear and center/lfe are set. */ in ca0132_alt_set_full_range_speaker()
4587 tmp = spec->speaker_range_val[1] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4588 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4590 if (err < 0) in ca0132_alt_set_full_range_speaker()
4593 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4595 if (err < 0) in ca0132_alt_set_full_range_speaker()
4599 * Only the AE series cards set this value when setting full-range, in ca0132_alt_set_full_range_speaker()
4603 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4605 if (err < 0) in ca0132_alt_set_full_range_speaker()
4609 return 0; in ca0132_alt_set_full_range_speaker()
4612 static int ca0132_alt_surround_set_bass_redirection(struct hda_codec *codec, in ca0132_alt_surround_set_bass_redirection() argument
4615 struct ca0132_spec *spec = codec->spec; in ca0132_alt_surround_set_bass_redirection()
4619 if (val && spec->channel_cfg_val != SPEAKER_CHANNELS_4_0 && in ca0132_alt_surround_set_bass_redirection()
4620 spec->channel_cfg_val != SPEAKER_CHANNELS_2_0) in ca0132_alt_surround_set_bass_redirection()
4625 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp); in ca0132_alt_surround_set_bass_redirection()
4626 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4631 tmp = float_xbass_xover_lookup[spec->xbass_xover_freq]; in ca0132_alt_surround_set_bass_redirection()
4632 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_surround_set_bass_redirection()
4634 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4638 return 0; in ca0132_alt_surround_set_bass_redirection()
4645 static void ca0132_alt_select_out_get_quirk_data(struct hda_codec *codec, in ca0132_alt_select_out_get_quirk_data() argument
4648 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out_get_quirk_data()
4653 for (i = 0; i < ARRAY_SIZE(quirk_out_set_data); i++) { in ca0132_alt_select_out_get_quirk_data()
4661 static int ca0132_alt_select_out_quirk_set(struct hda_codec *codec) in ca0132_alt_select_out_quirk_set() argument
4665 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out_quirk_set()
4669 ca0132_alt_select_out_get_quirk_data(codec, &quirk_data); in ca0132_alt_select_out_quirk_set()
4671 return 0; in ca0132_alt_select_out_quirk_set()
4673 out_info = &quirk_data->out_set_info[spec->cur_out_type]; in ca0132_alt_select_out_quirk_set()
4674 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4675 ae5_mmio_select_out(codec); in ca0132_alt_select_out_quirk_set()
4677 if (out_info->has_hda_gpio) { in ca0132_alt_select_out_quirk_set()
4678 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4679 AC_VERB_GET_GPIO_DATA, 0); in ca0132_alt_select_out_quirk_set()
4681 if (out_info->hda_gpio_set) in ca0132_alt_select_out_quirk_set()
4682 gpio_data |= (1 << out_info->hda_gpio_pin); in ca0132_alt_select_out_quirk_set()
4684 gpio_data &= ~(1 << out_info->hda_gpio_pin); in ca0132_alt_select_out_quirk_set()
4686 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4690 if (out_info->mmio_gpio_count) { in ca0132_alt_select_out_quirk_set()
4691 for (i = 0; i < out_info->mmio_gpio_count; i++) { in ca0132_alt_select_out_quirk_set()
4692 ca0113_mmio_gpio_set(codec, out_info->mmio_gpio_pin[i], in ca0132_alt_select_out_quirk_set()
4693 out_info->mmio_gpio_set[i]); in ca0132_alt_select_out_quirk_set()
4697 if (out_info->scp_cmds_count) { in ca0132_alt_select_out_quirk_set()
4698 for (i = 0; i < out_info->scp_cmds_count; i++) { in ca0132_alt_select_out_quirk_set()
4699 err = dspio_set_uint_param(codec, in ca0132_alt_select_out_quirk_set()
4700 out_info->scp_cmd_mid[i], in ca0132_alt_select_out_quirk_set()
4701 out_info->scp_cmd_req[i], in ca0132_alt_select_out_quirk_set()
4702 out_info->scp_cmd_val[i]); in ca0132_alt_select_out_quirk_set()
4703 if (err < 0) in ca0132_alt_select_out_quirk_set()
4708 chipio_set_control_param(codec, 0x0d, out_info->dac2port); in ca0132_alt_select_out_quirk_set()
4710 if (out_info->has_chipio_write) { in ca0132_alt_select_out_quirk_set()
4711 chipio_write(codec, out_info->chipio_write_addr, in ca0132_alt_select_out_quirk_set()
4712 out_info->chipio_write_data); in ca0132_alt_select_out_quirk_set()
4715 if (quirk_data->has_headphone_gain) { in ca0132_alt_select_out_quirk_set()
4716 if (spec->cur_out_type != HEADPHONE_OUT) { in ca0132_alt_select_out_quirk_set()
4717 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4718 ae5_headphone_gain_set(codec, 2); in ca0132_alt_select_out_quirk_set()
4720 zxr_headphone_gain_set(codec, 0); in ca0132_alt_select_out_quirk_set()
4722 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4723 ae5_headphone_gain_set(codec, in ca0132_alt_select_out_quirk_set()
4724 spec->ae5_headphone_gain_val); in ca0132_alt_select_out_quirk_set()
4726 zxr_headphone_gain_set(codec, in ca0132_alt_select_out_quirk_set()
4727 spec->zxr_gain_set); in ca0132_alt_select_out_quirk_set()
4731 return 0; in ca0132_alt_select_out_quirk_set()
4734 static void ca0132_set_out_node_pincfg(struct hda_codec *codec, hda_nid_t nid, in ca0132_set_out_node_pincfg() argument
4739 pin_ctl = snd_hda_codec_read(codec, nid, 0, in ca0132_set_out_node_pincfg()
4740 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_set_out_node_pincfg()
4744 snd_hda_set_pin_ctl(codec, nid, pin_ctl); in ca0132_set_out_node_pincfg()
4753 * It also adds the ability to auto-detect the front headphone port.
4755 static int ca0132_alt_select_out(struct hda_codec *codec) in ca0132_alt_select_out() argument
4757 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out()
4763 hda_nid_t headphone_nid = spec->out_pins[1]; in ca0132_alt_select_out()
4765 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_select_out()
4767 snd_hda_power_up_pm(codec); in ca0132_alt_select_out()
4769 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_alt_select_out()
4777 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp) || in ca0132_alt_select_out()
4778 snd_hda_jack_detect(codec, spec->unsol_tag_front_hp); in ca0132_alt_select_out()
4781 spec->cur_out_type = HEADPHONE_OUT; in ca0132_alt_select_out()
4783 spec->cur_out_type = SPEAKER_OUT; in ca0132_alt_select_out()
4785 spec->cur_out_type = spec->out_enum_val; in ca0132_alt_select_out()
4787 outfx_set = spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]; in ca0132_alt_select_out()
4790 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE); in ca0132_alt_select_out()
4791 if (err < 0) in ca0132_alt_select_out()
4794 if (ca0132_alt_select_out_quirk_set(codec) < 0) in ca0132_alt_select_out()
4797 switch (spec->cur_out_type) { in ca0132_alt_select_out()
4799 codec_dbg(codec, "%s speaker\n", __func__); in ca0132_alt_select_out()
4802 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4803 AC_VERB_SET_EAPD_BTLENABLE, 0x01); in ca0132_alt_select_out()
4806 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0); in ca0132_alt_select_out()
4807 /* Set front L-R to output. */ in ca0132_alt_select_out()
4808 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0); in ca0132_alt_select_out()
4810 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0); in ca0132_alt_select_out()
4812 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0); in ca0132_alt_select_out()
4819 if (!outfx_set && spec->channel_cfg_val == SPEAKER_CHANNELS_2_0) in ca0132_alt_select_out()
4822 tmp = speaker_channel_cfgs[spec->channel_cfg_val].val; in ca0132_alt_select_out()
4824 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_alt_select_out()
4825 if (err < 0) in ca0132_alt_select_out()
4830 codec_dbg(codec, "%s hp\n", __func__); in ca0132_alt_select_out()
4831 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4832 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_alt_select_out()
4835 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0); in ca0132_alt_select_out()
4836 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0); in ca0132_alt_select_out()
4837 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0); in ca0132_alt_select_out()
4840 if (snd_hda_jack_detect(codec, spec->unsol_tag_front_hp)) in ca0132_alt_select_out()
4841 headphone_nid = spec->out_pins[2]; in ca0132_alt_select_out()
4842 else if (snd_hda_jack_detect(codec, spec->unsol_tag_hp)) in ca0132_alt_select_out()
4843 headphone_nid = spec->out_pins[1]; in ca0132_alt_select_out()
4845 ca0132_set_out_node_pincfg(codec, headphone_nid, 1, 1); in ca0132_alt_select_out()
4848 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE); in ca0132_alt_select_out()
4850 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO); in ca0132_alt_select_out()
4852 if (err < 0) in ca0132_alt_select_out()
4857 * If output effects are enabled, set the X-Bass effect value again to in ca0132_alt_select_out()
4862 ca0132_effects_set(codec, X_BASS, in ca0132_alt_select_out()
4863 spec->effects_switch[X_BASS - EFFECT_START_NID]); in ca0132_alt_select_out()
4865 /* Set speaker EQ bypass attenuation to 0. */ in ca0132_alt_select_out()
4866 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO); in ca0132_alt_select_out()
4867 if (err < 0) in ca0132_alt_select_out()
4874 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4876 if (err < 0) in ca0132_alt_select_out()
4879 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_alt_select_out()
4880 err = ca0132_alt_surround_set_bass_redirection(codec, in ca0132_alt_select_out()
4881 spec->bass_redirection_val); in ca0132_alt_select_out()
4883 err = ca0132_alt_surround_set_bass_redirection(codec, 0); in ca0132_alt_select_out()
4886 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4888 if (err < 0) in ca0132_alt_select_out()
4891 if (spec->cur_out_type == SPEAKER_OUT) { in ca0132_alt_select_out()
4892 err = ca0132_alt_set_full_range_speaker(codec); in ca0132_alt_select_out()
4893 if (err < 0) in ca0132_alt_select_out()
4898 snd_hda_power_down_pm(codec); in ca0132_alt_select_out()
4900 return err < 0 ? err : 0; in ca0132_alt_select_out()
4910 ca0132_alt_select_out(spec->codec); in ca0132_unsol_hp_delayed()
4912 ca0132_select_out(spec->codec); in ca0132_unsol_hp_delayed()
4914 jack = snd_hda_jack_tbl_get(spec->codec, spec->unsol_tag_hp); in ca0132_unsol_hp_delayed()
4916 jack->block_report = 0; in ca0132_unsol_hp_delayed()
4917 snd_hda_jack_report_sync(spec->codec); in ca0132_unsol_hp_delayed()
4921 static void ca0132_set_dmic(struct hda_codec *codec, int enable);
4922 static int ca0132_mic_boost_set(struct hda_codec *codec, long val);
4923 static void resume_mic1(struct hda_codec *codec, unsigned int oldval);
4924 static int stop_mic1(struct hda_codec *codec);
4925 static int ca0132_cvoice_switch_set(struct hda_codec *codec);
4926 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val);
4931 static int ca0132_set_vipsource(struct hda_codec *codec, int val) in ca0132_set_vipsource() argument
4933 struct ca0132_spec *spec = codec->spec; in ca0132_set_vipsource()
4936 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_set_vipsource()
4937 return 0; in ca0132_set_vipsource()
4939 /* if CrystalVoice if off, vipsource should be 0 */ in ca0132_set_vipsource()
4940 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] || in ca0132_set_vipsource()
4941 (val == 0)) { in ca0132_set_vipsource()
4942 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_set_vipsource()
4943 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_set_vipsource()
4944 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_set_vipsource()
4945 if (spec->cur_mic_type == DIGITAL_MIC) in ca0132_set_vipsource()
4949 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4951 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4953 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); in ca0132_set_vipsource()
4954 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); in ca0132_set_vipsource()
4955 if (spec->cur_mic_type == DIGITAL_MIC) in ca0132_set_vipsource()
4959 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4961 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4963 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val); in ca0132_set_vipsource()
4969 static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val) in ca0132_alt_set_vipsource() argument
4971 struct ca0132_spec *spec = codec->spec; in ca0132_alt_set_vipsource()
4974 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_alt_set_vipsource()
4975 return 0; in ca0132_alt_set_vipsource()
4977 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_set_vipsource()
4979 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_set_vipsource()
4980 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_set_vipsource()
4982 /* if CrystalVoice is off, vipsource should be 0 */ in ca0132_alt_set_vipsource()
4983 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] || in ca0132_alt_set_vipsource()
4984 (val == 0) || spec->in_enum_val == REAR_LINE_IN) { in ca0132_alt_set_vipsource()
4985 codec_dbg(codec, "%s: off.", __func__); in ca0132_alt_set_vipsource()
4986 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_alt_set_vipsource()
4989 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4991 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_set_vipsource()
4992 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_set_vipsource()
4994 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_set_vipsource()
4997 if (spec->in_enum_val == REAR_LINE_IN) in ca0132_alt_set_vipsource()
5006 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
5009 codec_dbg(codec, "%s: on.", __func__); in ca0132_alt_set_vipsource()
5010 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); in ca0132_alt_set_vipsource()
5011 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); in ca0132_alt_set_vipsource()
5013 chipio_set_conn_rate(codec, 0x0F, SR_16_000); in ca0132_alt_set_vipsource()
5015 if (spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID]) in ca0132_alt_set_vipsource()
5019 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
5022 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
5025 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val); in ca0132_alt_set_vipsource()
5028 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_set_vipsource()
5029 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_set_vipsource()
5037 * If jack inserted, ext.mic will be selected, else built-in mic
5040 static int ca0132_select_mic(struct hda_codec *codec) in ca0132_select_mic() argument
5042 struct ca0132_spec *spec = codec->spec; in ca0132_select_mic()
5046 codec_dbg(codec, "ca0132_select_mic\n"); in ca0132_select_mic()
5048 snd_hda_power_up_pm(codec); in ca0132_select_mic()
5050 auto_jack = spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID]; in ca0132_select_mic()
5053 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_amic1); in ca0132_select_mic()
5056 spec->vnode_lswitch[VNID_AMIC1_SEL - VNODE_START_NID]; in ca0132_select_mic()
5059 spec->cur_mic_type = LINE_MIC_IN; in ca0132_select_mic()
5061 spec->cur_mic_type = DIGITAL_MIC; in ca0132_select_mic()
5063 if (spec->cur_mic_type == DIGITAL_MIC) { in ca0132_select_mic()
5065 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_32_000); in ca0132_select_mic()
5066 ca0132_set_dmic(codec, 1); in ca0132_select_mic()
5067 ca0132_mic_boost_set(codec, 0); in ca0132_select_mic()
5069 ca0132_effects_set(codec, VOICE_FOCUS, in ca0132_select_mic()
5070 spec->effects_switch in ca0132_select_mic()
5071 [VOICE_FOCUS - EFFECT_START_NID]); in ca0132_select_mic()
5074 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_96_000); in ca0132_select_mic()
5075 ca0132_set_dmic(codec, 0); in ca0132_select_mic()
5076 ca0132_mic_boost_set(codec, spec->cur_mic_boost); in ca0132_select_mic()
5078 ca0132_effects_set(codec, VOICE_FOCUS, 0); in ca0132_select_mic()
5081 snd_hda_power_down_pm(codec); in ca0132_select_mic()
5083 return 0; in ca0132_select_mic()
5089 * The front mic has no jack-detection, so the only way to switch to it
5092 static int ca0132_alt_select_in(struct hda_codec *codec) in ca0132_alt_select_in() argument
5094 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_in()
5097 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_select_in()
5099 snd_hda_power_up_pm(codec); in ca0132_alt_select_in()
5101 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_select_in()
5102 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_select_in()
5104 spec->cur_mic_type = spec->in_enum_val; in ca0132_alt_select_in()
5106 switch (spec->cur_mic_type) { in ca0132_alt_select_in()
5111 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5118 r3di_gpio_mic_set(codec, R3DI_REAR_MIC); in ca0132_alt_select_in()
5122 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5126 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5128 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, in ca0132_alt_select_in()
5130 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, in ca0132_alt_select_in()
5132 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5139 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5140 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5142 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5144 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5146 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5147 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5150 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5151 chipio_write(codec, 0x18B09C, 0x0000000C); in ca0132_alt_select_in()
5154 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5155 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5158 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5159 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5164 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_select_in()
5167 ca0132_mic_boost_set(codec, 0); in ca0132_alt_select_in()
5171 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5174 r3di_gpio_mic_set(codec, R3DI_REAR_MIC); in ca0132_alt_select_in()
5177 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5180 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5181 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, in ca0132_alt_select_in()
5183 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, in ca0132_alt_select_in()
5185 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5191 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5192 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5194 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5200 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5205 chipio_write(codec, 0x18B098, 0x00000000); in ca0132_alt_select_in()
5206 chipio_write(codec, 0x18B09C, 0x00000000); in ca0132_alt_select_in()
5211 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5212 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5218 ca0113_mmio_gpio_set(codec, 0, true); in ca0132_alt_select_in()
5219 ca0113_mmio_gpio_set(codec, 5, false); in ca0132_alt_select_in()
5223 r3di_gpio_mic_set(codec, R3DI_FRONT_MIC); in ca0132_alt_select_in()
5227 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5235 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5236 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5238 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5240 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5242 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5243 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5247 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5248 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5251 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5252 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5257 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_select_in()
5260 ca0132_cvoice_switch_set(codec); in ca0132_alt_select_in()
5262 snd_hda_power_down_pm(codec); in ca0132_alt_select_in()
5263 return 0; in ca0132_alt_select_in()
5269 static bool ca0132_is_vnode_effective(struct hda_codec *codec, in ca0132_is_vnode_effective() argument
5273 struct ca0132_spec *spec = codec->spec; in ca0132_is_vnode_effective()
5278 nid = spec->shared_out_nid; in ca0132_is_vnode_effective()
5281 nid = spec->shared_mic_nid; in ca0132_is_vnode_effective()
5295 * They return 0 if no changed. Return 1 if changed.
5297 static int ca0132_voicefx_set(struct hda_codec *codec, int enable) in ca0132_voicefx_set() argument
5299 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_set()
5304 tmp = spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ? in ca0132_voicefx_set()
5310 dspio_set_uint_param(codec, ca0132_voicefx.mid, in ca0132_voicefx_set()
5311 ca0132_voicefx.reqs[0], tmp); in ca0132_voicefx_set()
5319 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) in ca0132_effects_set() argument
5321 struct ca0132_spec *spec = codec->spec; in ca0132_effects_set()
5324 int err = 0; in ca0132_effects_set()
5325 int idx = nid - EFFECT_START_NID; in ca0132_effects_set()
5327 if ((idx < 0) || (idx >= num_fx)) in ca0132_effects_set()
5328 return 0; /* no changed */ in ca0132_effects_set()
5333 if (!spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) in ca0132_effects_set()
5334 val = 0; in ca0132_effects_set()
5335 if (spec->cur_out_type == SPEAKER_OUT && nid == X_BASS) { in ca0132_effects_set()
5336 channel_cfg = spec->channel_cfg_val; in ca0132_effects_set()
5339 val = 0; in ca0132_effects_set()
5346 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) in ca0132_effects_set()
5347 val = 0; in ca0132_effects_set()
5349 /* Voice Focus applies to 2-ch Mic, Digital Mic */ in ca0132_effects_set()
5350 if ((nid == VOICE_FOCUS) && (spec->cur_mic_type != DIGITAL_MIC)) in ca0132_effects_set()
5351 val = 0; in ca0132_effects_set()
5355 && (spec->cur_mic_type != REAR_LINE_IN)) { in ca0132_effects_set()
5356 if (spec->effects_switch[CRYSTAL_VOICE - in ca0132_effects_set()
5359 if (spec->effects_switch[VOICE_FOCUS - in ca0132_effects_set()
5366 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_effects_set()
5371 * to module ID 0x47. No clue why. in ca0132_effects_set()
5374 && (spec->cur_mic_type != REAR_LINE_IN)) { in ca0132_effects_set()
5375 if (spec->effects_switch[CRYSTAL_VOICE - in ca0132_effects_set()
5377 if (spec->effects_switch[NOISE_REDUCTION - in ca0132_effects_set()
5385 dspio_set_uint_param(codec, 0x47, 0x00, tmp); in ca0132_effects_set()
5390 spec->in_enum_val == REAR_LINE_IN) in ca0132_effects_set()
5391 val = 0; in ca0132_effects_set()
5394 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n", in ca0132_effects_set()
5397 on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; in ca0132_effects_set()
5398 err = dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_effects_set()
5399 ca0132_effects[idx].reqs[0], on); in ca0132_effects_set()
5401 if (err < 0) in ca0132_effects_set()
5402 return 0; /* no changed */ in ca0132_effects_set()
5410 static int ca0132_pe_switch_set(struct hda_codec *codec) in ca0132_pe_switch_set() argument
5412 struct ca0132_spec *spec = codec->spec; in ca0132_pe_switch_set()
5414 int i, ret = 0; in ca0132_pe_switch_set()
5416 codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n", in ca0132_pe_switch_set()
5417 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]); in ca0132_pe_switch_set()
5420 ca0132_alt_select_out(codec); in ca0132_pe_switch_set()
5422 i = OUT_EFFECT_START_NID - EFFECT_START_NID; in ca0132_pe_switch_set()
5426 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); in ca0132_pe_switch_set()
5432 static int stop_mic1(struct hda_codec *codec) in stop_mic1() argument
5434 struct ca0132_spec *spec = codec->spec; in stop_mic1()
5435 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0, in stop_mic1()
5436 AC_VERB_GET_CONV, 0); in stop_mic1()
5437 if (oldval != 0) in stop_mic1()
5438 snd_hda_codec_write(codec, spec->adcs[0], 0, in stop_mic1()
5440 0); in stop_mic1()
5445 static void resume_mic1(struct hda_codec *codec, unsigned int oldval) in resume_mic1() argument
5447 struct ca0132_spec *spec = codec->spec; in resume_mic1()
5449 if (oldval != 0) in resume_mic1()
5450 snd_hda_codec_write(codec, spec->adcs[0], 0, in resume_mic1()
5458 static int ca0132_cvoice_switch_set(struct hda_codec *codec) in ca0132_cvoice_switch_set() argument
5460 struct ca0132_spec *spec = codec->spec; in ca0132_cvoice_switch_set()
5462 int i, ret = 0; in ca0132_cvoice_switch_set()
5465 codec_dbg(codec, "ca0132_cvoice_switch_set: val=%ld\n", in ca0132_cvoice_switch_set()
5466 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]); in ca0132_cvoice_switch_set()
5468 i = IN_EFFECT_START_NID - EFFECT_START_NID; in ca0132_cvoice_switch_set()
5472 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); in ca0132_cvoice_switch_set()
5475 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0)); in ca0132_cvoice_switch_set()
5478 oldval = stop_mic1(codec); in ca0132_cvoice_switch_set()
5480 ret |= ca0132_alt_set_vipsource(codec, 1); in ca0132_cvoice_switch_set()
5482 ret |= ca0132_set_vipsource(codec, 1); in ca0132_cvoice_switch_set()
5483 resume_mic1(codec, oldval); in ca0132_cvoice_switch_set()
5487 static int ca0132_mic_boost_set(struct hda_codec *codec, long val) in ca0132_mic_boost_set() argument
5489 struct ca0132_spec *spec = codec->spec; in ca0132_mic_boost_set()
5490 int ret = 0; in ca0132_mic_boost_set()
5493 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5494 HDA_INPUT, 0, HDA_AMP_VOLMASK, 3); in ca0132_mic_boost_set()
5496 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5497 HDA_INPUT, 0, HDA_AMP_VOLMASK, 0); in ca0132_mic_boost_set()
5502 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val) in ca0132_alt_mic_boost_set() argument
5504 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_set()
5505 int ret = 0; in ca0132_alt_mic_boost_set()
5507 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_alt_mic_boost_set()
5508 HDA_INPUT, 0, HDA_AMP_VOLMASK, val); in ca0132_alt_mic_boost_set()
5512 static int ae5_headphone_gain_set(struct hda_codec *codec, long val) in ae5_headphone_gain_set() argument
5516 for (i = 0; i < 4; i++) in ae5_headphone_gain_set()
5517 ca0113_mmio_command_set(codec, 0x48, 0x11 + i, in ae5_headphone_gain_set()
5519 return 0; in ae5_headphone_gain_set()
5526 static int zxr_headphone_gain_set(struct hda_codec *codec, long val) in zxr_headphone_gain_set() argument
5528 ca0113_mmio_gpio_set(codec, 1, val); in zxr_headphone_gain_set()
5530 return 0; in zxr_headphone_gain_set()
5536 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_vnode_switch_set() local
5538 hda_nid_t shared_nid = 0; in ca0132_vnode_switch_set()
5540 int ret = 0; in ca0132_vnode_switch_set()
5541 struct ca0132_spec *spec = codec->spec; in ca0132_vnode_switch_set()
5546 spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_vnode_switch_set()
5549 ca0132_alt_select_out(codec); in ca0132_vnode_switch_set()
5551 ca0132_select_out(codec); in ca0132_vnode_switch_set()
5558 spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID]; in ca0132_vnode_switch_set()
5560 ca0132_select_mic(codec); in ca0132_vnode_switch_set()
5566 ca0132_alt_select_out(codec); in ca0132_vnode_switch_set()
5568 ca0132_select_out(codec); in ca0132_vnode_switch_set()
5573 ca0132_select_mic(codec); in ca0132_vnode_switch_set()
5578 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); in ca0132_vnode_switch_set()
5584 mutex_lock(&codec->control_mutex); in ca0132_vnode_switch_set()
5585 pval = kcontrol->private_value; in ca0132_vnode_switch_set()
5586 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, in ca0132_vnode_switch_set()
5587 0, dir); in ca0132_vnode_switch_set()
5589 kcontrol->private_value = pval; in ca0132_vnode_switch_set()
5590 mutex_unlock(&codec->control_mutex); in ca0132_vnode_switch_set()
5597 static void ca0132_alt_bass_redirection_xover_set(struct hda_codec *codec, in ca0132_alt_bass_redirection_xover_set() argument
5600 snd_hda_power_up(codec); in ca0132_alt_bass_redirection_xover_set()
5602 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ, in ca0132_alt_bass_redirection_xover_set()
5605 snd_hda_power_down(codec); in ca0132_alt_bass_redirection_xover_set()
5617 static int ca0132_alt_slider_ctl_set(struct hda_codec *codec, hda_nid_t nid, in ca0132_alt_slider_ctl_set() argument
5620 int i = 0; in ca0132_alt_slider_ctl_set()
5631 snd_hda_power_up(codec); in ca0132_alt_slider_ctl_set()
5633 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5637 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5639 &(lookup[idx - 1]), sizeof(unsigned int)); in ca0132_alt_slider_ctl_set()
5642 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5646 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5651 snd_hda_power_down(codec); in ca0132_alt_slider_ctl_set()
5653 return 0; in ca0132_alt_slider_ctl_set()
5659 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_xbass_xover_slider_ctl_get() local
5660 struct ca0132_spec *spec = codec->spec; in ca0132_alt_xbass_xover_slider_ctl_get()
5661 long *valp = ucontrol->value.integer.value; in ca0132_alt_xbass_xover_slider_ctl_get()
5665 *valp = spec->bass_redirect_xover_freq; in ca0132_alt_xbass_xover_slider_ctl_get()
5667 *valp = spec->xbass_xover_freq; in ca0132_alt_xbass_xover_slider_ctl_get()
5669 return 0; in ca0132_alt_xbass_xover_slider_ctl_get()
5675 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_slider_ctl_get() local
5676 struct ca0132_spec *spec = codec->spec; in ca0132_alt_slider_ctl_get()
5678 long *valp = ucontrol->value.integer.value; in ca0132_alt_slider_ctl_get()
5679 int idx = nid - OUT_EFFECT_START_NID; in ca0132_alt_slider_ctl_get()
5681 *valp = spec->fx_ctl_val[idx]; in ca0132_alt_slider_ctl_get()
5682 return 0; in ca0132_alt_slider_ctl_get()
5686 * The X-bass crossover starts at 10hz, so the min is 1. The
5692 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in ca0132_alt_xbass_xover_slider_info()
5693 uinfo->count = 1; in ca0132_alt_xbass_xover_slider_info()
5694 uinfo->value.integer.min = 1; in ca0132_alt_xbass_xover_slider_info()
5695 uinfo->value.integer.max = 100; in ca0132_alt_xbass_xover_slider_info()
5696 uinfo->value.integer.step = 1; in ca0132_alt_xbass_xover_slider_info()
5698 return 0; in ca0132_alt_xbass_xover_slider_info()
5706 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in ca0132_alt_effect_slider_info()
5707 uinfo->count = chs == 3 ? 2 : 1; in ca0132_alt_effect_slider_info()
5708 uinfo->value.integer.min = 0; in ca0132_alt_effect_slider_info()
5709 uinfo->value.integer.max = 100; in ca0132_alt_effect_slider_info()
5710 uinfo->value.integer.step = 1; in ca0132_alt_effect_slider_info()
5712 return 0; in ca0132_alt_effect_slider_info()
5718 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_xbass_xover_slider_put() local
5719 struct ca0132_spec *spec = codec->spec; in ca0132_alt_xbass_xover_slider_put()
5721 long *valp = ucontrol->value.integer.value; in ca0132_alt_xbass_xover_slider_put()
5726 cur_val = &spec->bass_redirect_xover_freq; in ca0132_alt_xbass_xover_slider_put()
5728 cur_val = &spec->xbass_xover_freq; in ca0132_alt_xbass_xover_slider_put()
5732 return 0; in ca0132_alt_xbass_xover_slider_put()
5738 ca0132_alt_bass_redirection_xover_set(codec, *cur_val); in ca0132_alt_xbass_xover_slider_put()
5740 ca0132_alt_slider_ctl_set(codec, nid, float_xbass_xover_lookup, idx); in ca0132_alt_xbass_xover_slider_put()
5742 return 0; in ca0132_alt_xbass_xover_slider_put()
5748 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_effect_slider_put() local
5749 struct ca0132_spec *spec = codec->spec; in ca0132_alt_effect_slider_put()
5751 long *valp = ucontrol->value.integer.value; in ca0132_alt_effect_slider_put()
5754 idx = nid - EFFECT_START_NID; in ca0132_alt_effect_slider_put()
5756 if (spec->fx_ctl_val[idx] == *valp) in ca0132_alt_effect_slider_put()
5757 return 0; in ca0132_alt_effect_slider_put()
5759 spec->fx_ctl_val[idx] = *valp; in ca0132_alt_effect_slider_put()
5762 ca0132_alt_slider_ctl_set(codec, nid, float_zero_to_one_lookup, idx); in ca0132_alt_effect_slider_put()
5764 return 0; in ca0132_alt_effect_slider_put()
5771 * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
5782 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_mic_boost_info()
5783 uinfo->count = 1; in ca0132_alt_mic_boost_info()
5784 uinfo->value.enumerated.items = MIC_BOOST_NUM_OF_STEPS; in ca0132_alt_mic_boost_info()
5785 if (uinfo->value.enumerated.item >= MIC_BOOST_NUM_OF_STEPS) in ca0132_alt_mic_boost_info()
5786 uinfo->value.enumerated.item = MIC_BOOST_NUM_OF_STEPS - 1; in ca0132_alt_mic_boost_info()
5787 sprintf(namestr, "%d %s", (uinfo->value.enumerated.item * 10), sfx); in ca0132_alt_mic_boost_info()
5788 strcpy(uinfo->value.enumerated.name, namestr); in ca0132_alt_mic_boost_info()
5789 return 0; in ca0132_alt_mic_boost_info()
5795 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_mic_boost_get() local
5796 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_get()
5798 ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val; in ca0132_alt_mic_boost_get()
5799 return 0; in ca0132_alt_mic_boost_get()
5805 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_mic_boost_put() local
5806 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_put()
5807 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_mic_boost_put()
5811 return 0; in ca0132_alt_mic_boost_put()
5813 codec_dbg(codec, "ca0132_alt_mic_boost: boost=%d\n", in ca0132_alt_mic_boost_put()
5816 spec->mic_boost_enum_val = sel; in ca0132_alt_mic_boost_put()
5818 if (spec->in_enum_val != REAR_LINE_IN) in ca0132_alt_mic_boost_put()
5819 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_mic_boost_put()
5825 * Sound BlasterX AE-5 Headphone Gain Controls.
5834 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ae5_headphone_gain_info()
5835 uinfo->count = 1; in ae5_headphone_gain_info()
5836 uinfo->value.enumerated.items = AE5_HEADPHONE_GAIN_MAX; in ae5_headphone_gain_info()
5837 if (uinfo->value.enumerated.item >= AE5_HEADPHONE_GAIN_MAX) in ae5_headphone_gain_info()
5838 uinfo->value.enumerated.item = AE5_HEADPHONE_GAIN_MAX - 1; in ae5_headphone_gain_info()
5840 ae5_headphone_gain_presets[uinfo->value.enumerated.item].name, in ae5_headphone_gain_info()
5842 strcpy(uinfo->value.enumerated.name, namestr); in ae5_headphone_gain_info()
5843 return 0; in ae5_headphone_gain_info()
5849 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_headphone_gain_get() local
5850 struct ca0132_spec *spec = codec->spec; in ae5_headphone_gain_get()
5852 ucontrol->value.enumerated.item[0] = spec->ae5_headphone_gain_val; in ae5_headphone_gain_get()
5853 return 0; in ae5_headphone_gain_get()
5859 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_headphone_gain_put() local
5860 struct ca0132_spec *spec = codec->spec; in ae5_headphone_gain_put()
5861 int sel = ucontrol->value.enumerated.item[0]; in ae5_headphone_gain_put()
5865 return 0; in ae5_headphone_gain_put()
5867 codec_dbg(codec, "ae5_headphone_gain: boost=%d\n", in ae5_headphone_gain_put()
5870 spec->ae5_headphone_gain_val = sel; in ae5_headphone_gain_put()
5872 if (spec->out_enum_val == HEADPHONE_OUT) in ae5_headphone_gain_put()
5873 ae5_headphone_gain_set(codec, spec->ae5_headphone_gain_val); in ae5_headphone_gain_put()
5879 * Sound BlasterX AE-5 sound filter enumerated control.
5888 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ae5_sound_filter_info()
5889 uinfo->count = 1; in ae5_sound_filter_info()
5890 uinfo->value.enumerated.items = AE5_SOUND_FILTER_MAX; in ae5_sound_filter_info()
5891 if (uinfo->value.enumerated.item >= AE5_SOUND_FILTER_MAX) in ae5_sound_filter_info()
5892 uinfo->value.enumerated.item = AE5_SOUND_FILTER_MAX - 1; in ae5_sound_filter_info()
5894 ae5_filter_presets[uinfo->value.enumerated.item].name); in ae5_sound_filter_info()
5895 strcpy(uinfo->value.enumerated.name, namestr); in ae5_sound_filter_info()
5896 return 0; in ae5_sound_filter_info()
5902 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_sound_filter_get() local
5903 struct ca0132_spec *spec = codec->spec; in ae5_sound_filter_get()
5905 ucontrol->value.enumerated.item[0] = spec->ae5_filter_val; in ae5_sound_filter_get()
5906 return 0; in ae5_sound_filter_get()
5912 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_sound_filter_put() local
5913 struct ca0132_spec *spec = codec->spec; in ae5_sound_filter_put()
5914 int sel = ucontrol->value.enumerated.item[0]; in ae5_sound_filter_put()
5918 return 0; in ae5_sound_filter_put()
5920 codec_dbg(codec, "ae5_sound_filter: %s\n", in ae5_sound_filter_put()
5923 spec->ae5_filter_val = sel; in ae5_sound_filter_put()
5925 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, in ae5_sound_filter_put()
5933 * front microphone has no auto-detect, and we need a way to set the rear
5934 * as line-in
5939 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_input_source_info()
5940 uinfo->count = 1; in ca0132_alt_input_source_info()
5941 uinfo->value.enumerated.items = IN_SRC_NUM_OF_INPUTS; in ca0132_alt_input_source_info()
5942 if (uinfo->value.enumerated.item >= IN_SRC_NUM_OF_INPUTS) in ca0132_alt_input_source_info()
5943 uinfo->value.enumerated.item = IN_SRC_NUM_OF_INPUTS - 1; in ca0132_alt_input_source_info()
5944 strcpy(uinfo->value.enumerated.name, in ca0132_alt_input_source_info()
5945 in_src_str[uinfo->value.enumerated.item]); in ca0132_alt_input_source_info()
5946 return 0; in ca0132_alt_input_source_info()
5952 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_input_source_get() local
5953 struct ca0132_spec *spec = codec->spec; in ca0132_alt_input_source_get()
5955 ucontrol->value.enumerated.item[0] = spec->in_enum_val; in ca0132_alt_input_source_get()
5956 return 0; in ca0132_alt_input_source_get()
5962 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_input_source_put() local
5963 struct ca0132_spec *spec = codec->spec; in ca0132_alt_input_source_put()
5964 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_input_source_put()
5968 * The AE-7 has no front microphone, so limit items to 2: rear mic and in ca0132_alt_input_source_put()
5969 * line-in. in ca0132_alt_input_source_put()
5975 return 0; in ca0132_alt_input_source_put()
5977 codec_dbg(codec, "ca0132_alt_input_select: sel=%d, preset=%s\n", in ca0132_alt_input_source_put()
5980 spec->in_enum_val = sel; in ca0132_alt_input_source_put()
5982 ca0132_alt_select_in(codec); in ca0132_alt_input_source_put()
5991 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_output_select_get_info()
5992 uinfo->count = 1; in ca0132_alt_output_select_get_info()
5993 uinfo->value.enumerated.items = NUM_OF_OUTPUTS; in ca0132_alt_output_select_get_info()
5994 if (uinfo->value.enumerated.item >= NUM_OF_OUTPUTS) in ca0132_alt_output_select_get_info()
5995 uinfo->value.enumerated.item = NUM_OF_OUTPUTS - 1; in ca0132_alt_output_select_get_info()
5996 strcpy(uinfo->value.enumerated.name, in ca0132_alt_output_select_get_info()
5997 out_type_str[uinfo->value.enumerated.item]); in ca0132_alt_output_select_get_info()
5998 return 0; in ca0132_alt_output_select_get_info()
6004 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_output_select_get() local
6005 struct ca0132_spec *spec = codec->spec; in ca0132_alt_output_select_get()
6007 ucontrol->value.enumerated.item[0] = spec->out_enum_val; in ca0132_alt_output_select_get()
6008 return 0; in ca0132_alt_output_select_get()
6014 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_output_select_put() local
6015 struct ca0132_spec *spec = codec->spec; in ca0132_alt_output_select_put()
6016 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_output_select_put()
6021 return 0; in ca0132_alt_output_select_put()
6023 codec_dbg(codec, "ca0132_alt_output_select: sel=%d, preset=%s\n", in ca0132_alt_output_select_put()
6026 spec->out_enum_val = sel; in ca0132_alt_output_select_put()
6028 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_alt_output_select_put()
6031 ca0132_alt_select_out(codec); in ca0132_alt_output_select_put()
6042 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_speaker_channel_cfg_get_info()
6043 uinfo->count = 1; in ca0132_alt_speaker_channel_cfg_get_info()
6044 uinfo->value.enumerated.items = items; in ca0132_alt_speaker_channel_cfg_get_info()
6045 if (uinfo->value.enumerated.item >= items) in ca0132_alt_speaker_channel_cfg_get_info()
6046 uinfo->value.enumerated.item = items - 1; in ca0132_alt_speaker_channel_cfg_get_info()
6047 strcpy(uinfo->value.enumerated.name, in ca0132_alt_speaker_channel_cfg_get_info()
6048 speaker_channel_cfgs[uinfo->value.enumerated.item].name); in ca0132_alt_speaker_channel_cfg_get_info()
6049 return 0; in ca0132_alt_speaker_channel_cfg_get_info()
6055 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_speaker_channel_cfg_get() local
6056 struct ca0132_spec *spec = codec->spec; in ca0132_alt_speaker_channel_cfg_get()
6058 ucontrol->value.enumerated.item[0] = spec->channel_cfg_val; in ca0132_alt_speaker_channel_cfg_get()
6059 return 0; in ca0132_alt_speaker_channel_cfg_get()
6065 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_speaker_channel_cfg_put() local
6066 struct ca0132_spec *spec = codec->spec; in ca0132_alt_speaker_channel_cfg_put()
6067 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_speaker_channel_cfg_put()
6071 return 0; in ca0132_alt_speaker_channel_cfg_put()
6073 codec_dbg(codec, "ca0132_alt_speaker_channels: sel=%d, channels=%s\n", in ca0132_alt_speaker_channel_cfg_put()
6076 spec->channel_cfg_val = sel; in ca0132_alt_speaker_channel_cfg_put()
6078 if (spec->out_enum_val == SPEAKER_OUT) in ca0132_alt_speaker_channel_cfg_put()
6079 ca0132_alt_select_out(codec); in ca0132_alt_speaker_channel_cfg_put()
6095 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_svm_setting_info()
6096 uinfo->count = 1; in ca0132_alt_svm_setting_info()
6097 uinfo->value.enumerated.items = NUM_OF_SVM_SETTINGS; in ca0132_alt_svm_setting_info()
6098 if (uinfo->value.enumerated.item >= NUM_OF_SVM_SETTINGS) in ca0132_alt_svm_setting_info()
6099 uinfo->value.enumerated.item = NUM_OF_SVM_SETTINGS - 1; in ca0132_alt_svm_setting_info()
6100 strcpy(uinfo->value.enumerated.name, in ca0132_alt_svm_setting_info()
6101 out_svm_set_enum_str[uinfo->value.enumerated.item]); in ca0132_alt_svm_setting_info()
6102 return 0; in ca0132_alt_svm_setting_info()
6108 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_svm_setting_get() local
6109 struct ca0132_spec *spec = codec->spec; in ca0132_alt_svm_setting_get()
6111 ucontrol->value.enumerated.item[0] = spec->smart_volume_setting; in ca0132_alt_svm_setting_get()
6112 return 0; in ca0132_alt_svm_setting_get()
6118 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_svm_setting_put() local
6119 struct ca0132_spec *spec = codec->spec; in ca0132_alt_svm_setting_put()
6120 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_svm_setting_put()
6122 unsigned int idx = SMART_VOLUME - EFFECT_START_NID; in ca0132_alt_svm_setting_put()
6126 return 0; in ca0132_alt_svm_setting_put()
6128 codec_dbg(codec, "ca0132_alt_svm_setting: sel=%d, preset=%s\n", in ca0132_alt_svm_setting_put()
6131 spec->smart_volume_setting = sel; in ca0132_alt_svm_setting_put()
6134 case 0: in ca0132_alt_svm_setting_put()
6148 dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_alt_svm_setting_put()
6159 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_eq_preset_info()
6160 uinfo->count = 1; in ca0132_alt_eq_preset_info()
6161 uinfo->value.enumerated.items = items; in ca0132_alt_eq_preset_info()
6162 if (uinfo->value.enumerated.item >= items) in ca0132_alt_eq_preset_info()
6163 uinfo->value.enumerated.item = items - 1; in ca0132_alt_eq_preset_info()
6164 strcpy(uinfo->value.enumerated.name, in ca0132_alt_eq_preset_info()
6165 ca0132_alt_eq_presets[uinfo->value.enumerated.item].name); in ca0132_alt_eq_preset_info()
6166 return 0; in ca0132_alt_eq_preset_info()
6172 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_eq_preset_get() local
6173 struct ca0132_spec *spec = codec->spec; in ca0132_alt_eq_preset_get()
6175 ucontrol->value.enumerated.item[0] = spec->eq_preset_val; in ca0132_alt_eq_preset_get()
6176 return 0; in ca0132_alt_eq_preset_get()
6182 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_eq_preset_put() local
6183 struct ca0132_spec *spec = codec->spec; in ca0132_alt_eq_preset_put()
6184 int i, err = 0; in ca0132_alt_eq_preset_put()
6185 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_eq_preset_put()
6189 return 0; in ca0132_alt_eq_preset_put()
6191 codec_dbg(codec, "%s: sel=%d, preset=%s\n", __func__, sel, in ca0132_alt_eq_preset_put()
6194 * Idx 0 is default. in ca0132_alt_eq_preset_put()
6197 for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) { in ca0132_alt_eq_preset_put()
6198 err = dspio_set_uint_param(codec, ca0132_alt_eq_enum.mid, in ca0132_alt_eq_preset_put()
6201 if (err < 0) in ca0132_alt_eq_preset_put()
6205 if (err >= 0) in ca0132_alt_eq_preset_put()
6206 spec->eq_preset_val = sel; in ca0132_alt_eq_preset_put()
6216 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_voicefx_info()
6217 uinfo->count = 1; in ca0132_voicefx_info()
6218 uinfo->value.enumerated.items = items; in ca0132_voicefx_info()
6219 if (uinfo->value.enumerated.item >= items) in ca0132_voicefx_info()
6220 uinfo->value.enumerated.item = items - 1; in ca0132_voicefx_info()
6221 strcpy(uinfo->value.enumerated.name, in ca0132_voicefx_info()
6222 ca0132_voicefx_presets[uinfo->value.enumerated.item].name); in ca0132_voicefx_info()
6223 return 0; in ca0132_voicefx_info()
6229 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_voicefx_get() local
6230 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_get()
6232 ucontrol->value.enumerated.item[0] = spec->voicefx_val; in ca0132_voicefx_get()
6233 return 0; in ca0132_voicefx_get()
6239 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_voicefx_put() local
6240 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_put()
6241 int i, err = 0; in ca0132_voicefx_put()
6242 int sel = ucontrol->value.enumerated.item[0]; in ca0132_voicefx_put()
6245 return 0; in ca0132_voicefx_put()
6247 codec_dbg(codec, "ca0132_voicefx_put: sel=%d, preset=%s\n", in ca0132_voicefx_put()
6251 * Idx 0 is default. in ca0132_voicefx_put()
6254 for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) { in ca0132_voicefx_put()
6255 err = dspio_set_uint_param(codec, ca0132_voicefx.mid, in ca0132_voicefx_put()
6258 if (err < 0) in ca0132_voicefx_put()
6262 if (err >= 0) { in ca0132_voicefx_put()
6263 spec->voicefx_val = sel; in ca0132_voicefx_put()
6265 ca0132_voicefx_set(codec, (sel ? 1 : 0)); in ca0132_voicefx_put()
6274 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_switch_get() local
6275 struct ca0132_spec *spec = codec->spec; in ca0132_switch_get()
6278 long *valp = ucontrol->value.integer.value; in ca0132_switch_get()
6283 *valp = spec->vnode_lswitch[nid - VNODE_START_NID]; in ca0132_switch_get()
6287 *valp = spec->vnode_rswitch[nid - VNODE_START_NID]; in ca0132_switch_get()
6290 return 0; in ca0132_switch_get()
6295 *valp = spec->effects_switch[nid - EFFECT_START_NID]; in ca0132_switch_get()
6296 return 0; in ca0132_switch_get()
6300 if (nid == spec->input_pins[0]) { in ca0132_switch_get()
6301 *valp = spec->cur_mic_boost; in ca0132_switch_get()
6302 return 0; in ca0132_switch_get()
6306 *valp = spec->zxr_gain_set; in ca0132_switch_get()
6307 return 0; in ca0132_switch_get()
6311 *valp = spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT]; in ca0132_switch_get()
6312 return 0; in ca0132_switch_get()
6316 *valp = spec->bass_redirection_val; in ca0132_switch_get()
6317 return 0; in ca0132_switch_get()
6320 return 0; in ca0132_switch_get()
6326 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_switch_put() local
6327 struct ca0132_spec *spec = codec->spec; in ca0132_switch_put()
6330 long *valp = ucontrol->value.integer.value; in ca0132_switch_put()
6333 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n", in ca0132_switch_put()
6336 snd_hda_power_up(codec); in ca0132_switch_put()
6340 spec->vnode_lswitch[nid - VNODE_START_NID] = *valp; in ca0132_switch_put()
6344 spec->vnode_rswitch[nid - VNODE_START_NID] = *valp; in ca0132_switch_put()
6353 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6354 changed = ca0132_pe_switch_set(codec); in ca0132_switch_put()
6360 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6361 changed = ca0132_cvoice_switch_set(codec); in ca0132_switch_put()
6368 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6369 changed = ca0132_effects_set(codec, nid, *valp); in ca0132_switch_put()
6374 if (nid == spec->input_pins[0]) { in ca0132_switch_put()
6375 spec->cur_mic_boost = *valp; in ca0132_switch_put()
6377 if (spec->in_enum_val != REAR_LINE_IN) in ca0132_switch_put()
6378 changed = ca0132_mic_boost_set(codec, *valp); in ca0132_switch_put()
6381 if (spec->cur_mic_type != DIGITAL_MIC) in ca0132_switch_put()
6382 changed = ca0132_mic_boost_set(codec, *valp); in ca0132_switch_put()
6389 spec->zxr_gain_set = *valp; in ca0132_switch_put()
6390 if (spec->cur_out_type == HEADPHONE_OUT) in ca0132_switch_put()
6391 changed = zxr_headphone_gain_set(codec, *valp); in ca0132_switch_put()
6393 changed = 0; in ca0132_switch_put()
6399 spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT] = *valp; in ca0132_switch_put()
6400 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_switch_put()
6401 ca0132_alt_set_full_range_speaker(codec); in ca0132_switch_put()
6403 changed = 0; in ca0132_switch_put()
6407 spec->bass_redirection_val = *valp; in ca0132_switch_put()
6408 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_switch_put()
6409 ca0132_alt_surround_set_bass_redirection(codec, *valp); in ca0132_switch_put()
6411 changed = 0; in ca0132_switch_put()
6415 snd_hda_power_down(codec); in ca0132_switch_put()
6427 static void ca0132_alt_dsp_volume_put(struct hda_codec *codec, hda_nid_t nid) in ca0132_alt_dsp_volume_put() argument
6429 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_volume_put()
6438 lookup_val = spec->vnode_lvol[nid - VNODE_START_NID]; in ca0132_alt_dsp_volume_put()
6440 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6442 ca0132_alt_vol_ctls[dsp_dir].reqs[0], in ca0132_alt_dsp_volume_put()
6445 lookup_val = spec->vnode_rvol[nid - VNODE_START_NID]; in ca0132_alt_dsp_volume_put()
6447 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6452 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6460 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_info() local
6461 struct ca0132_spec *spec = codec->spec; in ca0132_volume_info()
6471 nid = spec->shared_out_nid; in ca0132_volume_info()
6472 mutex_lock(&codec->control_mutex); in ca0132_volume_info()
6473 pval = kcontrol->private_value; in ca0132_volume_info()
6474 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6476 kcontrol->private_value = pval; in ca0132_volume_info()
6477 mutex_unlock(&codec->control_mutex); in ca0132_volume_info()
6481 nid = spec->shared_mic_nid; in ca0132_volume_info()
6482 mutex_lock(&codec->control_mutex); in ca0132_volume_info()
6483 pval = kcontrol->private_value; in ca0132_volume_info()
6484 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6486 kcontrol->private_value = pval; in ca0132_volume_info()
6487 mutex_unlock(&codec->control_mutex); in ca0132_volume_info()
6498 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_get() local
6499 struct ca0132_spec *spec = codec->spec; in ca0132_volume_get()
6502 long *valp = ucontrol->value.integer.value; in ca0132_volume_get()
6506 *valp = spec->vnode_lvol[nid - VNODE_START_NID]; in ca0132_volume_get()
6510 *valp = spec->vnode_rvol[nid - VNODE_START_NID]; in ca0132_volume_get()
6513 return 0; in ca0132_volume_get()
6519 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_put() local
6520 struct ca0132_spec *spec = codec->spec; in ca0132_volume_put()
6523 long *valp = ucontrol->value.integer.value; in ca0132_volume_put()
6524 hda_nid_t shared_nid = 0; in ca0132_volume_put()
6530 spec->vnode_lvol[nid - VNODE_START_NID] = *valp; in ca0132_volume_put()
6534 spec->vnode_rvol[nid - VNODE_START_NID] = *valp; in ca0132_volume_put()
6539 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); in ca0132_volume_put()
6544 snd_hda_power_up(codec); in ca0132_volume_put()
6545 mutex_lock(&codec->control_mutex); in ca0132_volume_put()
6546 pval = kcontrol->private_value; in ca0132_volume_put()
6547 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, in ca0132_volume_put()
6548 0, dir); in ca0132_volume_put()
6550 kcontrol->private_value = pval; in ca0132_volume_put()
6551 mutex_unlock(&codec->control_mutex); in ca0132_volume_put()
6552 snd_hda_power_down(codec); in ca0132_volume_put()
6566 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_volume_put() local
6567 struct ca0132_spec *spec = codec->spec; in ca0132_alt_volume_put()
6570 long *valp = ucontrol->value.integer.value; in ca0132_alt_volume_put()
6571 hda_nid_t vnid = 0; in ca0132_alt_volume_put()
6575 case 0x02: in ca0132_alt_volume_put()
6578 case 0x07: in ca0132_alt_volume_put()
6585 spec->vnode_lvol[vnid - VNODE_START_NID] = *valp; in ca0132_alt_volume_put()
6589 spec->vnode_rvol[vnid - VNODE_START_NID] = *valp; in ca0132_alt_volume_put()
6593 snd_hda_power_up(codec); in ca0132_alt_volume_put()
6594 ca0132_alt_dsp_volume_put(codec, vnid); in ca0132_alt_volume_put()
6595 mutex_lock(&codec->control_mutex); in ca0132_alt_volume_put()
6597 mutex_unlock(&codec->control_mutex); in ca0132_alt_volume_put()
6598 snd_hda_power_down(codec); in ca0132_alt_volume_put()
6606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_tlv() local
6607 struct ca0132_spec *spec = codec->spec; in ca0132_volume_tlv()
6617 nid = spec->shared_out_nid; in ca0132_volume_tlv()
6618 mutex_lock(&codec->control_mutex); in ca0132_volume_tlv()
6619 pval = kcontrol->private_value; in ca0132_volume_tlv()
6620 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6622 kcontrol->private_value = pval; in ca0132_volume_tlv()
6623 mutex_unlock(&codec->control_mutex); in ca0132_volume_tlv()
6627 nid = spec->shared_mic_nid; in ca0132_volume_tlv()
6628 mutex_lock(&codec->control_mutex); in ca0132_volume_tlv()
6629 pval = kcontrol->private_value; in ca0132_volume_tlv()
6630 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6632 kcontrol->private_value = pval; in ca0132_volume_tlv()
6633 mutex_unlock(&codec->control_mutex); in ca0132_volume_tlv()
6642 static int ca0132_alt_add_effect_slider(struct hda_codec *codec, hda_nid_t nid, in ca0132_alt_add_effect_slider() argument
6648 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6665 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6669 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in ca0132_alt_add_effect_slider()
6677 static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid, in add_fx_switch() argument
6680 struct ca0132_spec *spec = codec->spec; in add_fx_switch()
6693 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in add_fx_switch()
6696 static int add_voicefx(struct hda_codec *codec) in add_voicefx() argument
6700 VOICEFX, 1, 0, HDA_INPUT); in add_voicefx()
6704 return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec)); in add_voicefx()
6708 static int add_ca0132_alt_eq_presets(struct hda_codec *codec) in add_ca0132_alt_eq_presets() argument
6712 EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT); in add_ca0132_alt_eq_presets()
6716 return snd_hda_ctl_add(codec, EQ_PRESET_ENUM, in add_ca0132_alt_eq_presets()
6717 snd_ctl_new1(&knew, codec)); in add_ca0132_alt_eq_presets()
6725 static int ca0132_alt_add_svm_enum(struct hda_codec *codec) in ca0132_alt_add_svm_enum() argument
6729 SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_svm_enum()
6733 return snd_hda_ctl_add(codec, SMART_VOLUME_ENUM, in ca0132_alt_add_svm_enum()
6734 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_svm_enum()
6742 static int ca0132_alt_add_output_enum(struct hda_codec *codec) in ca0132_alt_add_output_enum() argument
6746 OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_output_enum()
6750 return snd_hda_ctl_add(codec, OUTPUT_SOURCE_ENUM, in ca0132_alt_add_output_enum()
6751 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_output_enum()
6759 static int ca0132_alt_add_speaker_channel_cfg_enum(struct hda_codec *codec) in ca0132_alt_add_speaker_channel_cfg_enum() argument
6763 SPEAKER_CHANNEL_CFG_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_speaker_channel_cfg_enum()
6767 return snd_hda_ctl_add(codec, SPEAKER_CHANNEL_CFG_ENUM, in ca0132_alt_add_speaker_channel_cfg_enum()
6768 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_speaker_channel_cfg_enum()
6776 static int ca0132_alt_add_front_full_range_switch(struct hda_codec *codec) in ca0132_alt_add_front_full_range_switch() argument
6779 CA0132_CODEC_MUTE_MONO("Full-Range Front Speakers", in ca0132_alt_add_front_full_range_switch()
6782 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_FRONT, in ca0132_alt_add_front_full_range_switch()
6783 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_front_full_range_switch()
6786 static int ca0132_alt_add_rear_full_range_switch(struct hda_codec *codec) in ca0132_alt_add_rear_full_range_switch() argument
6789 CA0132_CODEC_MUTE_MONO("Full-Range Rear Speakers", in ca0132_alt_add_rear_full_range_switch()
6792 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_REAR, in ca0132_alt_add_rear_full_range_switch()
6793 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_rear_full_range_switch()
6798 * channel on speakers that are set as not being full-range. On configurations
6800 * replacement for X-Bass on configurations with an LFE channel.
6802 static int ca0132_alt_add_bass_redirection_crossover(struct hda_codec *codec) in ca0132_alt_add_bass_redirection_crossover() argument
6806 HDA_CODEC_VOLUME_MONO(namestr, BASS_REDIRECTION_XOVER, 1, 0, in ca0132_alt_add_bass_redirection_crossover()
6814 return snd_hda_ctl_add(codec, BASS_REDIRECTION_XOVER, in ca0132_alt_add_bass_redirection_crossover()
6815 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_bass_redirection_crossover()
6818 static int ca0132_alt_add_bass_redirection_switch(struct hda_codec *codec) in ca0132_alt_add_bass_redirection_switch() argument
6825 return snd_hda_ctl_add(codec, BASS_REDIRECTION, in ca0132_alt_add_bass_redirection_switch()
6826 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_bass_redirection_switch()
6831 * because the front microphone has no auto-detect, and Line-in has to be set
6834 static int ca0132_alt_add_input_enum(struct hda_codec *codec) in ca0132_alt_add_input_enum() argument
6838 INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_input_enum()
6842 return snd_hda_ctl_add(codec, INPUT_SOURCE_ENUM, in ca0132_alt_add_input_enum()
6843 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_input_enum()
6847 * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
6850 static int ca0132_alt_add_mic_boost_enum(struct hda_codec *codec) in ca0132_alt_add_mic_boost_enum() argument
6854 MIC_BOOST_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_mic_boost_enum()
6858 return snd_hda_ctl_add(codec, MIC_BOOST_ENUM, in ca0132_alt_add_mic_boost_enum()
6859 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_mic_boost_enum()
6864 * Add headphone gain enumerated control for the AE-5. This switches between
6865 * three modes, low, medium, and high. When non-headphone outputs are selected,
6868 static int ae5_add_headphone_gain_enum(struct hda_codec *codec) in ae5_add_headphone_gain_enum() argument
6871 HDA_CODEC_MUTE_MONO("AE-5: Headphone Gain", in ae5_add_headphone_gain_enum()
6872 AE5_HEADPHONE_GAIN_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_headphone_gain_enum()
6876 return snd_hda_ctl_add(codec, AE5_HEADPHONE_GAIN_ENUM, in ae5_add_headphone_gain_enum()
6877 snd_ctl_new1(&knew, codec)); in ae5_add_headphone_gain_enum()
6881 * Add sound filter enumerated control for the AE-5. This adds three different
6885 static int ae5_add_sound_filter_enum(struct hda_codec *codec) in ae5_add_sound_filter_enum() argument
6888 HDA_CODEC_MUTE_MONO("AE-5: Sound Filter", in ae5_add_sound_filter_enum()
6889 AE5_SOUND_FILTER_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_sound_filter_enum()
6893 return snd_hda_ctl_add(codec, AE5_SOUND_FILTER_ENUM, in ae5_add_sound_filter_enum()
6894 snd_ctl_new1(&knew, codec)); in ae5_add_sound_filter_enum()
6897 static int zxr_add_headphone_gain_switch(struct hda_codec *codec) in zxr_add_headphone_gain_switch() argument
6903 return snd_hda_ctl_add(codec, ZXR_HEADPHONE_GAIN, in zxr_add_headphone_gain_switch()
6904 snd_ctl_new1(&knew, codec)); in zxr_add_headphone_gain_switch()
6917 * I think this has to do with the pin for rear surround being 0x11,
6918 * and the center/lfe being 0x10. Usually the pin order is the opposite.
6934 static void ca0132_alt_add_chmap_ctls(struct hda_codec *codec) in ca0132_alt_add_chmap_ctls() argument
6936 int err = 0; in ca0132_alt_add_chmap_ctls()
6939 list_for_each_entry(pcm, &codec->pcm_list_head, list) { in ca0132_alt_add_chmap_ctls()
6941 &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK]; in ca0132_alt_add_chmap_ctls()
6946 if (hinfo->channels_max == 6) { in ca0132_alt_add_chmap_ctls()
6947 err = snd_pcm_add_chmap_ctls(pcm->pcm, in ca0132_alt_add_chmap_ctls()
6949 elem, hinfo->channels_max, 0, &chmap); in ca0132_alt_add_chmap_ctls()
6950 if (err < 0) in ca0132_alt_add_chmap_ctls()
6951 codec_dbg(codec, "snd_pcm_add_chmap_ctls failed!"); in ca0132_alt_add_chmap_ctls()
6965 HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
6966 HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
6967 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6968 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6969 CA0132_CODEC_MUTE_MONO("Mic1-Boost (30dB) Capture Switch",
6970 0x12, 1, HDA_INPUT),
6983 * Desktop specific control mixer. Removes auto-detect for mic, and adds
6988 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6990 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6991 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6992 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6993 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6994 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6995 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6996 CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
6998 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6999 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
7010 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
7012 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
7013 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
7014 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
7015 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
7016 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
7017 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
7020 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
7021 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
7027 static int ca0132_build_controls(struct hda_codec *codec) in ca0132_build_controls() argument
7029 struct ca0132_spec *spec = codec->spec; in ca0132_build_controls()
7031 int err = 0; in ca0132_build_controls()
7034 for (i = 0; i < spec->num_mixers; i++) { in ca0132_build_controls()
7035 err = snd_hda_add_new_ctls(codec, spec->mixers[i]); in ca0132_build_controls()
7036 if (err < 0) in ca0132_build_controls()
7041 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, in ca0132_build_controls()
7042 spec->tlv); in ca0132_build_controls()
7043 snd_hda_add_vmaster(codec, "Master Playback Volume", in ca0132_build_controls()
7044 spec->tlv, ca0132_alt_follower_pfxs, in ca0132_build_controls()
7045 "Playback Volume", 0); in ca0132_build_controls()
7046 err = __snd_hda_add_vmaster(codec, "Master Playback Switch", in ca0132_build_controls()
7049 true, 0, &spec->vmaster_mute.sw_kctl); in ca0132_build_controls()
7050 if (err < 0) in ca0132_build_controls()
7058 for (i = 0; i < num_fx; i++) { in ca0132_build_controls()
7061 if (i == (ECHO_CANCELLATION - IN_EFFECT_START_NID + in ca0132_build_controls()
7066 err = add_fx_switch(codec, ca0132_effects[i].nid, in ca0132_build_controls()
7069 if (err < 0) in ca0132_build_controls()
7073 * If codec has use_alt_controls set to true, add effect level sliders, in ca0132_build_controls()
7078 err = ca0132_alt_add_svm_enum(codec); in ca0132_build_controls()
7079 if (err < 0) in ca0132_build_controls()
7082 err = add_ca0132_alt_eq_presets(codec); in ca0132_build_controls()
7083 if (err < 0) in ca0132_build_controls()
7086 err = add_fx_switch(codec, PLAY_ENHANCEMENT, in ca0132_build_controls()
7087 "Enable OutFX", 0); in ca0132_build_controls()
7088 if (err < 0) in ca0132_build_controls()
7091 err = add_fx_switch(codec, CRYSTAL_VOICE, in ca0132_build_controls()
7093 if (err < 0) in ca0132_build_controls()
7096 num_sliders = OUT_EFFECTS_COUNT - 1; in ca0132_build_controls()
7097 for (i = 0; i < num_sliders; i++) { in ca0132_build_controls()
7098 err = ca0132_alt_add_effect_slider(codec, in ca0132_build_controls()
7102 if (err < 0) in ca0132_build_controls()
7106 err = ca0132_alt_add_effect_slider(codec, XBASS_XOVER, in ca0132_build_controls()
7107 "X-Bass Crossover", EFX_DIR_OUT); in ca0132_build_controls()
7109 if (err < 0) in ca0132_build_controls()
7112 err = add_fx_switch(codec, PLAY_ENHANCEMENT, in ca0132_build_controls()
7113 "PlayEnhancement", 0); in ca0132_build_controls()
7114 if (err < 0) in ca0132_build_controls()
7117 err = add_fx_switch(codec, CRYSTAL_VOICE, in ca0132_build_controls()
7119 if (err < 0) in ca0132_build_controls()
7122 err = add_voicefx(codec); in ca0132_build_controls()
7123 if (err < 0) in ca0132_build_controls()
7127 * If the codec uses alt_functions, you need the enumerated controls in ca0132_build_controls()
7132 err = ca0132_alt_add_output_enum(codec); in ca0132_build_controls()
7133 if (err < 0) in ca0132_build_controls()
7135 err = ca0132_alt_add_speaker_channel_cfg_enum(codec); in ca0132_build_controls()
7136 if (err < 0) in ca0132_build_controls()
7138 err = ca0132_alt_add_front_full_range_switch(codec); in ca0132_build_controls()
7139 if (err < 0) in ca0132_build_controls()
7141 err = ca0132_alt_add_rear_full_range_switch(codec); in ca0132_build_controls()
7142 if (err < 0) in ca0132_build_controls()
7144 err = ca0132_alt_add_bass_redirection_crossover(codec); in ca0132_build_controls()
7145 if (err < 0) in ca0132_build_controls()
7147 err = ca0132_alt_add_bass_redirection_switch(codec); in ca0132_build_controls()
7148 if (err < 0) in ca0132_build_controls()
7150 err = ca0132_alt_add_mic_boost_enum(codec); in ca0132_build_controls()
7151 if (err < 0) in ca0132_build_controls()
7155 * header on the card, and aux-in is handled by the DBPro board. in ca0132_build_controls()
7158 err = ca0132_alt_add_input_enum(codec); in ca0132_build_controls()
7159 if (err < 0) in ca0132_build_controls()
7167 err = ae5_add_headphone_gain_enum(codec); in ca0132_build_controls()
7168 if (err < 0) in ca0132_build_controls()
7170 err = ae5_add_sound_filter_enum(codec); in ca0132_build_controls()
7171 if (err < 0) in ca0132_build_controls()
7175 err = zxr_add_headphone_gain_switch(codec); in ca0132_build_controls()
7176 if (err < 0) in ca0132_build_controls()
7184 add_tuning_ctls(codec); in ca0132_build_controls()
7187 err = snd_hda_jack_add_kctls(codec, &spec->autocfg); in ca0132_build_controls()
7188 if (err < 0) in ca0132_build_controls()
7191 if (spec->dig_out) { in ca0132_build_controls()
7192 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, in ca0132_build_controls()
7193 spec->dig_out); in ca0132_build_controls()
7194 if (err < 0) in ca0132_build_controls()
7196 err = snd_hda_create_spdif_share_sw(codec, &spec->multiout); in ca0132_build_controls()
7197 if (err < 0) in ca0132_build_controls()
7199 /* spec->multiout.share_spdif = 1; */ in ca0132_build_controls()
7202 if (spec->dig_in) { in ca0132_build_controls()
7203 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); in ca0132_build_controls()
7204 if (err < 0) in ca0132_build_controls()
7209 ca0132_alt_add_chmap_ctls(codec); in ca0132_build_controls()
7211 return 0; in ca0132_build_controls()
7214 static int dbpro_build_controls(struct hda_codec *codec) in dbpro_build_controls() argument
7216 struct ca0132_spec *spec = codec->spec; in dbpro_build_controls()
7217 int err = 0; in dbpro_build_controls()
7219 if (spec->dig_out) { in dbpro_build_controls()
7220 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, in dbpro_build_controls()
7221 spec->dig_out); in dbpro_build_controls()
7222 if (err < 0) in dbpro_build_controls()
7226 if (spec->dig_in) { in dbpro_build_controls()
7227 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); in dbpro_build_controls()
7228 if (err < 0) in dbpro_build_controls()
7232 return 0; in dbpro_build_controls()
7278 static int ca0132_build_pcms(struct hda_codec *codec) in ca0132_build_pcms() argument
7280 struct ca0132_spec *spec = codec->spec; in ca0132_build_pcms()
7283 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog"); in ca0132_build_pcms()
7285 return -ENOMEM; in ca0132_build_pcms()
7287 info->own_chmap = true; in ca0132_build_pcms()
7288 info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap in ca0132_build_pcms()
7291 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback; in ca0132_build_pcms()
7292 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; in ca0132_build_pcms()
7293 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = in ca0132_build_pcms()
7294 spec->multiout.max_channels; in ca0132_build_pcms()
7295 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in ca0132_build_pcms()
7296 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7297 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in ca0132_build_pcms()
7301 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2"); in ca0132_build_pcms()
7303 return -ENOMEM; in ca0132_build_pcms()
7304 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in ca0132_build_pcms()
7306 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7307 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[1]; in ca0132_build_pcms()
7310 info = snd_hda_codec_pcm_new(codec, "CA0132 What U Hear"); in ca0132_build_pcms()
7312 return -ENOMEM; in ca0132_build_pcms()
7313 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in ca0132_build_pcms()
7314 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7315 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[2]; in ca0132_build_pcms()
7317 if (!spec->dig_out && !spec->dig_in) in ca0132_build_pcms()
7318 return 0; in ca0132_build_pcms()
7320 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital"); in ca0132_build_pcms()
7322 return -ENOMEM; in ca0132_build_pcms()
7323 info->pcm_type = HDA_PCM_TYPE_SPDIF; in ca0132_build_pcms()
7324 if (spec->dig_out) { in ca0132_build_pcms()
7325 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = in ca0132_build_pcms()
7327 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; in ca0132_build_pcms()
7329 if (spec->dig_in) { in ca0132_build_pcms()
7330 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in ca0132_build_pcms()
7332 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; in ca0132_build_pcms()
7335 return 0; in ca0132_build_pcms()
7338 static int dbpro_build_pcms(struct hda_codec *codec) in dbpro_build_pcms() argument
7340 struct ca0132_spec *spec = codec->spec; in dbpro_build_pcms()
7343 info = snd_hda_codec_pcm_new(codec, "CA0132 Alt Analog"); in dbpro_build_pcms()
7345 return -ENOMEM; in dbpro_build_pcms()
7346 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in dbpro_build_pcms()
7347 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in dbpro_build_pcms()
7348 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in dbpro_build_pcms()
7351 if (!spec->dig_out && !spec->dig_in) in dbpro_build_pcms()
7352 return 0; in dbpro_build_pcms()
7354 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital"); in dbpro_build_pcms()
7356 return -ENOMEM; in dbpro_build_pcms()
7357 info->pcm_type = HDA_PCM_TYPE_SPDIF; in dbpro_build_pcms()
7358 if (spec->dig_out) { in dbpro_build_pcms()
7359 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = in dbpro_build_pcms()
7361 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; in dbpro_build_pcms()
7363 if (spec->dig_in) { in dbpro_build_pcms()
7364 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in dbpro_build_pcms()
7366 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; in dbpro_build_pcms()
7369 return 0; in dbpro_build_pcms()
7372 static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac) in init_output() argument
7375 snd_hda_set_pin_ctl(codec, pin, PIN_HP); in init_output()
7376 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) in init_output()
7377 snd_hda_codec_write(codec, pin, 0, in init_output()
7381 if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP)) in init_output()
7382 snd_hda_codec_write(codec, dac, 0, in init_output()
7386 static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc) in init_input() argument
7389 snd_hda_set_pin_ctl(codec, pin, PIN_VREF80); in init_input()
7390 if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP) in init_input()
7391 snd_hda_codec_write(codec, pin, 0, in init_input()
7393 AMP_IN_UNMUTE(0)); in init_input()
7395 if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP)) { in init_input()
7396 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, in init_input()
7397 AMP_IN_UNMUTE(0)); in init_input()
7399 /* init to 0 dB and unmute. */ in init_input()
7400 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7401 HDA_AMP_VOLMASK, 0x5a); in init_input()
7402 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7403 HDA_AMP_MUTE, 0); in init_input()
7407 static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir) in refresh_amp_caps() argument
7411 caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ? in refresh_amp_caps()
7413 snd_hda_override_amp_caps(codec, nid, dir, caps); in refresh_amp_caps()
7417 * Switch between Digital built-in mic and analog mic.
7419 static void ca0132_set_dmic(struct hda_codec *codec, int enable) in ca0132_set_dmic() argument
7421 struct ca0132_spec *spec = codec->spec; in ca0132_set_dmic()
7426 codec_dbg(codec, "ca0132_set_dmic: enable=%d\n", enable); in ca0132_set_dmic()
7428 oldval = stop_mic1(codec); in ca0132_set_dmic()
7429 ca0132_set_vipsource(codec, 0); in ca0132_set_dmic()
7431 /* set DMic input as 2-ch */ in ca0132_set_dmic()
7433 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7435 val = spec->dmic_ctl; in ca0132_set_dmic()
7436 val |= 0x80; in ca0132_set_dmic()
7437 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7440 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7441 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1); in ca0132_set_dmic()
7445 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7447 val = spec->dmic_ctl; in ca0132_set_dmic()
7449 val &= 0x5f; in ca0132_set_dmic()
7450 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7453 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7454 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0); in ca0132_set_dmic()
7456 ca0132_set_vipsource(codec, 1); in ca0132_set_dmic()
7457 resume_mic1(codec, oldval); in ca0132_set_dmic()
7463 static void ca0132_init_dmic(struct hda_codec *codec) in ca0132_init_dmic() argument
7465 struct ca0132_spec *spec = codec->spec; in ca0132_init_dmic()
7473 * Bit 2-0: MPIO select in ca0132_init_dmic()
7475 * Bit 7-4: reserved in ca0132_init_dmic()
7477 val = 0x01; in ca0132_init_dmic()
7478 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7482 * Bit 2-0: Data1 MPIO select in ca0132_init_dmic()
7484 * Bit 6-4: Data2 MPIO select in ca0132_init_dmic()
7487 val = 0x83; in ca0132_init_dmic()
7488 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7491 /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first. in ca0132_init_dmic()
7492 * Bit 3-0: Channel mask in ca0132_init_dmic()
7499 val = 0x33; in ca0132_init_dmic()
7501 val = 0x23; in ca0132_init_dmic()
7503 spec->dmic_ctl = val; in ca0132_init_dmic()
7504 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7511 static void ca0132_init_analog_mic2(struct hda_codec *codec) in ca0132_init_analog_mic2() argument
7513 struct ca0132_spec *spec = codec->spec; in ca0132_init_analog_mic2()
7515 mutex_lock(&spec->chipio_mutex); in ca0132_init_analog_mic2()
7517 chipio_8051_write_exram_no_mutex(codec, 0x1920, 0x00); in ca0132_init_analog_mic2()
7518 chipio_8051_write_exram_no_mutex(codec, 0x192d, 0x00); in ca0132_init_analog_mic2()
7520 mutex_unlock(&spec->chipio_mutex); in ca0132_init_analog_mic2()
7523 static void ca0132_refresh_widget_caps(struct hda_codec *codec) in ca0132_refresh_widget_caps() argument
7525 struct ca0132_spec *spec = codec->spec; in ca0132_refresh_widget_caps()
7528 codec_dbg(codec, "ca0132_refresh_widget_caps.\n"); in ca0132_refresh_widget_caps()
7529 snd_hda_codec_update_widgets(codec); in ca0132_refresh_widget_caps()
7531 for (i = 0; i < spec->multiout.num_dacs; i++) in ca0132_refresh_widget_caps()
7532 refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT); in ca0132_refresh_widget_caps()
7534 for (i = 0; i < spec->num_outputs; i++) in ca0132_refresh_widget_caps()
7535 refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT); in ca0132_refresh_widget_caps()
7537 for (i = 0; i < spec->num_inputs; i++) { in ca0132_refresh_widget_caps()
7538 refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT); in ca0132_refresh_widget_caps()
7539 refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT); in ca0132_refresh_widget_caps()
7545 static void ca0132_alt_free_active_dma_channels(struct hda_codec *codec) in ca0132_alt_free_active_dma_channels() argument
7551 status = chipio_read(codec, DSPDMAC_CHNLSTART_MODULE_OFFSET, &tmp); in ca0132_alt_free_active_dma_channels()
7552 if (status >= 0) { in ca0132_alt_free_active_dma_channels()
7553 /* AND against 0xfff to get the active channel bits. */ in ca0132_alt_free_active_dma_channels()
7554 tmp = tmp & 0xfff; in ca0132_alt_free_active_dma_channels()
7560 codec_dbg(codec, "%s: Failed to read active DSP DMA channel register.\n", in ca0132_alt_free_active_dma_channels()
7569 for (i = 0; i < DSPDMAC_DMA_CFG_CHANNEL_COUNT; i++) { in ca0132_alt_free_active_dma_channels()
7570 if (dsp_is_dma_active(codec, i)) { in ca0132_alt_free_active_dma_channels()
7571 status = dspio_free_dma_chan(codec, i); in ca0132_alt_free_active_dma_channels()
7572 if (status < 0) in ca0132_alt_free_active_dma_channels()
7573 codec_dbg(codec, "%s: Failed to free active DSP DMA channel %d.\n", in ca0132_alt_free_active_dma_channels()
7584 * cause of most of the no-audio on startup issues were due to improperly
7597 * DSP stream that uses the DMA channels. These are 0x0c, the audio output
7598 * stream, 0x03, analog mic 1, and 0x04, analog mic 2.
7600 static void ca0132_alt_start_dsp_audio_streams(struct hda_codec *codec) in ca0132_alt_start_dsp_audio_streams() argument
7602 static const unsigned int dsp_dma_stream_ids[] = { 0x0c, 0x03, 0x04 }; in ca0132_alt_start_dsp_audio_streams()
7603 struct ca0132_spec *spec = codec->spec; in ca0132_alt_start_dsp_audio_streams()
7610 mutex_lock(&spec->chipio_mutex); in ca0132_alt_start_dsp_audio_streams()
7612 for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) { in ca0132_alt_start_dsp_audio_streams()
7613 chipio_get_stream_control(codec, dsp_dma_stream_ids[i], &tmp); in ca0132_alt_start_dsp_audio_streams()
7616 chipio_set_stream_control(codec, in ca0132_alt_start_dsp_audio_streams()
7617 dsp_dma_stream_ids[i], 0); in ca0132_alt_start_dsp_audio_streams()
7621 mutex_unlock(&spec->chipio_mutex); in ca0132_alt_start_dsp_audio_streams()
7628 ca0132_alt_free_active_dma_channels(codec); in ca0132_alt_start_dsp_audio_streams()
7630 mutex_lock(&spec->chipio_mutex); in ca0132_alt_start_dsp_audio_streams()
7632 /* Make sure stream 0x0c is six channels. */ in ca0132_alt_start_dsp_audio_streams()
7633 chipio_set_stream_channels(codec, 0x0c, 6); in ca0132_alt_start_dsp_audio_streams()
7635 for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) { in ca0132_alt_start_dsp_audio_streams()
7636 chipio_set_stream_control(codec, in ca0132_alt_start_dsp_audio_streams()
7643 mutex_unlock(&spec->chipio_mutex); in ca0132_alt_start_dsp_audio_streams()
7647 * The region of ChipIO memory from 0x190000-0x1903fc is a sort of 'audio
7649 * of an 8-bit destination, an 8-bit source, and an unknown 2-bit number
7650 * value. The 2-bit number value is seemingly 0 if inactive, 1 if active,
7653 * 0x0001f8c0
7657 * the region of exram memory from 0x1477-0x1575 has each byte represent an
7658 * entry within the 0x190000 range, and when a range of entries is in use, the
7659 * ending value is overwritten with 0xff.
7660 * 0x1578 in exram is a table of 0x25 entries, corresponding to the ChipIO
7661 * streamID's, where each entry is a starting 0x190000 port offset.
7662 * 0x159d in exram is the same as 0x1578, except it contains the ending port
7670 * 0x00-0x1f: HDA audio stream input/output ports.
7671 * 0x80-0xbf: Sample rate converter input/outputs. Only valid ports seem to
7672 * have the lower-nibble set to 0x1, 0x2, and 0x9.
7673 * 0xc0-0xdf: DSP DMA input/output ports. Dynamically assigned.
7674 * 0xe0-0xff: DAC/ADC audio input/output ports.
7677 * 0x03: Mic1 ADC to DSP.
7678 * 0x04: Mic2 ADC to DSP.
7679 * 0x05: HDA node 0x02 audio stream to DSP.
7680 * 0x0f: DSP Mic exit to HDA node 0x07.
7681 * 0x0c: DSP processed audio to DACs.
7682 * 0x14: DAC0, front L/R.
7690 static void chipio_remap_stream(struct hda_codec *codec, in chipio_remap_stream() argument
7696 chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id, in chipio_remap_stream()
7700 * Check if the stream's port value is 0xff, because the 8051 may not in chipio_remap_stream()
7704 if (stream_offset == 0xff) { in chipio_remap_stream()
7705 for (i = 0; i < 5; i++) { in chipio_remap_stream()
7708 chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id, in chipio_remap_stream()
7711 if (stream_offset != 0xff) in chipio_remap_stream()
7716 if (stream_offset == 0xff) { in chipio_remap_stream()
7717 codec_info(codec, "%s: Stream 0x%02x ports aren't allocated, remap failed!\n", in chipio_remap_stream()
7718 __func__, remap_data->stream_id); in chipio_remap_stream()
7722 /* Offset isn't in bytes, its in 32-bit words, so multiply it by 4. */ in chipio_remap_stream()
7723 stream_offset *= 0x04; in chipio_remap_stream()
7724 stream_offset += 0x190000; in chipio_remap_stream()
7726 for (i = 0; i < remap_data->count; i++) { in chipio_remap_stream()
7727 chipio_write_no_mutex(codec, in chipio_remap_stream()
7728 stream_offset + remap_data->offset[i], in chipio_remap_stream()
7729 remap_data->value[i]); in chipio_remap_stream()
7733 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in chipio_remap_stream()
7740 /* Non-zero values are floating point 0.000198. */
7741 0x394f9e38, 0x394f9e38, 0x00000000, 0x00000000, 0x00000000, 0x00000000
7745 /* Non-zero values are floating point 0.000220. */
7746 0x00000000, 0x00000000, 0x3966afcd, 0x3966afcd, 0x3966afcd, 0x3966afcd
7750 /* Non-zero values are floating point 0.000100. */
7751 0x00000000, 0x00000000, 0x38d1b717, 0x38d1b717, 0x38d1b717, 0x38d1b717
7757 static void ca0132_alt_init_speaker_tuning(struct hda_codec *codec) in ca0132_alt_init_speaker_tuning() argument
7759 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init_speaker_tuning()
7780 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp); in ca0132_alt_init_speaker_tuning()
7785 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7790 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7793 for (i = 0; i < 6; i++) in ca0132_alt_init_speaker_tuning()
7794 dspio_set_uint_param(codec, 0x96, in ca0132_alt_init_speaker_tuning()
7799 * Initialize mic for non-chromebook ca0132 implementations.
7801 static void ca0132_alt_init_analog_mics(struct hda_codec *codec) in ca0132_alt_init_analog_mics() argument
7803 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init_analog_mics()
7807 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_init_analog_mics()
7808 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_init_analog_mics()
7810 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7814 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_init_analog_mics()
7817 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000); in ca0132_alt_init_analog_mics()
7818 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000); in ca0132_alt_init_analog_mics()
7820 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7822 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_alt_init_analog_mics()
7826 * Sets the source of stream 0x14 to connpointID 0x48, and the destination
7827 * connpointID to 0x91. If this isn't done, the destination is 0x71, and
7831 static void sbz_connect_streams(struct hda_codec *codec) in sbz_connect_streams() argument
7833 struct ca0132_spec *spec = codec->spec; in sbz_connect_streams()
7835 mutex_lock(&spec->chipio_mutex); in sbz_connect_streams()
7837 codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n"); in sbz_connect_streams()
7839 /* This value is 0x43 for 96khz, and 0x83 for 192khz. */ in sbz_connect_streams()
7840 chipio_write_no_mutex(codec, 0x18a020, 0x00000043); in sbz_connect_streams()
7842 /* Setup stream 0x14 with it's source and destination points */ in sbz_connect_streams()
7843 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91); in sbz_connect_streams()
7844 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000); in sbz_connect_streams()
7845 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000); in sbz_connect_streams()
7846 chipio_set_stream_channels(codec, 0x14, 2); in sbz_connect_streams()
7847 chipio_set_stream_control(codec, 0x14, 1); in sbz_connect_streams()
7849 codec_dbg(codec, "Connect Streams exited, mutex released.\n"); in sbz_connect_streams()
7851 mutex_unlock(&spec->chipio_mutex); in sbz_connect_streams()
7860 static void sbz_chipio_startup_data(struct hda_codec *codec) in sbz_chipio_startup_data() argument
7863 struct ca0132_spec *spec = codec->spec; in sbz_chipio_startup_data()
7865 mutex_lock(&spec->chipio_mutex); in sbz_chipio_startup_data()
7866 codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n"); in sbz_chipio_startup_data()
7869 chipio_remap_stream(codec, &stream_remap_data[0]); in sbz_chipio_startup_data()
7887 chipio_remap_stream(codec, dsp_out_remap_data); in sbz_chipio_startup_data()
7889 codec_dbg(codec, "Startup Data exited, mutex released.\n"); in sbz_chipio_startup_data()
7890 mutex_unlock(&spec->chipio_mutex); in sbz_chipio_startup_data()
7893 static void ca0132_alt_dsp_initial_mic_setup(struct hda_codec *codec) in ca0132_alt_dsp_initial_mic_setup() argument
7895 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_initial_mic_setup()
7898 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_dsp_initial_mic_setup()
7899 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_dsp_initial_mic_setup()
7901 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_dsp_initial_mic_setup()
7902 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_dsp_initial_mic_setup()
7905 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_dsp_initial_mic_setup()
7907 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_dsp_initial_mic_setup()
7908 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_dsp_initial_mic_setup()
7912 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7913 chipio_write(codec, 0x18b09C, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7916 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7917 chipio_write(codec, 0x18b09c, 0x0000004c); in ca0132_alt_dsp_initial_mic_setup()
7924 static void ae5_post_dsp_register_set(struct hda_codec *codec) in ae5_post_dsp_register_set() argument
7926 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_register_set()
7928 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_post_dsp_register_set()
7929 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae5_post_dsp_register_set()
7931 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7932 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7933 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7934 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7935 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7936 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7937 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7938 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7939 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7940 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7941 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7942 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7944 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f); in ae5_post_dsp_register_set()
7945 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_post_dsp_register_set()
7946 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_register_set()
7949 static void ae5_post_dsp_param_setup(struct hda_codec *codec) in ae5_post_dsp_param_setup() argument
7954 * AE-5's registry values in Windows. in ae5_post_dsp_param_setup()
7956 chipio_set_control_param(codec, 3, 0); in ae5_post_dsp_param_setup()
7959 * change colors on the external LED strip connected to the AE-5. in ae5_post_dsp_param_setup()
7961 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1); in ae5_post_dsp_param_setup()
7963 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae5_post_dsp_param_setup()
7964 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_post_dsp_param_setup()
7966 chipio_8051_write_exram(codec, 0xfa92, 0x22); in ae5_post_dsp_param_setup()
7969 static void ae5_post_dsp_pll_setup(struct hda_codec *codec) in ae5_post_dsp_pll_setup() argument
7971 chipio_8051_write_pll_pmu(codec, 0x41, 0xc8); in ae5_post_dsp_pll_setup()
7972 chipio_8051_write_pll_pmu(codec, 0x45, 0xcc); in ae5_post_dsp_pll_setup()
7973 chipio_8051_write_pll_pmu(codec, 0x40, 0xcb); in ae5_post_dsp_pll_setup()
7974 chipio_8051_write_pll_pmu(codec, 0x43, 0xc7); in ae5_post_dsp_pll_setup()
7975 chipio_8051_write_pll_pmu(codec, 0x51, 0x8d); in ae5_post_dsp_pll_setup()
7978 static void ae5_post_dsp_stream_setup(struct hda_codec *codec) in ae5_post_dsp_stream_setup() argument
7980 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_stream_setup()
7982 mutex_lock(&spec->chipio_mutex); in ae5_post_dsp_stream_setup()
7984 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae5_post_dsp_stream_setup()
7986 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae5_post_dsp_stream_setup()
7988 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0); in ae5_post_dsp_stream_setup()
7990 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0); in ae5_post_dsp_stream_setup()
7991 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae5_post_dsp_stream_setup()
7992 chipio_set_stream_channels(codec, 0x18, 6); in ae5_post_dsp_stream_setup()
7993 chipio_set_stream_control(codec, 0x18, 1); in ae5_post_dsp_stream_setup()
7995 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4); in ae5_post_dsp_stream_setup()
7997 chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7); in ae5_post_dsp_stream_setup()
7999 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80); in ae5_post_dsp_stream_setup()
8001 mutex_unlock(&spec->chipio_mutex); in ae5_post_dsp_stream_setup()
8004 static void ae5_post_dsp_startup_data(struct hda_codec *codec) in ae5_post_dsp_startup_data() argument
8006 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_startup_data()
8008 mutex_lock(&spec->chipio_mutex); in ae5_post_dsp_startup_data()
8010 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae5_post_dsp_startup_data()
8011 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae5_post_dsp_startup_data()
8012 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae5_post_dsp_startup_data()
8013 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae5_post_dsp_startup_data()
8015 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
8016 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae5_post_dsp_startup_data()
8017 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12); in ae5_post_dsp_startup_data()
8018 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00); in ae5_post_dsp_startup_data()
8019 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48); in ae5_post_dsp_startup_data()
8020 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
8021 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_startup_data()
8022 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
8023 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
8024 ca0113_mmio_gpio_set(codec, 0, true); in ae5_post_dsp_startup_data()
8025 ca0113_mmio_gpio_set(codec, 1, true); in ae5_post_dsp_startup_data()
8026 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80); in ae5_post_dsp_startup_data()
8028 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012); in ae5_post_dsp_startup_data()
8030 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
8031 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
8033 mutex_unlock(&spec->chipio_mutex); in ae5_post_dsp_startup_data()
8036 static void ae7_post_dsp_setup_ports(struct hda_codec *codec) in ae7_post_dsp_setup_ports() argument
8038 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_setup_ports()
8040 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_setup_ports()
8043 chipio_remap_stream(codec, &stream_remap_data[1]); in ae7_post_dsp_setup_ports()
8045 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_post_dsp_setup_ports()
8046 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40); in ae7_post_dsp_setup_ports()
8047 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00); in ae7_post_dsp_setup_ports()
8048 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00); in ae7_post_dsp_setup_ports()
8049 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff); in ae7_post_dsp_setup_ports()
8050 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff); in ae7_post_dsp_setup_ports()
8051 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff); in ae7_post_dsp_setup_ports()
8052 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f); in ae7_post_dsp_setup_ports()
8054 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_setup_ports()
8057 static void ae7_post_dsp_asi_stream_setup(struct hda_codec *codec) in ae7_post_dsp_asi_stream_setup() argument
8059 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_asi_stream_setup()
8061 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_asi_stream_setup()
8063 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae7_post_dsp_asi_stream_setup()
8064 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_post_dsp_asi_stream_setup()
8066 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae7_post_dsp_asi_stream_setup()
8068 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_stream_setup()
8069 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_stream_setup()
8071 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_stream_setup()
8072 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_stream_setup()
8073 chipio_set_stream_control(codec, 0x18, 1); in ae7_post_dsp_asi_stream_setup()
8075 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4); in ae7_post_dsp_asi_stream_setup()
8077 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_asi_stream_setup()
8080 static void ae7_post_dsp_pll_setup(struct hda_codec *codec) in ae7_post_dsp_pll_setup() argument
8083 0x41, 0x45, 0x40, 0x43, 0x51 in ae7_post_dsp_pll_setup()
8086 0xc8, 0xcc, 0xcb, 0xc7, 0x8d in ae7_post_dsp_pll_setup()
8090 for (i = 0; i < ARRAY_SIZE(addr); i++) in ae7_post_dsp_pll_setup()
8091 chipio_8051_write_pll_pmu_no_mutex(codec, addr[i], data[i]); in ae7_post_dsp_pll_setup()
8094 static void ae7_post_dsp_asi_setup_ports(struct hda_codec *codec) in ae7_post_dsp_asi_setup_ports() argument
8096 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_asi_setup_ports()
8098 0x0b, 0x04, 0x06, 0x0a, 0x0c, 0x11, 0x12, 0x13, 0x14 in ae7_post_dsp_asi_setup_ports()
8101 0x12, 0x00, 0x48, 0x05, 0x5f, 0xff, 0xff, 0xff, 0x7f in ae7_post_dsp_asi_setup_ports()
8105 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_asi_setup_ports()
8107 chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7); in ae7_post_dsp_asi_setup_ports()
8109 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
8110 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
8111 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae7_post_dsp_asi_setup_ports()
8112 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae7_post_dsp_asi_setup_ports()
8114 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup_ports()
8115 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae7_post_dsp_asi_setup_ports()
8117 for (i = 0; i < ARRAY_SIZE(target); i++) in ae7_post_dsp_asi_setup_ports()
8118 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]); in ae7_post_dsp_asi_setup_ports()
8120 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
8121 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
8122 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
8124 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56); in ae7_post_dsp_asi_setup_ports()
8125 chipio_set_stream_channels(codec, 0x21, 2); in ae7_post_dsp_asi_setup_ports()
8126 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000); in ae7_post_dsp_asi_setup_ports()
8128 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_post_dsp_asi_setup_ports()
8134 chipio_set_control_param_no_mutex(codec, 0x20, 0x21); in ae7_post_dsp_asi_setup_ports()
8136 chipio_write_no_mutex(codec, 0x18b038, 0x00000088); in ae7_post_dsp_asi_setup_ports()
8140 * seemingly sends data to the HDA node 0x09, which is the digital in ae7_post_dsp_asi_setup_ports()
8142 * know what data is being sent. Interestingly, the AE-5 seems to go in ae7_post_dsp_asi_setup_ports()
8144 * step, but the AE-7 does. in ae7_post_dsp_asi_setup_ports()
8147 ca0113_mmio_gpio_set(codec, 0, 1); in ae7_post_dsp_asi_setup_ports()
8148 ca0113_mmio_gpio_set(codec, 1, 1); in ae7_post_dsp_asi_setup_ports()
8150 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
8151 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000); in ae7_post_dsp_asi_setup_ports()
8152 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
8153 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
8155 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_setup_ports()
8156 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_setup_ports()
8158 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_setup_ports()
8159 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_setup_ports()
8165 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup_ports()
8166 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae7_post_dsp_asi_setup_ports()
8168 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_asi_setup_ports()
8176 static void ae7_post_dsp_asi_setup(struct hda_codec *codec) in ae7_post_dsp_asi_setup() argument
8178 chipio_8051_write_direct(codec, 0x93, 0x10); in ae7_post_dsp_asi_setup()
8180 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae7_post_dsp_asi_setup()
8182 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup()
8183 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_post_dsp_asi_setup()
8185 chipio_set_control_param(codec, 3, 3); in ae7_post_dsp_asi_setup()
8186 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1); in ae7_post_dsp_asi_setup()
8188 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae7_post_dsp_asi_setup()
8189 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_post_dsp_asi_setup()
8190 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00); in ae7_post_dsp_asi_setup()
8192 chipio_8051_write_exram(codec, 0xfa92, 0x22); in ae7_post_dsp_asi_setup()
8194 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup()
8195 ae7_post_dsp_asi_stream_setup(codec); in ae7_post_dsp_asi_setup()
8197 chipio_8051_write_pll_pmu(codec, 0x43, 0xc7); in ae7_post_dsp_asi_setup()
8199 ae7_post_dsp_asi_setup_ports(codec); in ae7_post_dsp_asi_setup()
8205 static void ca0132_setup_defaults(struct hda_codec *codec) in ca0132_setup_defaults() argument
8207 struct ca0132_spec *spec = codec->spec; in ca0132_setup_defaults()
8212 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_setup_defaults()
8217 for (idx = 0; idx < num_fx; idx++) { in ca0132_setup_defaults()
8218 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ca0132_setup_defaults()
8219 dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_setup_defaults()
8227 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ca0132_setup_defaults()
8230 dspio_set_uint_param(codec, 0x8f, 0x01, tmp); in ca0132_setup_defaults()
8234 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_setup_defaults()
8235 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_setup_defaults()
8239 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_setup_defaults()
8243 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ca0132_setup_defaults()
8250 static void r3d_setup_defaults(struct hda_codec *codec) in r3d_setup_defaults() argument
8252 struct ca0132_spec *spec = codec->spec; in r3d_setup_defaults()
8257 if (spec->dsp_state != DSP_DOWNLOADED) in r3d_setup_defaults()
8260 ca0132_alt_init_analog_mics(codec); in r3d_setup_defaults()
8261 ca0132_alt_start_dsp_audio_streams(codec); in r3d_setup_defaults()
8265 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in r3d_setup_defaults()
8269 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in r3d_setup_defaults()
8270 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in r3d_setup_defaults()
8273 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in r3d_setup_defaults()
8276 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED); in r3d_setup_defaults()
8280 ca0113_mmio_gpio_set(codec, 2, false); in r3d_setup_defaults()
8281 ca0113_mmio_gpio_set(codec, 4, true); in r3d_setup_defaults()
8286 for (idx = 0; idx < num_fx; idx++) { in r3d_setup_defaults()
8287 for (i = 0; i <= ca0132_effects[idx].params; i++) { in r3d_setup_defaults()
8288 dspio_set_uint_param(codec, in r3d_setup_defaults()
8300 static void sbz_setup_defaults(struct hda_codec *codec) in sbz_setup_defaults() argument
8302 struct ca0132_spec *spec = codec->spec; in sbz_setup_defaults()
8307 if (spec->dsp_state != DSP_DOWNLOADED) in sbz_setup_defaults()
8310 ca0132_alt_init_analog_mics(codec); in sbz_setup_defaults()
8311 ca0132_alt_start_dsp_audio_streams(codec); in sbz_setup_defaults()
8312 sbz_connect_streams(codec); in sbz_setup_defaults()
8313 sbz_chipio_startup_data(codec); in sbz_setup_defaults()
8320 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in sbz_setup_defaults()
8321 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in sbz_setup_defaults()
8325 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in sbz_setup_defaults()
8329 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in sbz_setup_defaults()
8330 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in sbz_setup_defaults()
8333 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in sbz_setup_defaults()
8335 ca0132_alt_dsp_initial_mic_setup(codec); in sbz_setup_defaults()
8339 for (idx = 0; idx < num_fx; idx++) { in sbz_setup_defaults()
8340 for (i = 0; i <= ca0132_effects[idx].params; i++) { in sbz_setup_defaults()
8341 dspio_set_uint_param(codec, in sbz_setup_defaults()
8348 ca0132_alt_init_speaker_tuning(codec); in sbz_setup_defaults()
8352 * Setup default parameters for the Sound BlasterX AE-5 DSP.
8354 static void ae5_setup_defaults(struct hda_codec *codec) in ae5_setup_defaults() argument
8356 struct ca0132_spec *spec = codec->spec; in ae5_setup_defaults()
8361 if (spec->dsp_state != DSP_DOWNLOADED) in ae5_setup_defaults()
8364 ca0132_alt_init_analog_mics(codec); in ae5_setup_defaults()
8365 ca0132_alt_start_dsp_audio_streams(codec); in ae5_setup_defaults()
8369 dspio_set_uint_param(codec, 0x96, 0x29, tmp); in ae5_setup_defaults()
8370 dspio_set_uint_param(codec, 0x96, 0x2a, tmp); in ae5_setup_defaults()
8371 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae5_setup_defaults()
8372 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae5_setup_defaults()
8374 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_setup_defaults()
8375 ca0113_mmio_gpio_set(codec, 0, false); in ae5_setup_defaults()
8376 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae5_setup_defaults()
8380 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae5_setup_defaults()
8381 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae5_setup_defaults()
8385 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae5_setup_defaults()
8389 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae5_setup_defaults()
8390 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ae5_setup_defaults()
8393 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae5_setup_defaults()
8395 ca0132_alt_dsp_initial_mic_setup(codec); in ae5_setup_defaults()
8396 ae5_post_dsp_register_set(codec); in ae5_setup_defaults()
8397 ae5_post_dsp_param_setup(codec); in ae5_setup_defaults()
8398 ae5_post_dsp_pll_setup(codec); in ae5_setup_defaults()
8399 ae5_post_dsp_stream_setup(codec); in ae5_setup_defaults()
8400 ae5_post_dsp_startup_data(codec); in ae5_setup_defaults()
8404 for (idx = 0; idx < num_fx; idx++) { in ae5_setup_defaults()
8405 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae5_setup_defaults()
8406 dspio_set_uint_param(codec, in ae5_setup_defaults()
8413 ca0132_alt_init_speaker_tuning(codec); in ae5_setup_defaults()
8417 * Setup default parameters for the Sound Blaster AE-7 DSP.
8419 static void ae7_setup_defaults(struct hda_codec *codec) in ae7_setup_defaults() argument
8421 struct ca0132_spec *spec = codec->spec; in ae7_setup_defaults()
8426 if (spec->dsp_state != DSP_DOWNLOADED) in ae7_setup_defaults()
8429 ca0132_alt_init_analog_mics(codec); in ae7_setup_defaults()
8430 ca0132_alt_start_dsp_audio_streams(codec); in ae7_setup_defaults()
8431 ae7_post_dsp_setup_ports(codec); in ae7_setup_defaults()
8434 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8436 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8439 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_setup_defaults()
8442 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae7_setup_defaults()
8443 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae7_setup_defaults()
8445 ca0113_mmio_gpio_set(codec, 0, false); in ae7_setup_defaults()
8449 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae7_setup_defaults()
8450 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae7_setup_defaults()
8454 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae7_setup_defaults()
8458 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae7_setup_defaults()
8459 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ae7_setup_defaults()
8462 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae7_setup_defaults()
8463 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae7_setup_defaults()
8469 ca0132_alt_init_analog_mics(codec); in ae7_setup_defaults()
8471 ae7_post_dsp_asi_setup(codec); in ae7_setup_defaults()
8474 * Not sure why, but these are both set to 1. They're only set to 0 in ae7_setup_defaults()
8477 ca0113_mmio_gpio_set(codec, 0, true); in ae7_setup_defaults()
8478 ca0113_mmio_gpio_set(codec, 1, true); in ae7_setup_defaults()
8481 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04); in ae7_setup_defaults()
8482 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04); in ae7_setup_defaults()
8483 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80); in ae7_setup_defaults()
8487 for (idx = 0; idx < num_fx; idx++) { in ae7_setup_defaults()
8488 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae7_setup_defaults()
8489 dspio_set_uint_param(codec, in ae7_setup_defaults()
8496 ca0132_alt_init_speaker_tuning(codec); in ae7_setup_defaults()
8502 static void ca0132_init_flags(struct hda_codec *codec) in ca0132_init_flags() argument
8504 struct ca0132_spec *spec = codec->spec; in ca0132_init_flags()
8507 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1); in ca0132_init_flags()
8508 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1); in ca0132_init_flags()
8509 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1); in ca0132_init_flags()
8510 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, 1); in ca0132_init_flags()
8511 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, 1); in ca0132_init_flags()
8512 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8513 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0); in ca0132_init_flags()
8514 chipio_set_control_flag(codec, in ca0132_init_flags()
8515 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8516 chipio_set_control_flag(codec, in ca0132_init_flags()
8519 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8520 chipio_set_control_flag(codec, in ca0132_init_flags()
8521 CONTROL_FLAG_PORT_A_COMMON_MODE, 0); in ca0132_init_flags()
8522 chipio_set_control_flag(codec, in ca0132_init_flags()
8523 CONTROL_FLAG_PORT_D_COMMON_MODE, 0); in ca0132_init_flags()
8524 chipio_set_control_flag(codec, in ca0132_init_flags()
8525 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0); in ca0132_init_flags()
8526 chipio_set_control_flag(codec, in ca0132_init_flags()
8527 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8528 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1); in ca0132_init_flags()
8535 static void ca0132_init_params(struct hda_codec *codec) in ca0132_init_params() argument
8537 struct ca0132_spec *spec = codec->spec; in ca0132_init_params()
8540 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ca0132_init_params()
8541 chipio_set_conn_rate(codec, 0x0B, SR_48_000); in ca0132_init_params()
8542 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); in ca0132_init_params()
8543 chipio_set_control_param(codec, 0, 0); in ca0132_init_params()
8544 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_init_params()
8547 chipio_set_control_param(codec, CONTROL_PARAM_PORTA_160OHM_GAIN, 6); in ca0132_init_params()
8548 chipio_set_control_param(codec, CONTROL_PARAM_PORTD_160OHM_GAIN, 6); in ca0132_init_params()
8551 static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k) in ca0132_set_dsp_msr() argument
8553 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k); in ca0132_set_dsp_msr()
8554 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k); in ca0132_set_dsp_msr()
8555 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k); in ca0132_set_dsp_msr()
8556 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k); in ca0132_set_dsp_msr()
8557 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k); in ca0132_set_dsp_msr()
8558 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k); in ca0132_set_dsp_msr()
8560 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_set_dsp_msr()
8561 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_set_dsp_msr()
8562 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ca0132_set_dsp_msr()
8565 static bool ca0132_download_dsp_images(struct hda_codec *codec) in ca0132_download_dsp_images() argument
8568 struct ca0132_spec *spec = codec->spec; in ca0132_download_dsp_images()
8581 codec->card->dev) != 0) in ca0132_download_dsp_images()
8582 codec_dbg(codec, "Desktop firmware not found."); in ca0132_download_dsp_images()
8584 codec_dbg(codec, "Desktop firmware selected."); in ca0132_download_dsp_images()
8588 codec->card->dev) != 0) in ca0132_download_dsp_images()
8589 codec_dbg(codec, "Recon3Di alt firmware not detected."); in ca0132_download_dsp_images()
8591 codec_dbg(codec, "Recon3Di firmware selected."); in ca0132_download_dsp_images()
8598 * exists for your particular codec. in ca0132_download_dsp_images()
8601 codec_dbg(codec, "Default firmware selected."); in ca0132_download_dsp_images()
8603 codec->card->dev) != 0) in ca0132_download_dsp_images()
8607 dsp_os_image = (struct dsp_image_seg *)(fw_entry->data); in ca0132_download_dsp_images()
8608 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) { in ca0132_download_dsp_images()
8609 codec_err(codec, "ca0132 DSP load image failed\n"); in ca0132_download_dsp_images()
8613 dsp_loaded = dspload_wait_loaded(codec); in ca0132_download_dsp_images()
8621 static void ca0132_download_dsp(struct hda_codec *codec) in ca0132_download_dsp() argument
8623 struct ca0132_spec *spec = codec->spec; in ca0132_download_dsp()
8629 if (spec->dsp_state == DSP_DOWNLOAD_FAILED) in ca0132_download_dsp()
8632 chipio_enable_clocks(codec); in ca0132_download_dsp()
8633 if (spec->dsp_state != DSP_DOWNLOADED) { in ca0132_download_dsp()
8634 spec->dsp_state = DSP_DOWNLOADING; in ca0132_download_dsp()
8636 if (!ca0132_download_dsp_images(codec)) in ca0132_download_dsp()
8637 spec->dsp_state = DSP_DOWNLOAD_FAILED; in ca0132_download_dsp()
8639 spec->dsp_state = DSP_DOWNLOADED; in ca0132_download_dsp()
8643 if (spec->dsp_state == DSP_DOWNLOADED && !ca0132_use_alt_functions(spec)) in ca0132_download_dsp()
8644 ca0132_set_dsp_msr(codec, true); in ca0132_download_dsp()
8647 static void ca0132_process_dsp_response(struct hda_codec *codec, in ca0132_process_dsp_response() argument
8650 struct ca0132_spec *spec = codec->spec; in ca0132_process_dsp_response()
8652 codec_dbg(codec, "ca0132_process_dsp_response\n"); in ca0132_process_dsp_response()
8653 snd_hda_power_up_pm(codec); in ca0132_process_dsp_response()
8654 if (spec->wait_scp) { in ca0132_process_dsp_response()
8655 if (dspio_get_response_data(codec) >= 0) in ca0132_process_dsp_response()
8656 spec->wait_scp = 0; in ca0132_process_dsp_response()
8659 dspio_clear_response_queue(codec); in ca0132_process_dsp_response()
8660 snd_hda_power_down_pm(codec); in ca0132_process_dsp_response()
8663 static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb) in hp_callback() argument
8665 struct ca0132_spec *spec = codec->spec; in hp_callback()
8668 /* Delay enabling the HP amp, to let the mic-detection in hp_callback()
8671 tbl = snd_hda_jack_tbl_get(codec, cb->nid); in hp_callback()
8673 tbl->block_report = 1; in hp_callback()
8674 schedule_delayed_work(&spec->unsol_hp_work, msecs_to_jiffies(500)); in hp_callback()
8677 static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb) in amic_callback() argument
8679 struct ca0132_spec *spec = codec->spec; in amic_callback()
8682 ca0132_alt_select_in(codec); in amic_callback()
8684 ca0132_select_mic(codec); in amic_callback()
8687 static void ca0132_setup_unsol(struct hda_codec *codec) in ca0132_setup_unsol() argument
8689 struct ca0132_spec *spec = codec->spec; in ca0132_setup_unsol()
8690 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_hp, hp_callback); in ca0132_setup_unsol()
8691 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_amic1, in ca0132_setup_unsol()
8693 snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP, in ca0132_setup_unsol()
8697 snd_hda_jack_detect_enable_callback(codec, in ca0132_setup_unsol()
8698 spec->unsol_tag_front_hp, hp_callback); in ca0132_setup_unsol()
8708 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
8715 {0x01, AC_VERB_SET_POWER_STATE, 0x03},
8717 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
8725 {0x15, 0x70D, 0xF0},
8726 {0x15, 0x70E, 0xFE},
8727 {0x15, 0x707, 0x75},
8728 {0x15, 0x707, 0xD3},
8729 {0x15, 0x707, 0x09},
8730 {0x15, 0x707, 0x53},
8731 {0x15, 0x707, 0xD4},
8732 {0x15, 0x707, 0xEF},
8733 {0x15, 0x707, 0x75},
8734 {0x15, 0x707, 0xD3},
8735 {0x15, 0x707, 0x09},
8736 {0x15, 0x707, 0x02},
8737 {0x15, 0x707, 0x37},
8738 {0x15, 0x707, 0x78},
8739 {0x15, 0x53C, 0xCE},
8740 {0x15, 0x575, 0xC9},
8741 {0x15, 0x53D, 0xCE},
8742 {0x15, 0x5B7, 0xC9},
8743 {0x15, 0x70D, 0xE8},
8744 {0x15, 0x70E, 0xFE},
8745 {0x15, 0x707, 0x02},
8746 {0x15, 0x707, 0x68},
8747 {0x15, 0x707, 0x62},
8748 {0x15, 0x53A, 0xCE},
8749 {0x15, 0x546, 0xC9},
8750 {0x15, 0x53B, 0xCE},
8751 {0x15, 0x5E8, 0xC9},
8757 {0x15, 0x70D, 0x20},
8758 {0x15, 0x70E, 0x19},
8759 {0x15, 0x707, 0x00},
8760 {0x15, 0x539, 0xCE},
8761 {0x15, 0x546, 0xC9},
8762 {0x15, 0x70D, 0xB7},
8763 {0x15, 0x70E, 0x09},
8764 {0x15, 0x707, 0x10},
8765 {0x15, 0x70D, 0xAF},
8766 {0x15, 0x70E, 0x09},
8767 {0x15, 0x707, 0x01},
8768 {0x15, 0x707, 0x05},
8769 {0x15, 0x70D, 0x73},
8770 {0x15, 0x70E, 0x09},
8771 {0x15, 0x707, 0x14},
8772 {0x15, 0x6FF, 0xC4},
8776 static void ca0132_init_chip(struct hda_codec *codec) in ca0132_init_chip() argument
8778 struct ca0132_spec *spec = codec->spec; in ca0132_init_chip()
8783 mutex_init(&spec->chipio_mutex); in ca0132_init_chip()
8792 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_chip()
8793 chipio_write_no_mutex(codec, 0x18b0a4, 0x000000c2); in ca0132_init_chip()
8795 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_init_chip()
8796 AC_VERB_SET_CODEC_RESET, 0); in ca0132_init_chip()
8797 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_init_chip()
8798 AC_VERB_SET_CODEC_RESET, 0); in ca0132_init_chip()
8801 spec->cur_out_type = SPEAKER_OUT; in ca0132_init_chip()
8803 spec->cur_mic_type = DIGITAL_MIC; in ca0132_init_chip()
8805 spec->cur_mic_type = REAR_MIC; in ca0132_init_chip()
8807 spec->cur_mic_boost = 0; in ca0132_init_chip()
8809 for (i = 0; i < VNODES_COUNT; i++) { in ca0132_init_chip()
8810 spec->vnode_lvol[i] = 0x5a; in ca0132_init_chip()
8811 spec->vnode_rvol[i] = 0x5a; in ca0132_init_chip()
8812 spec->vnode_lswitch[i] = 0; in ca0132_init_chip()
8813 spec->vnode_rswitch[i] = 0; in ca0132_init_chip()
8820 for (i = 0; i < num_fx; i++) { in ca0132_init_chip()
8821 on = (unsigned int)ca0132_effects[i].reqs[0]; in ca0132_init_chip()
8822 spec->effects_switch[i] = on ? 1 : 0; in ca0132_init_chip()
8826 * ca0132 codecs. Also sets x-bass crossover frequency to 80hz. in ca0132_init_chip()
8830 spec->speaker_range_val[0] = 1; in ca0132_init_chip()
8831 spec->speaker_range_val[1] = 1; in ca0132_init_chip()
8833 spec->xbass_xover_freq = 8; in ca0132_init_chip()
8834 for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) in ca0132_init_chip()
8835 spec->fx_ctl_val[i] = effect_slider_defaults[i]; in ca0132_init_chip()
8837 spec->bass_redirect_xover_freq = 8; in ca0132_init_chip()
8840 spec->voicefx_val = 0; in ca0132_init_chip()
8841 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID] = 1; in ca0132_init_chip()
8842 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0; in ca0132_init_chip()
8845 * The ZxR doesn't have a front panel header, and it's line-in is on in ca0132_init_chip()
8847 * to make sure that spec->in_enum_val is set properly. in ca0132_init_chip()
8850 spec->in_enum_val = REAR_MIC; in ca0132_init_chip()
8853 ca0132_init_tuning_defaults(codec); in ca0132_init_chip()
8861 static void r3di_gpio_shutdown(struct hda_codec *codec) in r3di_gpio_shutdown() argument
8863 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00); in r3di_gpio_shutdown()
8869 static void sbz_region2_exit(struct hda_codec *codec) in sbz_region2_exit() argument
8871 struct ca0132_spec *spec = codec->spec; in sbz_region2_exit()
8874 for (i = 0; i < 4; i++) in sbz_region2_exit()
8875 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
8876 for (i = 0; i < 8; i++) in sbz_region2_exit()
8877 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
8879 ca0113_mmio_gpio_set(codec, 0, false); in sbz_region2_exit()
8880 ca0113_mmio_gpio_set(codec, 1, false); in sbz_region2_exit()
8881 ca0113_mmio_gpio_set(codec, 4, true); in sbz_region2_exit()
8882 ca0113_mmio_gpio_set(codec, 5, false); in sbz_region2_exit()
8883 ca0113_mmio_gpio_set(codec, 7, false); in sbz_region2_exit()
8886 static void sbz_set_pin_ctl_default(struct hda_codec *codec) in sbz_set_pin_ctl_default() argument
8888 static const hda_nid_t pins[] = {0x0B, 0x0C, 0x0E, 0x12, 0x13}; in sbz_set_pin_ctl_default()
8891 snd_hda_codec_write(codec, 0x11, 0, in sbz_set_pin_ctl_default()
8892 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40); in sbz_set_pin_ctl_default()
8894 for (i = 0; i < ARRAY_SIZE(pins); i++) in sbz_set_pin_ctl_default()
8895 snd_hda_codec_write(codec, pins[i], 0, in sbz_set_pin_ctl_default()
8896 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00); in sbz_set_pin_ctl_default()
8899 static void ca0132_clear_unsolicited(struct hda_codec *codec) in ca0132_clear_unsolicited() argument
8901 static const hda_nid_t pins[] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13}; in ca0132_clear_unsolicited()
8904 for (i = 0; i < ARRAY_SIZE(pins); i++) { in ca0132_clear_unsolicited()
8905 snd_hda_codec_write(codec, pins[i], 0, in ca0132_clear_unsolicited()
8906 AC_VERB_SET_UNSOLICITED_ENABLE, 0x00); in ca0132_clear_unsolicited()
8911 static void sbz_gpio_shutdown_commands(struct hda_codec *codec, int dir, in sbz_gpio_shutdown_commands() argument
8914 if (dir >= 0) in sbz_gpio_shutdown_commands()
8915 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8917 if (mask >= 0) in sbz_gpio_shutdown_commands()
8918 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8921 if (data >= 0) in sbz_gpio_shutdown_commands()
8922 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8926 static void zxr_dbpro_power_state_shutdown(struct hda_codec *codec) in zxr_dbpro_power_state_shutdown() argument
8928 static const hda_nid_t pins[] = {0x05, 0x0c, 0x09, 0x0e, 0x08, 0x11, 0x01}; in zxr_dbpro_power_state_shutdown()
8931 for (i = 0; i < ARRAY_SIZE(pins); i++) in zxr_dbpro_power_state_shutdown()
8932 snd_hda_codec_write(codec, pins[i], 0, in zxr_dbpro_power_state_shutdown()
8933 AC_VERB_SET_POWER_STATE, 0x03); in zxr_dbpro_power_state_shutdown()
8936 static void sbz_exit_chip(struct hda_codec *codec) in sbz_exit_chip() argument
8938 chipio_set_stream_control(codec, 0x03, 0); in sbz_exit_chip()
8939 chipio_set_stream_control(codec, 0x04, 0); in sbz_exit_chip()
8942 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1); in sbz_exit_chip()
8943 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05); in sbz_exit_chip()
8944 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01); in sbz_exit_chip()
8946 chipio_set_stream_control(codec, 0x14, 0); in sbz_exit_chip()
8947 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8949 chipio_set_conn_rate(codec, 0x41, SR_192_000); in sbz_exit_chip()
8950 chipio_set_conn_rate(codec, 0x91, SR_192_000); in sbz_exit_chip()
8952 chipio_write(codec, 0x18a020, 0x00000083); in sbz_exit_chip()
8954 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03); in sbz_exit_chip()
8955 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07); in sbz_exit_chip()
8956 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06); in sbz_exit_chip()
8958 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8960 chipio_set_control_param(codec, 0x0D, 0x24); in sbz_exit_chip()
8962 ca0132_clear_unsolicited(codec); in sbz_exit_chip()
8963 sbz_set_pin_ctl_default(codec); in sbz_exit_chip()
8965 snd_hda_codec_write(codec, 0x0B, 0, in sbz_exit_chip()
8966 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in sbz_exit_chip()
8968 sbz_region2_exit(codec); in sbz_exit_chip()
8971 static void r3d_exit_chip(struct hda_codec *codec) in r3d_exit_chip() argument
8973 ca0132_clear_unsolicited(codec); in r3d_exit_chip()
8974 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in r3d_exit_chip()
8975 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b); in r3d_exit_chip()
8978 static void ae5_exit_chip(struct hda_codec *codec) in ae5_exit_chip() argument
8980 chipio_set_stream_control(codec, 0x03, 0); in ae5_exit_chip()
8981 chipio_set_stream_control(codec, 0x04, 0); in ae5_exit_chip()
8983 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae5_exit_chip()
8984 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8985 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8986 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae5_exit_chip()
8987 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae5_exit_chip()
8988 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00); in ae5_exit_chip()
8989 ca0113_mmio_gpio_set(codec, 0, false); in ae5_exit_chip()
8990 ca0113_mmio_gpio_set(codec, 1, false); in ae5_exit_chip()
8992 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae5_exit_chip()
8993 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae5_exit_chip()
8995 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_exit_chip()
8997 chipio_set_stream_control(codec, 0x18, 0); in ae5_exit_chip()
8998 chipio_set_stream_control(codec, 0x0c, 0); in ae5_exit_chip()
9000 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83); in ae5_exit_chip()
9003 static void ae7_exit_chip(struct hda_codec *codec) in ae7_exit_chip() argument
9005 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
9006 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8); in ae7_exit_chip()
9007 chipio_set_stream_channels(codec, 0x21, 0); in ae7_exit_chip()
9008 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_exit_chip()
9009 chipio_set_control_param(codec, 0x20, 0x01); in ae7_exit_chip()
9011 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_exit_chip()
9013 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
9014 chipio_set_stream_control(codec, 0x0c, 0); in ae7_exit_chip()
9016 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_exit_chip()
9017 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83); in ae7_exit_chip()
9018 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_exit_chip()
9019 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_exit_chip()
9020 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00); in ae7_exit_chip()
9021 ca0113_mmio_gpio_set(codec, 0, false); in ae7_exit_chip()
9022 ca0113_mmio_gpio_set(codec, 1, false); in ae7_exit_chip()
9023 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae7_exit_chip()
9025 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae7_exit_chip()
9026 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae7_exit_chip()
9029 static void zxr_exit_chip(struct hda_codec *codec) in zxr_exit_chip() argument
9031 chipio_set_stream_control(codec, 0x03, 0); in zxr_exit_chip()
9032 chipio_set_stream_control(codec, 0x04, 0); in zxr_exit_chip()
9033 chipio_set_stream_control(codec, 0x14, 0); in zxr_exit_chip()
9034 chipio_set_stream_control(codec, 0x0C, 0); in zxr_exit_chip()
9036 chipio_set_conn_rate(codec, 0x41, SR_192_000); in zxr_exit_chip()
9037 chipio_set_conn_rate(codec, 0x91, SR_192_000); in zxr_exit_chip()
9039 chipio_write(codec, 0x18a020, 0x00000083); in zxr_exit_chip()
9041 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in zxr_exit_chip()
9042 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in zxr_exit_chip()
9044 ca0132_clear_unsolicited(codec); in zxr_exit_chip()
9045 sbz_set_pin_ctl_default(codec); in zxr_exit_chip()
9046 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00); in zxr_exit_chip()
9048 ca0113_mmio_gpio_set(codec, 5, false); in zxr_exit_chip()
9049 ca0113_mmio_gpio_set(codec, 2, false); in zxr_exit_chip()
9050 ca0113_mmio_gpio_set(codec, 3, false); in zxr_exit_chip()
9051 ca0113_mmio_gpio_set(codec, 0, false); in zxr_exit_chip()
9052 ca0113_mmio_gpio_set(codec, 4, true); in zxr_exit_chip()
9053 ca0113_mmio_gpio_set(codec, 0, true); in zxr_exit_chip()
9054 ca0113_mmio_gpio_set(codec, 5, true); in zxr_exit_chip()
9055 ca0113_mmio_gpio_set(codec, 2, false); in zxr_exit_chip()
9056 ca0113_mmio_gpio_set(codec, 3, false); in zxr_exit_chip()
9059 static void ca0132_exit_chip(struct hda_codec *codec) in ca0132_exit_chip() argument
9063 if (dspload_is_loaded(codec)) in ca0132_exit_chip()
9064 dsp_reset(codec); in ca0132_exit_chip()
9075 static void sbz_dsp_startup_check(struct hda_codec *codec) in sbz_dsp_startup_check() argument
9077 struct ca0132_spec *spec = codec->spec; in sbz_dsp_startup_check()
9079 unsigned int cur_address = 0x390; in sbz_dsp_startup_check()
9081 unsigned int failure = 0; in sbz_dsp_startup_check()
9084 if (spec->startup_check_entered) in sbz_dsp_startup_check()
9087 spec->startup_check_entered = true; in sbz_dsp_startup_check()
9089 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9090 chipio_read(codec, cur_address, &dsp_data_check[i]); in sbz_dsp_startup_check()
9091 cur_address += 0x4; in sbz_dsp_startup_check()
9093 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9094 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
9098 codec_dbg(codec, "Startup Check: %d ", failure); in sbz_dsp_startup_check()
9100 codec_info(codec, "DSP not initialized properly. Attempting to fix."); in sbz_dsp_startup_check()
9106 while (failure && (reload != 0)) { in sbz_dsp_startup_check()
9107 codec_info(codec, "Reloading... Tries left: %d", reload); in sbz_dsp_startup_check()
9108 sbz_exit_chip(codec); in sbz_dsp_startup_check()
9109 spec->dsp_state = DSP_DOWNLOAD_INIT; in sbz_dsp_startup_check()
9110 codec->patch_ops.init(codec); in sbz_dsp_startup_check()
9111 failure = 0; in sbz_dsp_startup_check()
9112 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9113 chipio_read(codec, cur_address, &dsp_data_check[i]); in sbz_dsp_startup_check()
9114 cur_address += 0x4; in sbz_dsp_startup_check()
9116 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9117 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
9120 reload--; in sbz_dsp_startup_check()
9124 codec_info(codec, "DSP fixed."); in sbz_dsp_startup_check()
9129 …codec_info(codec, "DSP failed to initialize properly. Either try a full shutdown or a suspend to c… in sbz_dsp_startup_check()
9133 * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
9138 * to 0 just incase a value has lingered from a boot into Windows.
9140 static void ca0132_alt_vol_setup(struct hda_codec *codec) in ca0132_alt_vol_setup() argument
9142 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9143 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9144 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9145 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9146 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9147 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9148 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9149 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9155 static void sbz_pre_dsp_setup(struct hda_codec *codec) in sbz_pre_dsp_setup() argument
9157 struct ca0132_spec *spec = codec->spec; in sbz_pre_dsp_setup()
9159 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9160 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9162 chipio_write(codec, 0x18b0a4, 0x000000c2); in sbz_pre_dsp_setup()
9164 snd_hda_codec_write(codec, 0x11, 0, in sbz_pre_dsp_setup()
9165 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in sbz_pre_dsp_setup()
9168 static void r3d_pre_dsp_setup(struct hda_codec *codec) in r3d_pre_dsp_setup() argument
9170 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3d_pre_dsp_setup()
9172 chipio_8051_write_exram(codec, 0x1c1e, 0x5b); in r3d_pre_dsp_setup()
9174 snd_hda_codec_write(codec, 0x11, 0, in r3d_pre_dsp_setup()
9175 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in r3d_pre_dsp_setup()
9178 static void r3di_pre_dsp_setup(struct hda_codec *codec) in r3di_pre_dsp_setup() argument
9180 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3di_pre_dsp_setup()
9182 chipio_8051_write_exram(codec, 0x1c1e, 0x5b); in r3di_pre_dsp_setup()
9183 chipio_8051_write_exram(codec, 0x1920, 0x00); in r3di_pre_dsp_setup()
9184 chipio_8051_write_exram(codec, 0x1921, 0x40); in r3di_pre_dsp_setup()
9186 snd_hda_codec_write(codec, 0x11, 0, in r3di_pre_dsp_setup()
9187 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04); in r3di_pre_dsp_setup()
9195 static void zxr_pre_dsp_setup(struct hda_codec *codec) in zxr_pre_dsp_setup() argument
9197 static const unsigned int addr[] = { 0x43, 0x40, 0x41, 0x42, 0x45 }; in zxr_pre_dsp_setup()
9198 static const unsigned int data[] = { 0x08, 0x0c, 0x0b, 0x07, 0x0d }; in zxr_pre_dsp_setup()
9201 chipio_write(codec, 0x189000, 0x0001f100); in zxr_pre_dsp_setup()
9203 chipio_write(codec, 0x18900c, 0x0001f100); in zxr_pre_dsp_setup()
9208 * 0xfa92 in exram. This function seems to have something to do with in zxr_pre_dsp_setup()
9212 chipio_8051_write_exram(codec, 0xfa92, 0x22); in zxr_pre_dsp_setup()
9214 chipio_8051_write_pll_pmu(codec, 0x51, 0x98); in zxr_pre_dsp_setup()
9216 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x82); in zxr_pre_dsp_setup()
9217 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 3); in zxr_pre_dsp_setup()
9219 chipio_write(codec, 0x18902c, 0x00000000); in zxr_pre_dsp_setup()
9221 chipio_write(codec, 0x18902c, 0x00000003); in zxr_pre_dsp_setup()
9224 for (i = 0; i < ARRAY_SIZE(addr); i++) in zxr_pre_dsp_setup()
9225 chipio_8051_write_pll_pmu(codec, addr[i], data[i]); in zxr_pre_dsp_setup()
9234 0x400, 0x408, 0x40c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c,
9235 0xc0c, 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04
9239 0x00000030, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9240 0x00000003, 0x000000c1, 0x000000f1, 0x00000001, 0x000000c7,
9241 0x000000c1, 0x00000080
9245 0x00000030, 0x00000000, 0x00000000, 0x00000003, 0x00000003,
9246 0x00000003, 0x00000001, 0x000000f1, 0x00000001, 0x000000c7,
9247 0x000000c1, 0x00000080
9251 0x400, 0x42c, 0x46c, 0x4ac, 0x4ec, 0x43c, 0x47c, 0x4bc, 0x4fc, 0x408,
9252 0x100, 0x410, 0x40c, 0x100, 0x100, 0x830, 0x86c, 0x800, 0x86c, 0x800,
9253 0x804, 0x20c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c, 0xc0c,
9254 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04, 0x01c
9258 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
9259 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001,
9260 0x00000600, 0x00000014, 0x00000001, 0x0000060f, 0x0000070f,
9261 0x00000aff, 0x00000000, 0x0000006b, 0x00000001, 0x0000006b,
9262 0x00000057, 0x00800000, 0x00880680, 0x00000080, 0x00000030,
9263 0x00000000, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9264 0x00000001, 0x000000f1, 0x00000001, 0x000000c7, 0x000000c1,
9265 0x00000080, 0x00880680
9268 static void ca0132_mmio_init_sbz(struct hda_codec *codec) in ca0132_mmio_init_sbz() argument
9270 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init_sbz()
9275 for (i = 0; i < 3; i++) in ca0132_mmio_init_sbz()
9276 writel(0x00000000, spec->mem_base + addr[i]); in ca0132_mmio_init_sbz()
9281 tmp[0] = 0x00880480; in ca0132_mmio_init_sbz()
9282 tmp[1] = 0x00000080; in ca0132_mmio_init_sbz()
9285 tmp[0] = 0x00820680; in ca0132_mmio_init_sbz()
9286 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9289 tmp[0] = 0x00880680; in ca0132_mmio_init_sbz()
9290 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9293 tmp[0] = 0x00000000; in ca0132_mmio_init_sbz()
9294 tmp[1] = 0x00000000; in ca0132_mmio_init_sbz()
9298 for (i = 0; i < 2; i++) in ca0132_mmio_init_sbz()
9299 writel(tmp[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9314 for (i = 0; i < count; i++) in ca0132_mmio_init_sbz()
9315 writel(data[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9318 static void ca0132_mmio_init_ae5(struct hda_codec *codec) in ca0132_mmio_init_ae5() argument
9320 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init_ae5()
9329 writel(0x00000680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9330 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9333 for (i = 0; i < count; i++) { in ca0132_mmio_init_ae5()
9335 * AE-7 shares all writes with the AE-5, except that it writes in ca0132_mmio_init_ae5()
9336 * a different value to 0x20c. in ca0132_mmio_init_ae5()
9339 writel(0x00800001, spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9343 writel(data[i], spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9347 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9350 static void ca0132_mmio_init(struct hda_codec *codec) in ca0132_mmio_init() argument
9352 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init()
9358 ca0132_mmio_init_sbz(codec); in ca0132_mmio_init()
9361 ca0132_mmio_init_ae5(codec); in ca0132_mmio_init()
9369 0x304, 0x304, 0x304, 0x304, 0x100, 0x304, 0x100, 0x304, 0x100, 0x304,
9370 0x100, 0x304, 0x86c, 0x800, 0x86c, 0x800, 0x804
9374 0x0f, 0x0e, 0x1f, 0x0c, 0x3f, 0x08, 0x7f, 0x00, 0xff, 0x00, 0x6b,
9375 0x01, 0x6b, 0x57
9380 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9383 static void ae5_register_set(struct hda_codec *codec) in ae5_register_set() argument
9385 struct ca0132_spec *spec = codec->spec; in ae5_register_set()
9393 chipio_8051_write_pll_pmu(codec, 0x41, 0xc8); in ae5_register_set()
9395 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_register_set()
9396 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae5_register_set()
9399 tmp[0] = 0x03; in ae5_register_set()
9400 tmp[1] = 0x03; in ae5_register_set()
9401 tmp[2] = 0x07; in ae5_register_set()
9403 tmp[0] = 0x0f; in ae5_register_set()
9404 tmp[1] = 0x0f; in ae5_register_set()
9405 tmp[2] = 0x0f; in ae5_register_set()
9408 for (i = cur_addr = 0; i < 3; i++, cur_addr++) in ae5_register_set()
9409 writeb(tmp[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9415 for (i = 0; cur_addr < 12; i++, cur_addr++) in ae5_register_set()
9416 writeb(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9419 writel(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9421 writel(0x00800001, spec->mem_base + 0x20c); in ae5_register_set()
9424 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9425 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_register_set()
9427 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_register_set()
9430 chipio_8051_write_direct(codec, 0x90, 0x00); in ae5_register_set()
9431 chipio_8051_write_direct(codec, 0x90, 0x10); in ae5_register_set()
9434 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9442 static void ca0132_alt_init(struct hda_codec *codec) in ca0132_alt_init() argument
9444 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init()
9446 ca0132_alt_vol_setup(codec); in ca0132_alt_init()
9450 codec_dbg(codec, "SBZ alt_init"); in ca0132_alt_init()
9451 ca0132_gpio_init(codec); in ca0132_alt_init()
9452 sbz_pre_dsp_setup(codec); in ca0132_alt_init()
9453 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9454 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9457 codec_dbg(codec, "R3DI alt_init"); in ca0132_alt_init()
9458 ca0132_gpio_init(codec); in ca0132_alt_init()
9459 ca0132_gpio_setup(codec); in ca0132_alt_init()
9460 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADING); in ca0132_alt_init()
9461 r3di_pre_dsp_setup(codec); in ca0132_alt_init()
9462 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9463 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4); in ca0132_alt_init()
9466 r3d_pre_dsp_setup(codec); in ca0132_alt_init()
9467 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9468 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9471 ca0132_gpio_init(codec); in ca0132_alt_init()
9472 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9473 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9474 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9475 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9476 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9479 ca0132_gpio_init(codec); in ca0132_alt_init()
9480 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9481 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9482 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9483 chipio_write(codec, 0x18b008, 0x000000f8); in ca0132_alt_init()
9484 chipio_write(codec, 0x18b008, 0x000000f0); in ca0132_alt_init()
9485 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9486 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9489 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9490 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9491 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9492 zxr_pre_dsp_setup(codec); in ca0132_alt_init()
9499 static int ca0132_init(struct hda_codec *codec) in ca0132_init() argument
9501 struct ca0132_spec *spec = codec->spec; in ca0132_init()
9502 struct auto_pin_cfg *cfg = &spec->autocfg; in ca0132_init()
9508 * there's only two reasons for it. One, the codec has awaken from a in ca0132_init()
9516 if (spec->dsp_state == DSP_DOWNLOADED) { in ca0132_init()
9517 dsp_loaded = dspload_is_loaded(codec); in ca0132_init()
9519 spec->dsp_reload = true; in ca0132_init()
9520 spec->dsp_state = DSP_DOWNLOAD_INIT; in ca0132_init()
9523 sbz_dsp_startup_check(codec); in ca0132_init()
9524 return 0; in ca0132_init()
9528 if (spec->dsp_state != DSP_DOWNLOAD_FAILED) in ca0132_init()
9529 spec->dsp_state = DSP_DOWNLOAD_INIT; in ca0132_init()
9530 spec->curr_chip_addx = INVALID_CHIP_ADDRESS; in ca0132_init()
9533 ca0132_mmio_init(codec); in ca0132_init()
9535 snd_hda_power_up_pm(codec); in ca0132_init()
9538 ae5_register_set(codec); in ca0132_init()
9540 ca0132_init_params(codec); in ca0132_init()
9541 ca0132_init_flags(codec); in ca0132_init()
9543 snd_hda_sequence_write(codec, spec->base_init_verbs); in ca0132_init()
9546 ca0132_alt_init(codec); in ca0132_init()
9548 ca0132_download_dsp(codec); in ca0132_init()
9550 ca0132_refresh_widget_caps(codec); in ca0132_init()
9555 r3d_setup_defaults(codec); in ca0132_init()
9559 sbz_setup_defaults(codec); in ca0132_init()
9562 ae5_setup_defaults(codec); in ca0132_init()
9565 ae7_setup_defaults(codec); in ca0132_init()
9568 ca0132_setup_defaults(codec); in ca0132_init()
9569 ca0132_init_analog_mic2(codec); in ca0132_init()
9570 ca0132_init_dmic(codec); in ca0132_init()
9574 for (i = 0; i < spec->num_outputs; i++) in ca0132_init()
9575 init_output(codec, spec->out_pins[i], spec->dacs[0]); in ca0132_init()
9577 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in ca0132_init()
9579 for (i = 0; i < spec->num_inputs; i++) in ca0132_init()
9580 init_input(codec, spec->input_pins[i], spec->adcs[i]); in ca0132_init()
9582 init_input(codec, cfg->dig_in_pin, spec->dig_in); in ca0132_init()
9585 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_init()
9586 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9587 VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); in ca0132_init()
9588 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9589 VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); in ca0132_init()
9593 ca0132_gpio_setup(codec); in ca0132_init()
9595 snd_hda_sequence_write(codec, spec->spec_init_verbs); in ca0132_init()
9597 ca0132_alt_select_out(codec); in ca0132_init()
9598 ca0132_alt_select_in(codec); in ca0132_init()
9600 ca0132_select_out(codec); in ca0132_init()
9601 ca0132_select_mic(codec); in ca0132_init()
9604 snd_hda_jack_report_sync(codec); in ca0132_init()
9610 if (spec->dsp_reload) { in ca0132_init()
9611 spec->dsp_reload = false; in ca0132_init()
9612 ca0132_pe_switch_set(codec); in ca0132_init()
9615 snd_hda_power_down_pm(codec); in ca0132_init()
9617 return 0; in ca0132_init()
9620 static int dbpro_init(struct hda_codec *codec) in dbpro_init() argument
9622 struct ca0132_spec *spec = codec->spec; in dbpro_init()
9623 struct auto_pin_cfg *cfg = &spec->autocfg; in dbpro_init()
9626 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in dbpro_init()
9627 init_input(codec, cfg->dig_in_pin, spec->dig_in); in dbpro_init()
9629 for (i = 0; i < spec->num_inputs; i++) in dbpro_init()
9630 init_input(codec, spec->input_pins[i], spec->adcs[i]); in dbpro_init()
9632 return 0; in dbpro_init()
9635 static void ca0132_free(struct hda_codec *codec) in ca0132_free() argument
9637 struct ca0132_spec *spec = codec->spec; in ca0132_free()
9639 cancel_delayed_work_sync(&spec->unsol_hp_work); in ca0132_free()
9640 snd_hda_power_up(codec); in ca0132_free()
9643 sbz_exit_chip(codec); in ca0132_free()
9646 zxr_exit_chip(codec); in ca0132_free()
9649 r3d_exit_chip(codec); in ca0132_free()
9652 ae5_exit_chip(codec); in ca0132_free()
9655 ae7_exit_chip(codec); in ca0132_free()
9658 r3di_gpio_shutdown(codec); in ca0132_free()
9664 snd_hda_sequence_write(codec, spec->base_exit_verbs); in ca0132_free()
9665 ca0132_exit_chip(codec); in ca0132_free()
9667 snd_hda_power_down(codec); in ca0132_free()
9669 if (spec->mem_base) in ca0132_free()
9670 pci_iounmap(codec->bus->pci, spec->mem_base); in ca0132_free()
9672 kfree(spec->spec_init_verbs); in ca0132_free()
9673 kfree(codec->spec); in ca0132_free()
9676 static void dbpro_free(struct hda_codec *codec) in dbpro_free() argument
9678 struct ca0132_spec *spec = codec->spec; in dbpro_free()
9680 zxr_dbpro_power_state_shutdown(codec); in dbpro_free()
9682 kfree(spec->spec_init_verbs); in dbpro_free()
9683 kfree(codec->spec); in dbpro_free()
9687 static int ca0132_suspend(struct hda_codec *codec) in ca0132_suspend() argument
9689 struct ca0132_spec *spec = codec->spec; in ca0132_suspend()
9691 cancel_delayed_work_sync(&spec->unsol_hp_work); in ca0132_suspend()
9692 return 0; in ca0132_suspend()
9714 static void ca0132_config(struct hda_codec *codec) in ca0132_config() argument
9716 struct ca0132_spec *spec = codec->spec; in ca0132_config()
9718 spec->dacs[0] = 0x2; in ca0132_config()
9719 spec->dacs[1] = 0x3; in ca0132_config()
9720 spec->dacs[2] = 0x4; in ca0132_config()
9722 spec->multiout.dac_nids = spec->dacs; in ca0132_config()
9723 spec->multiout.num_dacs = 3; in ca0132_config()
9726 spec->multiout.max_channels = 2; in ca0132_config()
9728 spec->multiout.max_channels = 6; in ca0132_config()
9732 codec_dbg(codec, "%s: QUIRK_ALIENWARE applied.\n", __func__); in ca0132_config()
9733 snd_hda_apply_pincfgs(codec, alienware_pincfgs); in ca0132_config()
9736 codec_dbg(codec, "%s: QUIRK_SBZ applied.\n", __func__); in ca0132_config()
9737 snd_hda_apply_pincfgs(codec, sbz_pincfgs); in ca0132_config()
9740 codec_dbg(codec, "%s: QUIRK_ZXR applied.\n", __func__); in ca0132_config()
9741 snd_hda_apply_pincfgs(codec, zxr_pincfgs); in ca0132_config()
9744 codec_dbg(codec, "%s: QUIRK_R3D applied.\n", __func__); in ca0132_config()
9745 snd_hda_apply_pincfgs(codec, r3d_pincfgs); in ca0132_config()
9748 codec_dbg(codec, "%s: QUIRK_R3DI applied.\n", __func__); in ca0132_config()
9749 snd_hda_apply_pincfgs(codec, r3di_pincfgs); in ca0132_config()
9752 codec_dbg(codec, "%s: QUIRK_AE5 applied.\n", __func__); in ca0132_config()
9753 snd_hda_apply_pincfgs(codec, ae5_pincfgs); in ca0132_config()
9756 codec_dbg(codec, "%s: QUIRK_AE7 applied.\n", __func__); in ca0132_config()
9757 snd_hda_apply_pincfgs(codec, ae7_pincfgs); in ca0132_config()
9765 spec->num_outputs = 2; in ca0132_config()
9766 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9767 spec->out_pins[1] = 0x0f; in ca0132_config()
9768 spec->shared_out_nid = 0x2; in ca0132_config()
9769 spec->unsol_tag_hp = 0x0f; in ca0132_config()
9771 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9772 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9773 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9775 spec->num_inputs = 3; in ca0132_config()
9776 spec->input_pins[0] = 0x12; in ca0132_config()
9777 spec->input_pins[1] = 0x11; in ca0132_config()
9778 spec->input_pins[2] = 0x13; in ca0132_config()
9779 spec->shared_mic_nid = 0x7; in ca0132_config()
9780 spec->unsol_tag_amic1 = 0x11; in ca0132_config()
9784 spec->num_outputs = 2; in ca0132_config()
9785 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9786 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9787 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9788 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9789 spec->shared_out_nid = 0x2; in ca0132_config()
9790 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9791 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9793 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9794 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9795 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9797 spec->num_inputs = 2; in ca0132_config()
9798 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9799 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9800 spec->shared_mic_nid = 0x7; in ca0132_config()
9801 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9804 spec->dig_out = 0x05; in ca0132_config()
9805 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9806 spec->dig_in = 0x09; in ca0132_config()
9809 spec->num_outputs = 2; in ca0132_config()
9810 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9811 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9812 spec->out_pins[2] = 0x10; /* Center/LFE */ in ca0132_config()
9813 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9814 spec->shared_out_nid = 0x2; in ca0132_config()
9815 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9816 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9818 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9819 spec->adcs[1] = 0x8; /* Not connected, no front mic */ in ca0132_config()
9820 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9822 spec->num_inputs = 2; in ca0132_config()
9823 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9824 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9825 spec->shared_mic_nid = 0x7; in ca0132_config()
9826 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9829 spec->adcs[0] = 0x8; /* ZxR DBPro Aux In */ in ca0132_config()
9831 spec->num_inputs = 1; in ca0132_config()
9832 spec->input_pins[0] = 0x11; /* RCA Line-in */ in ca0132_config()
9834 spec->dig_out = 0x05; in ca0132_config()
9835 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9837 spec->dig_in = 0x09; in ca0132_config()
9841 spec->num_outputs = 2; in ca0132_config()
9842 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9843 spec->out_pins[1] = 0x11; /* Rear headphone out */ in ca0132_config()
9844 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9845 spec->out_pins[3] = 0x0F; /* Rear surround */ in ca0132_config()
9846 spec->shared_out_nid = 0x2; in ca0132_config()
9847 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9848 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9850 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9851 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9852 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9854 spec->num_inputs = 2; in ca0132_config()
9855 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9856 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9857 spec->shared_mic_nid = 0x7; in ca0132_config()
9858 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9861 spec->dig_out = 0x05; in ca0132_config()
9862 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9865 spec->num_outputs = 2; in ca0132_config()
9866 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9867 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9868 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9869 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9870 spec->shared_out_nid = 0x2; in ca0132_config()
9871 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9872 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9874 spec->adcs[0] = 0x07; /* Rear Mic / Line-in */ in ca0132_config()
9875 spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */ in ca0132_config()
9876 spec->adcs[2] = 0x0a; /* what u hear */ in ca0132_config()
9878 spec->num_inputs = 2; in ca0132_config()
9879 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9880 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9881 spec->shared_mic_nid = 0x7; in ca0132_config()
9882 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9885 spec->dig_out = 0x05; in ca0132_config()
9886 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9889 spec->num_outputs = 2; in ca0132_config()
9890 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9891 spec->out_pins[1] = 0x10; /* headphone out */ in ca0132_config()
9892 spec->shared_out_nid = 0x2; in ca0132_config()
9893 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9895 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9896 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9897 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9899 spec->num_inputs = 3; in ca0132_config()
9900 spec->input_pins[0] = 0x12; in ca0132_config()
9901 spec->input_pins[1] = 0x11; in ca0132_config()
9902 spec->input_pins[2] = 0x13; in ca0132_config()
9903 spec->shared_mic_nid = 0x7; in ca0132_config()
9904 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9907 spec->dig_out = 0x05; in ca0132_config()
9908 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9909 spec->dig_in = 0x09; in ca0132_config()
9914 static int ca0132_prepare_verbs(struct hda_codec *codec) in ca0132_prepare_verbs() argument
9918 struct ca0132_spec *spec = codec->spec; in ca0132_prepare_verbs()
9920 spec->chip_init_verbs = ca0132_init_verbs0; in ca0132_prepare_verbs()
9926 spec->desktop_init_verbs = ca0132_init_verbs1; in ca0132_prepare_verbs()
9927 spec->spec_init_verbs = kcalloc(NUM_SPEC_VERBS, in ca0132_prepare_verbs()
9930 if (!spec->spec_init_verbs) in ca0132_prepare_verbs()
9931 return -ENOMEM; in ca0132_prepare_verbs()
9934 spec->spec_init_verbs[0].nid = 0x0b; in ca0132_prepare_verbs()
9935 spec->spec_init_verbs[0].param = 0x78D; in ca0132_prepare_verbs()
9936 spec->spec_init_verbs[0].verb = 0x00; in ca0132_prepare_verbs()
9940 spec->spec_init_verbs[2].nid = 0x0b; in ca0132_prepare_verbs()
9941 spec->spec_init_verbs[2].param = AC_VERB_SET_EAPD_BTLENABLE; in ca0132_prepare_verbs()
9942 spec->spec_init_verbs[2].verb = 0x02; in ca0132_prepare_verbs()
9944 spec->spec_init_verbs[3].nid = 0x10; in ca0132_prepare_verbs()
9945 spec->spec_init_verbs[3].param = 0x78D; in ca0132_prepare_verbs()
9946 spec->spec_init_verbs[3].verb = 0x02; in ca0132_prepare_verbs()
9948 spec->spec_init_verbs[4].nid = 0x10; in ca0132_prepare_verbs()
9949 spec->spec_init_verbs[4].param = AC_VERB_SET_EAPD_BTLENABLE; in ca0132_prepare_verbs()
9950 spec->spec_init_verbs[4].verb = 0x02; in ca0132_prepare_verbs()
9953 /* Terminator: spec->spec_init_verbs[NUM_SPEC_VERBS-1] */ in ca0132_prepare_verbs()
9954 return 0; in ca0132_prepare_verbs()
9959 * Sound Blaster Z cards. However, they have different HDA codec subsystem
9963 static void sbz_detect_quirk(struct hda_codec *codec) in sbz_detect_quirk() argument
9965 struct ca0132_spec *spec = codec->spec; in sbz_detect_quirk()
9967 switch (codec->core.subsystem_id) { in sbz_detect_quirk()
9968 case 0x11020033: in sbz_detect_quirk()
9969 spec->quirk = QUIRK_ZXR; in sbz_detect_quirk()
9971 case 0x1102003f: in sbz_detect_quirk()
9972 spec->quirk = QUIRK_ZXR_DBPRO; in sbz_detect_quirk()
9975 spec->quirk = QUIRK_SBZ; in sbz_detect_quirk()
9980 static int patch_ca0132(struct hda_codec *codec) in patch_ca0132() argument
9986 codec_dbg(codec, "patch_ca0132\n"); in patch_ca0132()
9990 return -ENOMEM; in patch_ca0132()
9991 codec->spec = spec; in patch_ca0132()
9992 spec->codec = codec; in patch_ca0132()
9994 /* Detect codec quirk */ in patch_ca0132()
9995 quirk = snd_pci_quirk_lookup(codec->bus->pci, ca0132_quirks); in patch_ca0132()
9997 spec->quirk = quirk->value; in patch_ca0132()
9999 spec->quirk = QUIRK_NONE; in patch_ca0132()
10001 sbz_detect_quirk(codec); in patch_ca0132()
10004 codec->patch_ops = dbpro_patch_ops; in patch_ca0132()
10006 codec->patch_ops = ca0132_patch_ops; in patch_ca0132()
10008 codec->pcm_format_first = 1; in patch_ca0132()
10009 codec->no_sticky_stream = 1; in patch_ca0132()
10012 spec->dsp_state = DSP_DOWNLOAD_INIT; in patch_ca0132()
10013 spec->num_mixers = 1; in patch_ca0132()
10018 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10019 snd_hda_codec_set_name(codec, "Sound Blaster Z"); in patch_ca0132()
10022 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10023 snd_hda_codec_set_name(codec, "Sound Blaster ZxR"); in patch_ca0132()
10028 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10029 snd_hda_codec_set_name(codec, "Recon3D"); in patch_ca0132()
10032 spec->mixers[0] = r3di_mixer; in patch_ca0132()
10033 snd_hda_codec_set_name(codec, "Recon3Di"); in patch_ca0132()
10036 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10037 snd_hda_codec_set_name(codec, "Sound BlasterX AE-5"); in patch_ca0132()
10040 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10041 snd_hda_codec_set_name(codec, "Sound Blaster AE-7"); in patch_ca0132()
10044 spec->mixers[0] = ca0132_mixer; in patch_ca0132()
10055 spec->use_alt_controls = true; in patch_ca0132()
10056 spec->use_alt_functions = true; in patch_ca0132()
10057 spec->use_pci_mmio = true; in patch_ca0132()
10060 spec->use_alt_controls = true; in patch_ca0132()
10061 spec->use_alt_functions = true; in patch_ca0132()
10062 spec->use_pci_mmio = false; in patch_ca0132()
10065 spec->use_alt_controls = false; in patch_ca0132()
10066 spec->use_alt_functions = false; in patch_ca0132()
10067 spec->use_pci_mmio = false; in patch_ca0132()
10072 if (spec->use_pci_mmio) { in patch_ca0132()
10073 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in patch_ca0132()
10074 if (spec->mem_base == NULL) { in patch_ca0132()
10075 codec_warn(codec, "pci_iomap failed! Setting quirk to QUIRK_NONE."); in patch_ca0132()
10076 spec->quirk = QUIRK_NONE; in patch_ca0132()
10081 spec->base_init_verbs = ca0132_base_init_verbs; in patch_ca0132()
10082 spec->base_exit_verbs = ca0132_base_exit_verbs; in patch_ca0132()
10084 INIT_DELAYED_WORK(&spec->unsol_hp_work, ca0132_unsol_hp_delayed); in patch_ca0132()
10086 ca0132_init_chip(codec); in patch_ca0132()
10088 ca0132_config(codec); in patch_ca0132()
10090 err = ca0132_prepare_verbs(codec); in patch_ca0132()
10091 if (err < 0) in patch_ca0132()
10094 err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL); in patch_ca0132()
10095 if (err < 0) in patch_ca0132()
10098 ca0132_setup_unsol(codec); in patch_ca0132()
10100 return 0; in patch_ca0132()
10103 ca0132_free(codec); in patch_ca0132()
10111 HDA_CODEC_ENTRY(0x11020011, "CA0132", patch_ca0132),
10117 MODULE_DESCRIPTION("Creative Sound Core3D codec");