Lines Matching +full:rom +full:- +full:val
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
15 #include "../ipc4-priv.h"
18 #include "hda-ipc.h"
19 #include "../sof-audio.h"
46 * set DONE bit - tell DSP we have received the reply msg from DSP, and processed it, in mtl_ipc_dsp_done()
63 if (sdev->dspless_mode_selected) in mtl_dsp_check_ipc_irq()
96 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in mtl_ipc_send_msg()
97 struct sof_ipc4_msg *msg_data = msg->msg_data; in mtl_ipc_send_msg()
100 hdev->delayed_ipc_tx_msg = msg; in mtl_ipc_send_msg()
104 hdev->delayed_ipc_tx_msg = NULL; in mtl_ipc_send_msg()
107 if (msg_data->data_size) in mtl_ipc_send_msg()
108 sof_mailbox_write(sdev, sdev->host_box.offset, msg_data->data_ptr, in mtl_ipc_send_msg()
109 msg_data->data_size); in mtl_ipc_send_msg()
112 msg_data->extension); in mtl_ipc_send_msg()
114 msg_data->primary | MTL_DSP_REG_HFIPCXIDR_BUSY); in mtl_ipc_send_msg()
123 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in mtl_enable_ipc_interrupts()
124 const struct sof_intel_dsp_desc *chip = hda->desc; in mtl_enable_ipc_interrupts()
126 if (sdev->dspless_mode_selected) in mtl_enable_ipc_interrupts()
130 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl, in mtl_enable_ipc_interrupts()
137 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in mtl_disable_ipc_interrupts()
138 const struct sof_intel_dsp_desc *chip = hda->desc; in mtl_disable_ipc_interrupts()
140 if (sdev->dspless_mode_selected) in mtl_disable_ipc_interrupts()
144 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl, in mtl_disable_ipc_interrupts()
152 u32 val; in mtl_enable_sdw_irq() local
155 if (sdev->dspless_mode_selected) in mtl_enable_sdw_irq()
161 val = mask; in mtl_enable_sdw_irq()
163 val = 0; in mtl_enable_sdw_irq()
165 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfSNDWIE, mask, val); in mtl_enable_sdw_irq()
169 (hipcie & mask) == val, in mtl_enable_sdw_irq()
172 dev_err(sdev->dev, "failed to set SoundWire IPC interrupt %s\n", in mtl_enable_sdw_irq()
182 u32 val; in mtl_enable_interrupts() local
185 if (sdev->dspless_mode_selected) in mtl_enable_interrupts()
194 val = mask; in mtl_enable_interrupts()
196 val = 0; in mtl_enable_interrupts()
198 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, hfintipptr, mask, val); in mtl_enable_interrupts()
202 (irqinten & mask) == val, in mtl_enable_interrupts()
205 dev_err(sdev->dev, "failed to %s Host IPC and/or SOUNDWIRE\n", in mtl_enable_interrupts()
213 val = mask; in mtl_enable_interrupts()
215 val = 0; in mtl_enable_interrupts()
217 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfHIPCIE, mask, val); in mtl_enable_interrupts()
221 (hipcie & mask) == val, in mtl_enable_interrupts()
224 dev_err(sdev->dev, "failed to set Host IPC interrupt %s\n", in mtl_enable_interrupts()
235 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in mtl_dsp_pre_fw_run()
255 dev_err(sdev->dev, "failed to enable DSP subsystem\n"); in mtl_dsp_pre_fw_run()
259 /* Power up gated-DSP-0 domain in order to access the DSP shim register block. */ in mtl_dsp_pre_fw_run()
272 dev_err(sdev->dev, "failed to power up gated DSP domain\n"); in mtl_dsp_pre_fw_run()
274 /* if SoundWire is used, make sure it is not power-gated */ in mtl_dsp_pre_fw_run()
275 if (hdev->info.handle && hdev->info.link_mask > 0) in mtl_dsp_pre_fw_run()
286 if (sdev->first_boot) { in mtl_dsp_post_fw_run()
287 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in mtl_dsp_post_fw_run()
291 dev_err(sdev->dev, "could not startup SoundWire links\n"); in mtl_dsp_post_fw_run()
297 hdev->imrboot_supported = true; in mtl_dsp_post_fw_run()
317 dev_err(sdev->dev, "ROM status: %#x, ROM error: %#x\n", fwsts, fwlec); in mtl_dsp_dump()
318 dev_err(sdev->dev, "ROM debug status: %#x, ROM debug error: %#x\n", romdbgsts, in mtl_dsp_dump()
321 dev_printk(level, sdev->dev, "ROM feature bit%s enabled\n", in mtl_dsp_dump()
327 int val; in mtl_dsp_primary_core_is_enabled() local
329 val = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP2CXCTL_PRIMARY_CORE); in mtl_dsp_primary_core_is_enabled()
330 if (val != U32_MAX && val & MTL_DSP2CXCTL_PRIMARY_CORE_CPA_MASK) in mtl_dsp_primary_core_is_enabled()
365 dev_err(sdev->dev, "%s: timeout on MTL_DSP2CXCTL_PRIMARY_CORE read\n", in mtl_dsp_core_power_up()
371 sdev->enabled_cores_mask = BIT(SOF_DSP_PRIMARY_CORE); in mtl_dsp_core_power_up()
372 sdev->dsp_core_ref_count[SOF_DSP_PRIMARY_CORE] = 1; in mtl_dsp_core_power_up()
398 dev_err(sdev->dev, "failed to power down primary core\n"); in mtl_dsp_core_power_down()
402 sdev->enabled_cores_mask = 0; in mtl_dsp_core_power_down()
403 sdev->dsp_core_ref_count[SOF_DSP_PRIMARY_CORE] = 0; in mtl_dsp_core_power_down()
416 dev_err(sdev->dev, "mtl dsp power down error, %d\n", ret); in mtl_power_down_dsp()
437 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in mtl_dsp_cl_init()
438 const struct sof_intel_dsp_desc *chip = hda->desc; in mtl_dsp_cl_init()
444 ipc_hdr = chip->ipc_req_mask | HDA_DSP_ROM_IPC_CONTROL; in mtl_dsp_cl_init()
446 ipc_hdr |= HDA_DSP_ROM_IPC_PURGE_FW | ((stream_tag - 1) << 9); in mtl_dsp_cl_init()
448 snd_sof_dsp_write(sdev, HDA_DSP_BAR, chip->ipc_req, ipc_hdr); in mtl_dsp_cl_init()
453 if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS) in mtl_dsp_cl_init()
454 dev_err(sdev->dev, "dsp core 0/1 power up failed\n"); in mtl_dsp_cl_init()
458 dev_dbg(sdev->dev, "Primary core power up successful\n"); in mtl_dsp_cl_init()
460 /* step 3: wait for IPC DONE bit from ROM */ in mtl_dsp_cl_init()
461 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, chip->ipc_ack, status, in mtl_dsp_cl_init()
462 ((status & chip->ipc_ack_mask) == chip->ipc_ack_mask), in mtl_dsp_cl_init()
465 if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS) in mtl_dsp_cl_init()
466 dev_err(sdev->dev, "timeout waiting for purge IPC done\n"); in mtl_dsp_cl_init()
471 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, chip->ipc_ack, chip->ipc_ack_mask, in mtl_dsp_cl_init()
472 chip->ipc_ack_mask); in mtl_dsp_cl_init()
477 if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS) in mtl_dsp_cl_init()
478 dev_err(sdev->dev, "%s: failed to enable interrupts\n", __func__); in mtl_dsp_cl_init()
485 * ACE workaround: don't wait for ROM INIT. in mtl_dsp_cl_init()
533 if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) { in mtl_ipc_irq_thread()
534 struct sof_ipc4_msg *data = sdev->ipc->msg.reply_data; in mtl_ipc_irq_thread()
536 data->primary = primary; in mtl_ipc_irq_thread()
537 data->extension = extension; in mtl_ipc_irq_thread()
539 spin_lock_irq(&sdev->ipc_lock); in mtl_ipc_irq_thread()
543 snd_sof_ipc_reply(sdev, data->primary); in mtl_ipc_irq_thread()
545 spin_unlock_irq(&sdev->ipc_lock); in mtl_ipc_irq_thread()
547 dev_dbg_ratelimited(sdev->dev, in mtl_ipc_irq_thread()
556 sdev->ipc->msg.rx_data = ¬ification_data; in mtl_ipc_irq_thread()
558 sdev->ipc->msg.rx_data = NULL; in mtl_ipc_irq_thread()
568 dev_dbg_ratelimited(sdev->dev, "nothing to do in IPC IRQ thread\n"); in mtl_ipc_irq_thread()
572 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in mtl_ipc_irq_thread()
574 if (hdev->delayed_ipc_tx_msg) in mtl_ipc_irq_thread()
575 mtl_ipc_send_msg(sdev, hdev->delayed_ipc_tx_msg); in mtl_ipc_irq_thread()
603 dev_err(sdev->dev, in mtl_ipc_dump()
619 struct hdac_stream *hstream = substream->runtime->private_data; in mtl_dsp_get_stream_hda_link_position()
622 llp_l = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, MTL_PPLCLLPL(hstream->index)); in mtl_dsp_get_stream_hda_link_position()
623 llp_u = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, MTL_PPLCLLPU(hstream->index)); in mtl_dsp_get_stream_hda_link_position()
629 const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm; in mtl_dsp_core_get()
634 if (pm_ops->set_core_state) in mtl_dsp_core_get()
635 return pm_ops->set_core_state(sdev, core, true); in mtl_dsp_core_get()
642 const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm; in mtl_dsp_core_put()
645 if (pm_ops->set_core_state) { in mtl_dsp_core_put()
646 ret = pm_ops->set_core_state(sdev, core, false); in mtl_dsp_core_put()
698 sdev->private = devm_kzalloc(sdev->dev, sizeof(struct sof_ipc4_fw_data), GFP_KERNEL); in sof_mtl_ops_init()
699 if (!sdev->private) in sof_mtl_ops_init()
700 return -ENOMEM; in sof_mtl_ops_init()
702 ipc4_data = sdev->private; in sof_mtl_ops_init()
703 ipc4_data->manifest_fw_hdr_offset = SOF_MAN4_FW_HDR_OFFSET; in sof_mtl_ops_init()
705 ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_2; in sof_mtl_ops_init()
708 ipc4_data->load_library = hda_dsp_ipc4_load_library; in sof_mtl_ops_init()