ELF(4@4 (444@@   q q00:0:)YYXx  @@Rtd00:0:Qtdttt p0 0 GNUfPn%eWn(3@Q9Ro_ cje ~ P$b$v$$+%&((( )%)3)?)*+k-HIIJK4p  >Dd ~Iz \ {E  1& 1+x-o @p  V(ո )mH 35  | J( & %i I ut EP  A?L FQ( $ o+x00 9 /F( D A  QF(  00 sF1( c  -"  3 ?]`  v/0 4% *ѹ C5, {@] : }F< / ) h%ӷ 5 ?( 3  % n& i4 >[(  ~m`  > Am< K1x E w:U K( C8 m;: %Ip  + _=( e] % |2I  #/  x1 ( 8 Lw( m( n  K)Q  8a t |h  ?' 'G ,Ѹ /0 ?u* M ] != =2 d Q-P 15( 2 < nyD 7 8] p . U   k I ) MA, )KzMQ* qE '͟ I \ m $1  QMa( \ ! 2 :$ ;@ 1h 6E D3$ n  !.x <] J)( :$/ M*  + #/  C)(   " ?Y +0p  Fy( 9) &Q8 F( \ N  #!  ;!( i>3( Ea( F( SI` ` 4) W<A FY( N* $p=  ?H ( (׷ C2 uJ{6 B` j F=( %u P, 6 <[(  % j' 'l (hhiC" E( 76y QH& l 6A # r"M > q., C( M  Ѵ .(  E<  7D <6 d = M4 Ba8 9 C ' " @@U( A , \ }!\ + 3  9 $1 u  b z*Q> _?d D  L&? _.M :  nA\ -H( -q0 .ed   1, ( E<d ., c1* 7Y :͸  % 0m0 .2m8 BY  R1D  VaA ! ;$ T>. LO( (ݸ I zY/-0 ! N  0G &ӱ  -= 3 w5 3  $ 1]( G( \Ka l k !t ( U Ź   %AD 'ɱ  ?GA( 1 L  i  ))D s9Ϸ aG( CJ7D R ` KI  A P3 ;> G( =M7* Q  K* @5 ?( `mP 2| 7q >t B ( b 5\ d 6} K]( M( '| E! 9i ~D( K5(  E[F $_ +E ~C E , 3  7 B : D( eT  K'iG, $( 2- =, Mm(  hL (  L( +Y 8p[@}(  " <( , 4  A-  D $==. )| q o#Y6%?< \5 \+xi2Uh  R 8u# 2  ,plC    ,ٸ I @ 8N=   #, >*x>34 H  Xe 5  1,Ѥ 8 R: x=$ , =( 4C( Q  {E *э u0ax =* <( >g( L* $a0h 8KzS ($/  : Ia < y " *չ $<$  Q;6 ;AM CT YJ, u-I g7I RBE( QL( L( mt ݱ  D >I @< C xa* 4: A #/@ PD &'-H| d*A u qD 3 5ݶ ;y( ! .0 u  K 5Q <( =N  ==Dd ;m"   01<   - %*۷ 2Q 7U `E( Jm4 L(  p uM >( @?-0 7L( D" =y( CW( )M( Q L 9Ƿ @< J6 Cx Kg.  '} J( 1 *P  >( kD( M( ]  *ɹ /I, L1( tH& L'( p %@-( yM( 91* L( % UD B - 1T 1( 31 uF ˷ - #0@ ;K" B /]0 U0l 4 9; . ME( G=` (w.  N.e 6 ^8   g  jIz U\   : IT Q\  V& &GX '     |F :. :B  w)D I V  !]- G)(  +͹ /, G( m , l&  n/ "j 8# ?( E( Gi( `!) 50a0 A$ H ( ]  H   1( E( DQ( #J/, t E ["! O%?  H+xBp  4- -) E(   m c @   EH h R2 ]6M 7u <ɼ( =  BL p  &)F2 =/0 /0 E( J?. qK( l| 5  e &FX .0 /0  #A0  , : b  -D "e0 * 7<  D& h I \ y $i_t %Y 9 ^y x3 5Y@ 0 p     >(   $ ax "q ,3 l< ?$ nBC$ # :  5P  q } -Yp M( t QE* % "/0 UIzDy(  00 S9= @DHQUX[]bgjt|bhNP1/|b$&|b B9 ֮oJK\˼ǹ (ӈa p-p(YNk\}B˒oRTwHt/_s@RTwjRRTwƱTrRTw&=#<[o.N-i;&=OQ $?yew|kH5FR:YO9Qvt&Hif: 7Sl oJ5G|(u(<2R< Cq'a$Pnr@Hxs B?'Uyx e6:ET]._a=0gTctr:࿧T 7F̅fΞsY^~eEZf#\Ԑ`ewf*ԕOmA:fe1RRh4:p]zf.-7PA:H'j5xhe_FUܺ VKTz*Ʉyc$"kg* R3 STwpu' STwtHHտniɳV< STwƟ..з:}STwIf5vzc}*2d~х'7ޫkIph/ r!5k8M)|('2UVK@kն&W3P@J(qU0sg}Ņ?^,ú#ߤZ|^$G$>ev!T`8YBuOii`9UCzAE&kz┅`!cGN( <{ PEZђ"JqGkV /g7Gބ_h,5rԀ!{EH`^nޘse2*j~QzSZXf<#-Pc,bX-\'R2jဍ KzfFLh34c0/*ΘQ,STwi #N[]To6ʺ p-STw8s: ]v'[.STw}Jpv> DZ}%7.STw31+3^}TN)}0m}C2.d@+ľ<$䂮}R!K4?ֽF:xtnvڷY5ŚǙ׶z^ 83.L>n}WT}w̃էW9֕ݡJƣXٮ uɡ絯 y 8`E.\j(u,`Z3^ʦnC"y@8rZ%g٠a4SȤRlDͳa4F\oGR2Aѓn/n6ȷs u";}dX:%c0@KXՀɳ,CטfǶJF3նW t B AEU8N?/TH@AlPf $GhKa 6`bM dNg:s`-'Pw^8OiQ8ԡq.e, o\ah(/1Z7Th:My&};TYG5|\ $U=_L4V|f frkb67off ;|&- F[>=4tyc"A6EVL@Z MDz#5 \S?eS8_++sv07&}O+fu /lAex]1(D(q4|UJ3<X/2;^8|%@X8SIk`j zF{pW0 * k -iw~R[M1Yg^gm[d <ge( V'_^q /Q3-,}GPT~V]Q2;BJC5yb i#]zjn,7uD2*9h ' KYEbQ4pWAt<|H,&y1\hnOJ`XP.0)BfH%;3->` svOat*9NW"aR{PT@cZ:$#ZGw=Ch_!>nx?vc"wF5!f&q)HmlKa.Gir?} dU~lM=Bdu)NjKC\:b!%Y ooLpmN__aeabi_unwind_cpp_pr0g_st0_d_dim_ctxhi_log_outosal_proc_printpanel_drv_0d_dim_proc_readpanel_drv_get0_d_dim_ctxpanel_drv_get_0d_dim_bl_levelpanel_drv_get_0d_dim_ctxpanel_drv_get_0d_dim_ctx_and_levelpanel_drv_get_0d_dim_enablepanel_drv_get_0d_dim_strength_levelpanel_drv_get_0d_dim_strength_rangepanel_drv_set_0d_dim_bl_levelpanel_drv_set_0d_dim_cfgpanel_drv_set_0d_dim_enablepanel_drv_set_0d_dim_initpanel_drv_set_0d_dim_strength_levelpanel_hal_set_dim_enablepanel_hal_set_dim_glb_norm_unitpanel_hal_set_dim_led_enablepanel_hal_set_dynamic_bl_gain_level__stack_chk_fail__stack_chk_guarddrv_panel_check_eight_align_numdrv_panel_check_even_align_numdrv_panel_check_four_align_numdrv_panel_k_thread_createg_pst_custom_funcg_pst_disp_funcg_pst_gpio_funcg_pst_i2c_funcg_pst_pdm_funcg_pst_pq_funchi_drv_mmz_alloc_and_maphi_drv_mmz_unmap_and_releasehi_drv_sys_get_chip_versionhi_drv_sys_get_time_stamp_msosal_exportfunc_getosal_kmallocosal_kthread_createosal_vfreeosal_vmallocpanel_drv_alloc_mmzpanel_drv_bubble_sortpanel_drv_custom_get_parse_param_modepanel_drv_custom_pull_gpiopanel_drv_custom_send_panel_i2cpanel_drv_custom_set_ldm_demo_modepanel_drv_custom_set_ldm_strength_levelpanel_drv_custom_set_panel_modepanel_drv_disp_register_funpanel_drv_free_mmzpanel_drv_get_chip_versionpanel_drv_get_diffpanel_drv_get_gpio_functionpanel_drv_get_gpio_output_volpanel_drv_get_panel_ctxpanel_drv_get_pq_export_functionpanel_drv_get_time_stamp_mspanel_drv_i2_c_readpanel_drv_i2_c_writepanel_drv_is_boolpanel_drv_is_buff_emptypanel_drv_kmalloc_mempanel_drv_pdm_get_default_bl_infopanel_drv_pdm_get_panel_advance_infopanel_drv_pdm_get_panel_base_infopanel_drv_pdm_get_panel_indexpanel_drv_pdm_get_tcon_indexpanel_drv_pdm_get_tcon_module_parampanel_drv_pdm_get_tcon_parampanel_drv_pq_get_dci_histrampanel_drv_pq_get_ldm_send_statepanel_drv_pq_set_backlight_infopanel_drv_pq_set_ldm_data_mappanel_drv_pq_set_ldm_data_oripanel_drv_set_dim_strength_levelpanel_drv_set_gpio_output_volpanel_drv_vfree_mempanel_drv_vmalloc_memconvert_data_str_to_decpanel_drv_bl_driver_proc_helppanel_drv_bl_driver_proc_readpanel_drv_get_bl_driver_file_datapanel_drv_get_cfg_step_ctrl_datapanel_drv_set_bl_driver_cfgpanel_drv_set_bl_driver_functionpanel_drv_set_bl_driver_gpio_statuspanel_drv_set_bl_driver_powerpanel_drv_set_bl_driver_send_datastrstrg_st_panel_ctxhi_drv_panel_de_inithi_drv_panel_get_backlight_levelhi_drv_panel_get_backlight_powerhi_drv_panel_get_bin_version_infohi_drv_panel_get_com_voltagehi_drv_panel_get_com_voltage_rangehi_drv_panel_get_combo_virtual_reghi_drv_panel_get_config_infohi_drv_panel_get_dim_strength_infohi_drv_panel_get_dim_strength_levelhi_drv_panel_get_drv_currenthi_drv_panel_get_drv_current_rangehi_drv_panel_get_dynamic_bl_enablehi_drv_panel_get_emphasishi_drv_panel_get_emphasis_rangehi_drv_panel_get_fix_out_ratehi_drv_panel_get_intf_attrhi_drv_panel_get_ldm_datahi_drv_panel_get_ldm_demo_modehi_drv_panel_get_ldm_enablehi_drv_panel_get_panel_attrhi_drv_panel_get_panel_ctxhi_drv_panel_get_panel_infohi_drv_panel_get_power_onhi_drv_panel_get_refresh_ratehi_drv_panel_get_spreadhi_drv_panel_get_spread_rangehi_drv_panel_get_status_infohi_drv_panel_get_tcon_powerhi_drv_panel_get_total_numhi_drv_panel_inithi_drv_panel_set_backlight_levelhi_drv_panel_set_backlight_powerhi_drv_panel_set_black_light_driverhi_drv_panel_set_com_voltagehi_drv_panel_set_combo_virtual_reghi_drv_panel_set_dim_enablehi_drv_panel_set_dim_strength_levelhi_drv_panel_set_drv_currenthi_drv_panel_set_dynamic_bl_enablehi_drv_panel_set_emphasishi_drv_panel_set_fix_out_ratehi_drv_panel_set_indexhi_drv_panel_set_intf_attrhi_drv_panel_set_intf_powerhi_drv_panel_set_ldm_demo_modehi_drv_panel_set_ldm_enablehi_drv_panel_set_ldm_partition_dimensionhi_drv_panel_set_panel_infohi_drv_panel_set_power_onhi_drv_panel_set_power_on_recoveryhi_drv_panel_set_refresh_ratehi_drv_panel_set_spreadhi_drv_panel_set_tcon_powerhi_drv_panel_suspendhi_drv_sys_set_policymemcpy_smemset_sosal_kthread_destroyosal_msleeppanel_drv_check_advance_gpio_infopanel_drv_check_advance_i2c_infopanel_drv_check_advance_infopanel_drv_check_lvds_phypanel_drv_check_panel_base_infopanel_drv_check_panel_combo_infopanel_drv_check_spreadpanel_drv_check_vbo_phypanel_drv_comphy_clk_cfgpanel_drv_comphy_digit_cfgpanel_drv_config_hard_warepanel_drv_get_image_infopanel_drv_get_link_mappanel_drv_get_panel_aspectpanel_drv_get_panel_bl_powerpanel_drv_get_panel_tcon_powerpanel_drv_get_power_onpanel_drv_get_power_on_recoverypanel_drv_get_pwm_dynamic_modepanel_drv_map_bl_infopanel_drv_parse_panel_imgpanel_drv_parse_tcon_binpanel_drv_parse_tcon_filepanel_drv_pwm_initpanel_drv_refresh_intf_attr_to_base_infopanel_drv_set_backlight_levelpanel_drv_set_chn_spreadpanel_drv_set_crg_cfgpanel_drv_set_intf_powerpanel_drv_set_link_mappanel_drv_set_lockn_highpanel_drv_set_lockn_sw_modepanel_drv_set_lvds_atrrpanel_drv_set_lvds_bit_modepanel_drv_set_lvds_cfgpanel_drv_set_lvds_formatpanel_drv_set_lvds_invertpanel_drv_set_lvds_link_modepanel_drv_set_lvds_sync_out_enablepanel_drv_set_panel_bl_powerpanel_drv_set_panel_powerpanel_drv_set_panel_tcon_powerpanel_drv_set_pwm_cfgpanel_drv_set_spreadpanel_drv_set_tcon_cfgpanel_drv_set_tcon_cfg_vir_regpanel_drv_set_vbo_atrrpanel_drv_set_vbo_byte_numpanel_drv_set_vbo_cfgpanel_drv_set_vbo_color_barpanel_drv_set_vbo_data_modepanel_drv_set_vbo_left_internal_swappanel_drv_set_vbo_pn_swappanel_drv_set_vbo_right_internal_swappanel_drv_set_vbo_test_modepanel_drv_set_vbo_test_mode_enablepanel_drv_tcon_peri_datapanel_drv_unmap_bl_levelpanel_drv_updata_lvds_ctxpanel_drv_updata_vbo_ctxpanel_drv_update_complete_lvds_atrrpanel_drv_update_complete_vbo_atrrpanel_drv_update_frm_rate_infopanel_drv_update_lvds_atrrpanel_drv_update_pwm_dutypanel_drv_update_pwm_dynamic_modepanel_drv_update_vbo_atrrpanel_hal_de_initpanel_hal_get_lvds_swappanel_hal_initpanel_hal_reset_combotx_clkpanel_hal_reset_spreadpanel_hal_set_disp_resetpanel_hal_set_left_internal_swappanel_hal_set_lockn_highpanel_hal_set_lockn_sw_modepanel_hal_set_lvds_bit_modepanel_hal_set_lvds_clk_divpanel_hal_set_lvds_formatpanel_hal_set_lvds_invertpanel_hal_set_lvds_link_modepanel_hal_set_lvds_swappanel_hal_set_lvds_sync_out_enablepanel_hal_set_mlvds_clk_divpanel_hal_set_p2p_clk_divpanel_hal_set_phy_com_voltagepanel_hal_set_phy_drv_currentpanel_hal_set_phy_pre_emphasispanel_hal_set_pwm_dutypanel_hal_set_pwm_dynamic_modepanel_hal_set_pwm_refreshpanel_hal_set_right_internal_swappanel_hal_set_spread_enablepanel_hal_set_spread_freqpanel_hal_set_spread_ratiopanel_hal_set_tcon_resetpanel_hal_set_vbo_byte_numpanel_hal_set_vbo_clk_divpanel_hal_set_vbo_color_barpanel_hal_set_vbo_data_modepanel_hal_set_vbo_pn_swappanel_hal_set_vbo_test_modepanel_hal_set_vbo_test_mode_enablepanel_hal_set_vdp_dhd_statuspanel_set_dim_lcd_enableprintfstrlenpanel_drv_ceds_phy_initpanel_drv_check_phy_pll_lockpanel_drv_chpi_phy_initpanel_drv_cmpi_phy_initpanel_drv_digit_get_config_valuepanel_drv_epi_phy_initpanel_drv_isp_phy_initpanel_drv_lvds_phy_initpanel_drv_mlvds_phy_initpanel_drv_set_lvds_phy_clkpanel_drv_set_mlvds_phy_clkpanel_drv_set_p2p_phy_clkpanel_drv_set_phy_resetpanel_drv_set_vbo_phy_clkpanel_drv_usit_phy_initpanel_drv_vbo_phy_initpanel_hal_check_phy_pll_lockpanel_hal_set_aphy_enablepanel_hal_set_aphy_over_samplepanel_hal_set_aphy_pllpanel_hal_set_current_control_signalpanel_hal_set_dphy_over_samplepanel_hal_set_mlvds_clkpanel_hal_set_phy_atoppanel_hal_set_phy_clk_cfgpanel_hal_set_phy_clk_modepanel_hal_set_phy_clock_portpanel_hal_set_phy_intf_typepanel_hal_set_phy_resetpanel_hal_set_phy_txpll_div_fb_parampanel_hal_set_phy_txpll_div_in_parampanel_hal_set_phy_txpll_icp_currentpanel_hal_set_pre_emp_control_signalpanel_hal_set_txpll_ssc_enblepanel_hal_set_txpll_testhi_drv_panel_check_panel_infohi_drv_panel_get_back_light_valuehi_drv_panel_get_pwm_attrhi_drv_panel_isr_mainhi_drv_panel_ldm_registhi_drv_panel_resume_cfghi_drv_panel_set3d_fs_signalhi_drv_panel_set_out_frm_ratehi_drv_panel_set_panel_modehi_drv_panel_set_pwm_attrhi_drv_panel_set_pwm_enableosal_kthread_should_stoposal_msleep_uninterruptiblepanel_drv_check_lvds_attrpanel_drv_check_vbo_attrpanel_drv_get_dbg_timming_infopanel_drv_get_misc_panel_timingpanel_drv_get_pwm_attrpanel_drv_isr_check_panel_timmingpanel_drv_ldm_register_funpanel_drv_print_misc_timmingpanel_drv_resume_cfg_k_threadpanel_drv_search_misc_resolutionpanel_drv_search_out_frmratepanel_drv_search_timming_typepanel_drv_set_pwm_attrpanel_drv_set_tcon_pol_frm_invpanel_hal_get_pwm_dutypanel_hal_get_pwm_freqpanel_hal_get_run_linepanel_hal_get_vbo_cdr_lock_statuspanel_hal_set3d_fs_signalpanel_hal_set_phy_lane_power_onpanel_hal_set_phy_port_sortpanel_hal_set_pwm_enablepanel_hal_set_pwm_freqpanel_hal_set_vbo_channel_selpanel_hal_set_vbo_lane_numpanel_hal_set_vbo_lane_swapg_st_misc_panel_timingpanel_drv_get_default_panel_infodrv_panel_de_initdrv_panel_export_fun_registerdrv_panel_initdrv_panel_lowpower_enterdrv_panel_lowpower_exitdrv_panel_resumedrv_panel_suspenddrv_panel_un_registerosal_dev_registerosal_dev_unregisterosal_exportfunc_registerosal_exportfunc_unregisterpanel_drv_mod_exitpanel_drv_mod_initpanel_drv_proc_addpanel_drv_proc_delpanel_file_closepanel_file_openpanel_hal_reset_spisnprintf_spanel_drv_get_lvds_powerpanel_drv_set_lvds_powerpanel_hal_get_lvds_enablepanel_hal_set_aphy_gpio_selpanel_hal_set_dphy_bit_widthpanel_hal_set_lvds_enablepanel_hal_set_phy_intf_power_modepanel_hal_set_phy_port_pn_swaphi_drv_sys_get_die_versionpanel_hal_set_lane_to_gpiopanel_hal_set_phy_pre_emphasis_onpanel_hal_sel_sd_lock_signalpanel_drv_custom_send_panel_i2c_timerpanel_drv_get_mlvds_powerpanel_drv_get_vbo_powerpanel_drv_pull_gpiopanel_drv_pull_gpio_timerpanel_drv_quick_sortpanel_drv_set_bl_d_river_power_timerpanel_drv_set_intf_power_timerpanel_drv_set_mlvds_powerpanel_drv_set_p2p_powerpanel_drv_set_panel_bl_power_timerpanel_drv_set_tcon_io_enablepanel_drv_set_vbo_powerpanel_hal_set_bl_pin_muxpanel_hal_set_lvds_clkpanel_hal_set_p2p_resetpanel_hal_set_tcon_patnumpanel_hal_set_tcon_sel_rupdpanel_hal_set_tcon_timing_enablepanel_hal_set_tconbist_enpanel_hal_set_vbo_clkg_panel_dateg_panel_mutexosal_printkosal_proc_addosal_proc_removeosal_sem_down_interruptibleosal_sem_initosal_sem_uposal_strtolpanel_drv_proc_readpanel_drv_pwm_proc_helppanel_drv_pwm_proc_readpanel_drv_pwm_proc_set_dutypanel_drv_pwm_proc_set_enablepanel_drv_pwm_proc_set_freqpanel_drv_pwm_proc_set_pwm_attrpanel_hal_set_tcon_force_sdlockpanel_hal_set_vbo_enableg_st_pwm_ctxpanel_drv_check_pwm_attrpanel_drv_get_pwm_ctxpanel_drv_is_pwm_initedpanel_drv_pwm_de_initpanel_hal_set_pwm_invpanel_hal_set_pwm_signal_to_open_drainpanel_hal_set_pwm_sync_whole_modepanel_hal_set_pwm_vsync_rise_countstrtolg_st2d_timing_reg_infog_st_combo_reg_infog_st_intf_reg_infog_st_pinmux_infopanel_drv_cmp_funpanel_drv_is_combo_virtual_regpanel_drv_is_panel_virtual_regpanel_drv_set_io_pin_muxpanel_drv_set_tcon_bist_cfgpanel_drv_swappanel_drv_tctrl_set_tcon_regpanel_drv_update_panel_vir_regpanel_hal_get_mlvds_enablepanel_hal_set_disp_dither_enpanel_hal_set_mlvds_enablepanel_hal_set_tcon_bist_cfgpanel_hal_set_tcon_io_enablepanel_hal_set_tcon_pol_frm_invpanel_hal_set_tcon_reg_def_val_initpanel_reg_write_maskpanel_set_tcon_timing_enablepanel_tcon_delay_to_blankstrncpy_spanel_hal_get_vbo_enablepanel_hal_set_bit0_at_highpanel_hal_set_vbo_partiton_selldm_spi_is_send_fifo_emptyldm_spi_is_send_fifo_fullldm_spi_is_send_fifo_full_errldm_spi_is_send_fifo_will_fullldm_spi_reg_de_initldm_spi_reg_initldm_spi_send_dataldm_spi_set_clk_def_highldm_spi_set_clk_freqldm_spi_set_cs2_data_delayldm_spi_set_cs2_data_enableldm_spi_set_cs_def_highldm_spi_set_cs_need_cfgldm_spi_set_cs_start_symbolldm_spi_set_data2_cs_delayldm_spi_set_data2_cs_enableldm_spi_set_data2_data_delayldm_spi_set_data2_data_delay_enableldm_spi_set_dma_req_enableldm_spi_set_do_def_highldm_spi_set_enableldm_spi_set_ignor_data_enableldm_spi_set_ignor_data_lengthldm_spi_set_phase_modifyldm_spi_set_phase_modify_enableldm_spi_set_signal_always_validldm_spi_set_signal_out_putldm_spi_set_valid_data_bit_widthldm_spi_set_valid_data_groupsldm_spi_set_vsync2_cs_delayldm_spi_set_vsync2_cs_delay_enableldm_spi_set_vsync_pollvds_get_lvds_enablelvds_get_lvds_swaplvds_set_lvds_bit_modelvds_set_lvds_enablelvds_set_lvds_formatlvds_set_lvds_invertlvds_set_lvds_lsb_modelvds_set_lvds_modelvds_set_lvds_swaplvds_set_lvds_sync_out_enablelvds_set_lvds_test_modepanel_check_phy_pll_lockpanel_dim_gradule_change_step_printpanel_get_mlvds_enablepanel_get_pwm_dutypanel_get_pwm_freqpanel_get_run_linepanel_hal_dim_gradule_change_step_printpanel_hal_get_dphy_ssc_cfgpanel_hal_get_vbo_pll_lock_statuspanel_hal_is_ldm_spi_send_fifo_emptypanel_hal_is_ldm_spi_send_fifo_fullpanel_hal_is_ldm_spi_send_fifo_full_errpanel_hal_is_ldm_spi_send_fifo_will_fullpanel_hal_ldm_spi_reg_de_initpanel_hal_ldm_spi_reg_initpanel_hal_select_mlvds_port_modepanel_hal_set2_d_dim_enablepanel_hal_set2_d_dim_gain_levelpanel_hal_set3d_phasepanel_hal_set_dim_demo_modepanel_hal_set_dim_demo_mode_enablepanel_hal_set_dim_gradule_change_steppanel_hal_set_dim_init_valuepanel_hal_set_dim_lcd_enablepanel_hal_set_dim_reg_uppanel_hal_set_disp_dither_modepanel_hal_set_dphy_ssc_loadpanel_hal_set_dphy_ssc_modepanel_hal_set_dphy_ssc_setpanel_hal_set_dphy_ssc_spanpanel_hal_set_dphy_ssc_steppanel_hal_set_ldm_dma_req_enablepanel_hal_set_ldm_spi_clk_def_highpanel_hal_set_ldm_spi_clk_freqpanel_hal_set_ldm_spi_cs2_data_delaypanel_hal_set_ldm_spi_cs2_data_enablepanel_hal_set_ldm_spi_cs_def_highpanel_hal_set_ldm_spi_cs_need_cfgpanel_hal_set_ldm_spi_cs_start_symbolpanel_hal_set_ldm_spi_data2_cs_delaypanel_hal_set_ldm_spi_data2_cs_enablepanel_hal_set_ldm_spi_data2_data_delaypanel_hal_set_ldm_spi_data2_data_delay_enablepanel_hal_set_ldm_spi_do_def_highpanel_hal_set_ldm_spi_enablepanel_hal_set_ldm_spi_ignor_data_enablepanel_hal_set_ldm_spi_ignor_data_lengthpanel_hal_set_ldm_spi_phase_modifypanel_hal_set_ldm_spi_phase_modify_enablepanel_hal_set_ldm_spi_sendpanel_hal_set_ldm_spi_signal_always_validpanel_hal_set_ldm_spi_signal_out_putpanel_hal_set_ldm_spi_valid_data_bit_widthpanel_hal_set_ldm_spi_valid_data_groupspanel_hal_set_ldm_spi_vsync2_cs_delaypanel_hal_set_ldm_spi_vsync2_cs_delay_enablepanel_hal_set_ldm_spi_vsync_polpanel_hal_set_lvds_lsb_modepanel_hal_set_lvds_test_modepanel_hal_set_mlvds1_port_pair_swappanel_hal_set_mlvds2_port_chn_swappanel_hal_set_mlvds2_port_pair_swappanel_hal_set_mlvds_data_invpanel_hal_set_mlvds_test_modepanel_hal_set_mlvds_test_mode_enablepanel_hal_set_phy_port_maskpanel_hal_set_tcon_init_donepanel_hal_set_txpll_ssc_divselpanel_reg_de_initpanel_reg_initpanel_reset_spreadpanel_sel_sd_lock_signalpanel_select_mlvds_port_modepanel_set2_d_dim_enablepanel_set2_d_dim_final_gainpanel_set_aphy_clk_modepanel_set_aphy_clock_portpanel_set_aphy_enablepanel_set_aphy_gpio_selpanel_set_aphy_intf_power_modepanel_set_aphy_lane_power_onpanel_set_aphy_over_samplepanel_set_aphy_pllpanel_set_aphy_pre_emp_power_onpanel_set_bl_pin_muxpanel_set_com_voltagepanel_set_current_control_signalpanel_set_dim_demo_modepanel_set_dim_demo_mode_enablepanel_set_dim_enablepanel_set_dim_final_gainpanel_set_dim_glb_norm_unitpanel_set_dim_gradule_change_steppanel_set_dim_init_valuepanel_set_dim_led_enablepanel_set_dim_reg_uppanel_set_disp_resetpanel_set_dphy_bit_widthpanel_set_dphy_clk_cfgpanel_set_dphy_intf_typepanel_set_dphy_over_samplepanel_set_dphy_port_maskpanel_set_dphy_port_pn_swappanel_set_dphy_port_sortpanel_set_dphy_resetpanel_set_dphy_ssc_loadpanel_set_dphy_ssc_modepanel_set_dphy_ssc_setpanel_set_dphy_ssc_spanpanel_set_dphy_ssc_steppanel_set_drv_currentpanel_set_lane_to_gpiopanel_set_lvds_clkpanel_set_mlvds1_port_pair_swappanel_set_mlvds2_port_chn_swappanel_set_mlvds2_port_pair_swappanel_set_mlvds_clkpanel_set_mlvds_data_invpanel_set_mlvds_enablepanel_set_mlvds_test_modepanel_set_mlvds_test_mode_enablepanel_set_p2p_resetpanel_set_phy_atoppanel_set_phy_txpll_div_fbpanel_set_phy_txpll_div_inpanel_set_phy_txpll_icp_currentpanel_set_pre_emp_control_signalpanel_set_pre_emphasispanel_set_pwm3d_sg_phasepanel_set_pwm_bl_modepanel_set_pwm_dutypanel_set_pwm_enablepanel_set_pwm_freqpanel_set_pwm_init_high_levelpanel_set_pwm_invpanel_set_pwm_lr_glass_signal_inpanel_set_pwm_refreshpanel_set_pwm_signal_to_open_drainpanel_set_pwm_sync_whole_modepanel_set_pwm_vsync_rise_countpanel_set_reg_uppanel_set_spread_enablepanel_set_spread_freqpanel_set_spread_ratiopanel_set_tcon_bist_cfgpanel_set_tcon_force_sdlockpanel_set_tcon_init_donepanel_set_tcon_io_enablepanel_set_tcon_patnumpanel_set_tcon_pol_frm_invpanel_set_tcon_reg_def_val_initpanel_set_tcon_resetpanel_set_tcon_sel_rupdpanel_set_tconbist_enpanel_set_txpll_ssc_divselpanel_set_txpll_ssc_enblepanel_set_txpll_testpanel_set_vbo_dphy_selpanel_set_vdp_dhd_statusvbo_get_cdr_lock_statusvbo_get_enablevbo_set_byte_numvbo_set_channel_selvbo_set_color_barvbo_set_data_modevbo_set_enablevbo_set_lane_numvbo_set_lane_swapvbo_set_left_internal_swapvbo_set_lockn_highvbo_set_lockn_sw_modevbo_set_pn_swapvbo_set_right_internal_swapvbo_set_test_modevbo_set_test_mode_enablevbo_set_vbo_msb_modevbo_set_vbo_partiton_selvdp_tcon_dither_set_dither_data_invdp_tcon_dither_set_dither_data_outvdp_tcon_dither_set_dither_domain_modevdp_tcon_dither_set_dither_envdp_tcon_dither_set_dither_modevdp_tcon_dither_set_dither_roundvdp_tcon_dither_set_dither_round_unlimvdp_tcon_dither_set_dither_sed_u0vdp_tcon_dither_set_dither_sed_u1vdp_tcon_dither_set_dither_sed_u2vdp_tcon_dither_set_dither_sed_u3vdp_tcon_dither_set_dither_sed_v0vdp_tcon_dither_set_dither_sed_v1vdp_tcon_dither_set_dither_sed_v2vdp_tcon_dither_set_dither_sed_v3vdp_tcon_dither_set_dither_sed_w0vdp_tcon_dither_set_dither_sed_w1vdp_tcon_dither_set_dither_sed_w2vdp_tcon_dither_set_dither_sed_w3vdp_tcon_dither_set_dither_sed_y0vdp_tcon_dither_set_dither_sed_y1vdp_tcon_dither_set_dither_sed_y2vdp_tcon_dither_set_dither_sed_y3vdp_tcon_dither_set_dither_tap_modevdp_tcon_dither_set_dither_thr_maxvdp_tcon_dither_set_dither_thr_minosal_udelaypanel_combotx_regpanel_get_dphy_ssc_setpanel_get_dphy_ssc_spanpanel_reg_readpanel_reg_writepanel_select_high_power_modepanel_select_low_power_modeg_pst_panel_combo_tx_regg_pst_panel_tcon_regg_pst_vdp_panel_regg_pu32_gpio_regg_pu32_other_regosal_ioremap_nocacheosal_iounmappanel_other_regpanel_tcon_regpanel_tcon_reg_cfg_checkvdp_panel_regpanel_set_dim_hor_scl_ratiopanel_set_dim_lcd_comp0dk_valuepanel_set_dim_led_numpanel_set_dim_seg_norm_unitpanel_set_dim_segment_sizepanel_set_dim_state_sizepanel_set_dim_ver_scl_ratiolvds_set_lvds_eve_odd_fixedlvds_set_lvds_rgb_swapg_pst_reg_crgg_pst_reg_peripanel_set3d_sg_modeg_p_spi_cs_regg_pst_com_spi_regg_pst_ldm_spi_regspi_reg_addr_ioremappanel_set_tcon_bar_widthpanel_set_tcon_bist_coefpanel_set_tcon_bist_gy0panel_set_tcon_bist_gy1panel_set_tcon_bist_hapanel_set_tcon_bist_htpanel_set_tcon_bist_pre_vstpanel_set_tcon_bist_v_gy0panel_set_tcon_bist_v_gy1panel_set_tcon_bist_vapanel_set_tcon_bist_vstpanel_set_tcon_bist_vtpanel_set_tcon_ckb_widthpanel_set_tcon_gray_max_valuepanel_set_tcon_gray_valuepanel_set_tcon_h_less1024vbo_set_lane0_swapvbo_set_lane10_swapvbo_set_lane11_swapvbo_set_lane12_swapvbo_set_lane13_swapvbo_set_lane14_swapvbo_set_lane15_swapvbo_set_lane1_swapvbo_set_lane2_swapvbo_set_lane3_swapvbo_set_lane4_swapvbo_set_lane5_swapvbo_set_lane6_swapvbo_set_lane7_swapvbo_set_lane8_swapvbo_set_lane9_swapvbo_set_lr_swaplibsec_shared.z.solibhi_soc.z.solibhi_msp.solibdrvsys.z.solibc.solibpanel.z.so0:4:8:<:@:D:H:X:\:`:d:h:l:p:t:x:|:::::::::::::::::::::::::::::::::;;; ;;;;; ;$;(;,;0;4;8;<;@;D;H;L;P;T;X;\;`;d;h;l;p;t;x;|;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;<<< <<<<< <$<(<,<0<4<8<<<@<D<H<L<P<T<X<\<`<d<h<l<p<t<x<|<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<=== ===== =$=(=,=0=4=8=<=@=D=H=L=P=T=X=\=`=d=h=l=p=t=x=|=================================>>> >>>>> >$>(>,>0>4>8><>@>D>H>L>P>T>X>\>`>d>h>l>p>t>x>|>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>??? ????? ?$?(?,?0?4?8?>l>D??AC,C CpD (JUhVV(d*`** *+@+ `+p+ ,z, , - .-- -0385 V555"68A$C-(C],CB0C~4C@8CDDvDDDDDHDDLDDDDDD5D9DDDDDE EE ElEE`EE E@$Ew(E,E 0E44Ee8EEE$E#E E!EEE%EREEEFEEELEEEMEEyEFtFF0 FFFFF F@$F:(FN,F0FE4FZ8Fvbo_current(hi_u32)intf_attr_p->vbo_currentpanel_drv_check_currentfun_call_cntcdr_unlk_cntinstantpanel_drv_check_lvds_attr_lvds_fmtpanel_drv_pwm_init0d_dim_inithi_drv_panel_initpanel_hal_initpanel_reg_initldm_spi_reg_initpanel_drv_proc_set_dbg_timming_re_initpanel_drv_pwm_de_inithi_drv_panel_de_initpanel_reg_de_initldm_spi_reg_de_initpanel_drv_mod_initpfn_gpio_dir_set_bitpfn_gpio_write_bitpfn_gpio_read_bit8_bit16_bit12_bit10_bit8bit10bitpanel_drv_proc_set_dbg_timming_heightother_hthi_drv_panel_get_panel_ctx_and_offsetpanel_drv_check_panel_rectpanel_drv_get_panel_aspectcdr_statpanel_drv_proc_set_lvds_data_formatpanel_drv_pmoc_func_processpanel_drv_get_time_stamp_msdrv_panel_ioctl_set_emphasispanel_drv_proc_set_emphasisdrv_panel_ioctl_get_emphasishi_drv_panel_get_emphasis(hi_u32)vbo_attr_p->vbo_emphasis(hi_u32)intf_attr_p->vbo_emphasispanel_drv_check_pre_emphasismemcpy_s%sfourpanel_drv_check_lvds_attrpanel_drv_check_vbo_attrpanel_drv_set_pwm_attrhi_drv_panel_set_pwm_attrpanel_drv_pwm_proc_set_pwm_attrpanel_drv_get_pwm_attrhi_drv_panel_get_pwm_attrpanel_drv_check_pwm_attrdrv_panel_ioctl_get_panel_attrhi_drv_panel_get_panel_attrdrv_panel_ioctl_set_intf_attrhi_drv_panel_set_intf_attrdrv_panel_ioctl_get_intf_attrhi_drv_panel_get_intf_attrpanel_drv_check_intf_attrstr6_pair3_pair2_pair1_pairdrv_panel_ioctl_set_backlight_powerhi_drv_panel_set_backlight_powerpanel_drv_proc_set_backlight_powerdrv_panel_ioctl_get_backlight_powerhi_drv_panel_get_backlight_powerpanel_drv_set_mlvds_powerpanel_drv_get_mlvds_powerhi_drv_panel_set_tcon_powerpanel_drv_proc_set_tcon_powerhi_drv_panel_get_tcon_powerpanel_drv_set_panel_tcon_powerpanel_drv_get_panel_tcon_powerpanel_drv_set_panel_powerpanel_drv_proc_set_panel_powerpanel_drv_set_panel_bl_powerpanel_drv_get_panel_bl_powerpanel_drv_set_intf_powerhi_drv_panel_set_intf_powerpanel_drv_proc_set_intf_powerdrv_panel_ioctl_set_black_light_driverhi_drv_panel_set_black_light_driverdrv_panel_export_fun_registerpanel_drv_set_bl_d_river_power_timerpanel_drv_set_panel_bl_power_timerpanel_drv_set_intf_power_timerpanel_drv_custom_send_panel_i2c_timer(hi_u32)base_info->support_othersup_otheruhd_otherfhd_otherColorbarpanel_drv_proc_set_vbo_color_barpanel_drv_pwm_set_freqpanel_drv_pwm_proc_set_freqother_freqreal_sp_freqpanel_set_pwm_freqpanel_get_pwm_freqldm_spi_set_clk_freqpanel_drv_check_dimming_freqpanel_drv_check_lvds_phy_spread_freqpanel_hal_set_spread_freqpanel_drv_check_lvds_attr_spread_freq(hi_u32)vbo_attr_p->vbo_spread_freq(hi_u32)intf_attr_p->vbo_spread_freqpanel_drv_proc_set_spead_freqpanel_drv_proc_set_real_spead_freqpanel_drv_proc_set_mapping_spead_freqpanel_drv_check_ssc_freq60_freq50_freqtim_chg_stpother_vfpother_hfppanel_drv_proc_set_dbg_timming_vsync_fppanel_drv_proc_set_dbg_timming_hsync_fpvsync_bphsync_bppanel_drv_swaplr_swappanel_drv_proc_set_phy_port_pn_swapl_swappanel_drv_proc_set_lvds_link_mappanel_drv_pq_set_ldm_data_maparray_ptwopanel_drv_proc_set_dbg_hor_timming_autopanel_drv_proc_set_dbg_ver_timming_autosp_ratiopanel_drv_check_lvds_phy_spread_ratiopanel_drv_check_lvds_attr_spread_ratiovbo_attr_p->vbo_spread_ratiointf_attr_p->vbo_spread_ratiopanel_drv_proc_set_spead_ratiopanel_drv_check_ssc_ratiopanel_set_lane_to_gpiopanel_drv_custom_pull_gpiopanel_drv_pq_set_backlight_infodrv_panel_ioctl_get_status_infohi_drv_panel_get_status_infopanel_drv_check_disp_infopanel_drv_check_advance_gpio_infopanel_drv_check_panel_combo_infodrv_panel_ioctl_get_bin_version_infohi_drv_panel_get_bin_version_infopanel_drv_get_default_panel_infodrv_panel_ioctl_set_panel_infohi_drv_panel_set_panel_infodrv_panel_ioctl_get_panel_infohi_drv_panel_get_panel_infohi_drv_panel_check_panel_infopanel_drv_pdm_get_default_bl_infopanel_drv_check_de_bl_infolink_infodrv_panel_ioctl_get_dim_strength_infohi_drv_panel_get_dim_strength_infopanel_drv_update_panel_vir_reg_base_timing_infodrv_panel_ioctl_get_config_infohi_drv_panel_get_config_infopanel_drv_updata_panel_cfg_infopanel_drv_refresh_cfg_infopanel_drv_update_frm_rate_infopanel_drv_pdm_get_panel_base_infopanel_drv_check_panel_base_infopanel_drv_get_image_infopanel_drv_pdm_get_panel_advance_infopanel_drv_check_advance_infopanel_drv_check_advance_i2c_infopanel_drv_parse_combopanel_drv_disp_register_funcmp_funswap_funpanel_drv_search_misc_resolutionpanel_drv_decide_misc_resolutionpanel_drv_get_pq_export_functionpanel_drv_get_gpio_functionpanel_drv_get_chip_versiondrv_panel_ioctl_set_ldm_partition_dimensiontcon_pow_ondrv_panel_ioctl_set_power_onhi_drv_panel_set_power_onpanel_drv_get_power_ondrv_panel_ioctl_get_power_onhi_drv_panel_get_power_onbl_minpanel_drv_parse_tcon_binhi_drv_panel_isr_mainpanel_drv_check_timming_alignHorizontal gradient gray of GreenVertical gradient gray of Greenpanel_drv_check_inv_en0d_dim_enspread_enpanel_drv_check_ssc_entot_numdrv_panel_ioctl_get_total_numhi_drv_panel_get_total_numpanel_drv_proc_set_vbo_byte_num(hi_u32)vbo_attr_p->vbo_byte_numpanel_drv_kmalloc_mempanel_drv_pq_get_dci_histrampanel_drv_pdm_get_tcon_parampanel_drv_pdm_get_tcon_module_parampanel_drv_set_gpio_output_volpanel_drv_get_gpio_output_volcom_voldolby_levelpanel_drv_set_backlight_leveldrv_panel_ioctl_set_backlight_levelhi_drv_panel_set_backlight_levelpanel_drv_proc_set_backlight_leveldrv_panel_ioctl_get_backlight_levelhi_drv_panel_get_backlight_levelpanel_drv_get_0d_dim_bl_level0d_bl_levelpanel_drv_set_dim_strength_leveldrv_panel_ioctl_set_dim_strength_levelhi_drv_panel_set_dim_strength_leveldrv_panel_ioctl_get_dim_strength_levelhi_drv_panel_get_dim_strength_levelpanel_drv_set_0d_dim_strength_levelpanel_drv_get_0d_dim_strength_levelpanel_drv_custom_set_ldm_strength_levelpanel_drv_get_0d_dim_ctx_and_level(hi_u32)spi_selhi_panelpanel_drv_parse_panelv_gradualclk_gradualh_gradualpanel_drv_proc_set_dbg_timming_vtotalpanel_drv_proc_set_dbg_timming_htotalhi_drv_panel_set3d_fs_signalpanel_hal_set_current_control_signalpanel_hal_set_pre_emp_control_signalpanel_drv_is_timming_legal8_link16_link4_link2_link1_linkpanel_tcon_delay_to_blankpanel_drv_set_lvds_phy_clkpanel_drv_set_vbo_phy_clkother_clkpanel_drv_proc_set_dbg_timming_clk60_clk50_clkunlockpanel_drv_proc_set_tcon_force_sdlockpanel_drv_check_phy_pll_lockpanel_check_phy_pll_lockpanel_tcon_reg_cfg_checkWhite edge with blackBlackpanel_drv_proc_set_misc_fhd4_kpanel_drv_proc_set_misc4_kpanel_drv_pq_set_ldm_data_oripanel_drv_check_name_lengthpanel_drv_proc_set_lvds_bitwidthpanel_drv_proc_set_vbo_bit_width(hi_u32)base_info->panel_bit_widthpanel_drv_check_bit_widthres_widthbase_info->panel_widthpanel_drv_proc_set_dbg_timming_widthpanel_drv_proc_set_dbg_timming_vsync_widthpanel_drv_proc_set_dbg_timming_hsync_widthisr_finishres_highbit0_at_hpanel_drv_get_display_timmingpanel_drv_3d_scene_adjust_timmingpanel_drv_isr_check_panel_timmingpanel_drv_check_timmingpanel_drv_print_misc_timmingpanel_drv_get_misc_panel_timingpanel_drv_parse2d_timingpanel_drv_parse_panel_imghw_configpanel_drv_set_pwm_cfgpanel_drv_set_0d_dim_cfgpanel_drv_set_crg_cfgpanel_drv_set_intf_cfghi_drv_panel_resume_cfgpanel_hal_get_dphy_ssc_cfgdrv_panel_ioctl_set_combo_virtual_reghi_drv_panel_set_combo_virtual_regdrv_panel_ioctl_get_combo_virtual_reghi_drv_panel_get_combo_virtual_regvsyn_neghsyn_negde_negpanel_drv_proc_set_vbo_lockn_dbgpanel_drv_check_signal_flagoffOffbl_defmodule_sizedata_sizebin_header.sizepwm_postivehi_drv_panel_get_back_light_valueHorizontal gradient gray of BlueVertical gradient gray of Blue5_byte4_byte3_bytepanel_drv_i2_c_writeHorizontal gradient gray of WhiteVertical gradient gray of Whitepanel_drv_pq_get_ldm_send_statepanel_drv_search_out_frmratepanel_drv_check_support_other_frameratepanel_drv_proc_set_fix_ratemax_ratedrv_panel_ioctl_set_fix_out_ratehi_drv_panel_set_fix_out_ratedrv_panel_ioctl_get_fix_out_ratehi_drv_panel_get_fix_out_ratehi_drv_panel_set_out_frm_ratepanel_drv_get_fix_scene_out_frm_ratepanel_drv_get_panel_def_frm_ratedrv_panel_ioctl_set_refresh_ratehi_drv_panel_set_refresh_ratepanel_drv_proc_set_refresh_ratedrv_panel_ioctl_get_refresh_ratehi_drv_panel_get_refresh_ratepanel_drv_check_default_frame_rate(hi_u32)base_info->default_frame_ratepanel_drv_check_frame_ratepanel_drv_decide_frame_ratedrv_panel_k_thread_createpanel_drv_proc_set_dbg_timming_usevsync_raisepanel_drv_config_hard_warefix_typediv_typeres_type(hi_u32)base_info->panel_flip_typepanel_drv_check_flip_typepanel_drv_proc_set_division_typepanel_drv_check_division_type(hi_u32)base_info->division_typepwm_typepanel_drv_check_panel_link_type(hi_u32)base_info->panel_link_typepanel_drv_decide_misc_link_typepanel_drv_search_timming_typepanel_drv_decide_misc_timming_typeintf_type(hi_u32)base_info->panel_fix_rate_typepanel_drv_check_fix_rate_typepanel_drv_check_timming_change_type(hi_u32)base_info->disp_3d_typepanel_drv_check_3d_typeone_oenonepanel_resumepanel_namepanel_drv_parse_tcon_filepanel_drv_proc_set_lvds_sync_out_enabletst_enablepanel_drv_pwm_set_enablepanel_drv_pwm_proc_set_enablepanel_drv_set_tcon_io_enablehi_drv_panel_set_pwm_enablehi_drv_panel_set_dim_enablepanel_drv_proc_set_dim_enablepanel_drv_set_0d_dim_enablepanel_drv_get_0d_dim_enabledrv_panel_ioctl_set_ldm_enabledrv_panel_ioctl_get_ldm_enablehi_drv_panel_get_ldm_enabledrv_panel_ioctl_set_dynamic_bl_enablehi_drv_panel_set_dynamic_bl_enabledrv_panel_ioctl_get_dynamic_bl_enablehi_drv_panel_get_dynamic_bl_enablepanel_drv_proc_set_dbg_timming_enablepanel_drv_check_lvds_phy_intf_enablepanel_drv_i2c_send_and_set_delay_after_intf_enablepanel_drv_i2c_send_and_set_delay_before_intf_enable(hi_u32)intf_attr_p->intf_enablepanel_drv_check_lvds_phy_spread_enablepanel_drv_proc_set_spread_enable(hi_u32)intf_attr_p->spread_enabledrv_panel_ioctl_get_drv_current_rangehi_drv_panel_get_drv_current_rangepanel_drv_proc_set_backlight_rangedrv_panel_ioctl_get_emphasis_rangehi_drv_panel_get_emphasis_rangepanel_drv_get_0d_dim_strength_rangedrv_panel_ioctl_get_com_voltage_rangehi_drv_panel_get_com_voltage_rangedrv_panel_ioctl_get_spread_rangehi_drv_panel_get_spread_rangepanel_drv_check_com_vlotagepanel_drv_proc_set_voltagepanel_drv_check_lvds_phy_com_voltagedrv_panel_ioctl_set_com_voltagepanel_set_com_voltagedrv_panel_ioctl_get_com_voltagehi_drv_panel_get_com_voltagepanel_drv_check_lvds_attr_com_voltagepanel_drv_proc_set_vbo_test_modepanel_drv_check_port_modepanel_hal_set_lvds_bit_modepanel_drv_check_pair_modepanel_drv_custom_set_ldm_demo_modedrv_panel_ioctl_set_ldm_demo_modehi_drv_panel_set_ldm_demo_modedrv_panel_ioctl_get_ldm_demo_modehi_drv_panel_get_ldm_demo_modepanel_drv_custom_get_parse_param_modepanel_drv_custom_set_panel_modehi_drv_panel_set_panel_modepanel_drv_proc_set_lvds_link_modepanel_drv_pwm_set_sync_whole_modepanel_drv_pwm_set_dynamic_modepanel_drv_get_pwm_dynamic_modepanel_drv_update_pwm_dynamic_modepanel_drv_proc_set_vbo_data_mode(hi_u32)vbo_attr_p->data_mode(hi_u32)data_modehardware modepanel_drv_parse_interfacechessboardsync_who_modtim_chg_moddynamic_modhi_drv_panel_suspendldm_spi_set_signal_always_validHorizontal gradient gray of RedVertical gradient gray of Redpanel_drv_proc_addpanel_drv_set_spreaddrv_panel_ioctl_set_spreadhi_drv_panel_set_spreaddrv_panel_ioctl_get_spreadhi_drv_panel_get_spreadpanel_drv_check_spreadpanel_drv_resume_cfg_k_threadpanel_drv_i2_c_readcurrent hsync_fp = %d, hsync_fp_maxn = %dpanel_drv_proc_set_miscpanel_drv_custom_get_custom_funcconvert_data_str_to_decpanel_drv_custom_send_panel_i2cpanel_drv_get_aphy_div_fbpanel_drv_set_intf_power_for_dataover_turn_datadrv_panel_ioctl_get_ldm_datapanel_drv_get_cfg_step_ctrl_datapanel_drv_tcon_peri_dataincrease_dataprbs10_dataK28.5-dataK28.5+datavesajeidabyte_num_p[byte_num]bit_width_p[value]vb1_test_mode[value]data_mode_p[data_mode]SDK_VERSION:[HiDPTAndroidV600R001C00HiDPTAndroidV600R001C00SPC070] Build Time:[, ]23.438KHZ46.87KHZ26.7857KHZ26P786KHZ37P5KHZ62P5KHZ93P875KHZ46.875KHZ23.4375KHZ18.75KHZ93.75KHZ31.25KHZ37.5KHZ62.5KHZ23.44KHZ23.43KHZ20P833KHZUHD48HZFHD48HZUHD25HZUHD24HZUHD30HZ650MV550MV450MV350MV1250MV1150MV900MV800MV700MV600MV1500MV1400MV1300MV1200MV1100MV1000MV60VT50VTBUTTLDEPTGDEPTUSIT8BIT6BIT12BIT10BIT60HT50HTLRGLASSFSMLVDSCEDSFLIP_MIRRORPR_LRLDM_SPI_MIN_FREQISPFLIP60VFP50VFP60HFP50HFPVBObase_info->frame_rate_max * OUT_FRAME_RATE_PRECISIONPR_RLGet pwm attr point is NULLHI_PANELFPK8LINK4LINK2LINK1LINK8K5K2KCSPICMPICHPIEPICHPI_HSBSHSBSFTRUEFALSEUHDFHD2DLRSYNC9DB8DB7DB6DB5DB4DB3DB2DB1DB0DBTABVESAJEIDApanel_drv_check_lvds_attr_link418BIT44436BIT44424BIT44430BIT44418B44436B44424B44430B444pixel3panel_drv_check_lvds_attr_link3PWM3PIXEL3panel_drv_tcon_peri_data_group2pixel2panel_drv_check_lvds_attr_link2PWM2PIXEL216BIT42224BIT42220BIT42216B42224B42220B422panel_drv_tcon_peri_data_group1pixel1panel_drv_check_lvds_attr_link1PWM1PIXEL1pixel0PWM0PIXEL0FHD4K60UHD60FHD608K4K3060FHD4K3060UHD50FHD50FHD4K302019-12-13,10:00:00sizeof(drv_reg_panel_info)strlen(base_info->name)res(W/H)com_voltage length is out of range!PANEL CUSTOM get custom function failed!get_pdm_func failed!send panel i2c failed!pull panel special GPIO failed,panel_index=%d!PANEL get custom function,members HI_NULL!please check spread_type!!37.5KHZ %-12s:%-12s|%-12s:%-12s|%-12s:%-12s|%-12s:%-12s| %-12s:%-12d|%-12s:%-12s|%-12s:%-12s|%-12s:%-12s| %-12s:%-12s|%-12s:%-12d|%-12s:%-12s|%-12s:%-12s| %-12s:%-12d|%-12s:%-12d|%-12s:%-12s|%-12s:%-12s| %-12s:%-12s|%-12s:%-12d|%-12s:%-12d|%-12s:%-12s| %-12s:%-12d|%-12s:%-12d|%-12s:%-12d|%-12s:%-12s| %-12s:%-12d|%-12s:%-12d|%-12s:%-12s|%-10s:%-12s| %-12s:%-90s| %-12s:%-12s|%-12s:%-12s|%-12s:%-12s|%-12s:%-12d| %-12s:%-12s|%-12s:%-12d|%-12s:%-12d|%-12s:%-12d| %-12s:%-6d%-6d|%-12s:%-12d|%-12s:%-12d|%-12s:%-12d| %-12s:%-12d|%-12s:%-12d|%-12s:%-12d|%-12s:%-12d| fixrate to UHD@25_hz fixrate to UHD@24_hz fixrate to UHD@60_hz fixrate to FHD@60_hz fix type search out frmrate failed, default to 60_hz fix_rate_type is other, but support other flag is FALSE, default to 60_hz fixrate to 60_hz fixrate to UHD@50_hz fixrate to FHD@50_hz fixrate to 50_hz fixrate to UHD@30_hz echo refreshrate [60/120] >/proc/msp/panel Set out frame from 120Hz to 60hz PANEL frame_rate_max is not 120Hz Select pwm type fail, invalid pwm type is 0x%x Set pwm enable fail, enable is 0x%x cur_delay: %d, pre_delay: %d, val: %x, i: %d, address: %x, value: %x, eg_mask: %x LVDS or VBO spread_freq is out of range,spread_freq=%u spread_freq is out of range, spread_freq=%u %s = %u timing first data first used lane:%x max than %x, not support panel lowpower exit start panel lowpower enter start echo dbgtimreint 1 >/proc/msp/panel set debug timming reinit dbgtimreint success: debug timming reinit echo dbgvtotal [height~] >/proc/msp/panel set debug vtotal, must bigger than resolution height offset_addr is incorrect 60_hz timming not align, display not correct 50_hz timming not align, display not correct intf type is not correct drvcurrent success: drvcurrent=%s emphasis success: emphasis=%s spread_freq success:spread_freq=%s spread_freq success: spread_freq=%s lockndbg success: lockndbg=%s division success: panel division_type=%s pwm_type not init, please init first,wm_type=%s voltage success: voltage=%s ldatafmt success: lvds map:%s llink map success: lvds link map:%s lbitwidth success: lvds bitwidth:%s llink success: lvds link mode:%s tcon bist success: bist type is %s %s = %s fixrate to other echo colorbar [0/1] >/proc/msp/panel set colorbar enabel (0:disable colorbar 1:enable colorbar echo pnswap [0/1] >/proc/msp/panel set pnswap (0:normal 1:swap pn_swap success: value=%d? swap : not swap %s = %p echo dbgvsfpaut 1 >/proc/msp/panel set debug vsync_fp auto echo dbghsfpaut 1 >/proc/msp/panel set debug hsync_fp auto echo command para1 para2 path explanation parse tcon_bin vbyte success: vbo byte number=byte_num local_dimming dolby_vison enable, not allow to set level echo dbgvsfp [0~vtotal] >/proc/msp/panel set debug vsync_fp, must smaller than vtotal echo dbgvswidth [0~vtotal] >/proc/msp/panel set debug vsync_width, must smaller than vtotal echo dbgheight [0~vtotal] >/proc/msp/panel set debug width, must smaller than vtotal echo dbghsfp [0~htotal] >/proc/msp/panel set debug hsync_fp, must smaller than htotal echo dbghswidth [0~htotal] >/proc/msp/panel set debug hsync_width, must smaller than htotal echo dbgwidth [0~htotal] >/proc/msp/panel set debug width, must smaller than htotal datainv success: lvds data invert:%d? invert: normal deinv success: de invert:%d? invert : normal syncinv success: vsync invert:%d? invert : normal syncinv success: hsync invert:%d? invert : normal param attr is illegal 60_hz timming illegal 50_hz timming illegal panel suspend ok echo sdlock [0/1] >/proc/msp/panel set sdlock (0:not sdlock 1:sdlock sdlock success: value=%d? sdlock : not sdlock param is illegal,please give right bit_width echo dbghtotal [width~] >/proc/msp/panel set debug htotal, must bigger than resolution width parse panel_img fixrate success: off set_vbo_bit_width success: vbo_bit_width=value local_dimming dolby_vison enable, not allow to set localdimming enable state set_color_bar success: color_bar value? open: close syncout success: syncout=%d? enable: disable pwm duty is out of range bit width is out of range flip type is out of range division type is out of range link type is out of range fix_rate type is out of range def_frm_rate type is out of range 3D type is our of range vdata success: vbo data mode=data_mode vtstmd success: vbo test mode panel lowpower exit end panel lowpower enter end dimming freq 60hz invalid dimming freq 50hz invalid disp_info expect_height=%d or expect_width=%d or src_frm_rate=%d is invalid dimming freq other invalid link type invalid clk_freq_pfd = 0, invalid panel_drv_pmoc_func_process failed panel_drv_set_vbo_phy_clk memcpy_s is failed ERR: memcpy_s is failed panel_drv_pwm_de_init memset_s is failed snprintf_s failed panel_drv_proc_set_real_spead_freq failed panel_drv_proc_set_mapping_spead_freq failed Panel get PMOC function failed panel_drv_ldm_spi_proc_set_clk_phase failed osal_exportfunc_register PANEL failed dphy pll unlocked pwm duty is out of range,pwm_duty=%d max frame_rate is out of range!frame_rate_max=%d vsync output must 0 or 1, v_sync_output=%d hsync output must 0 or 1,h_sync_output=%d lvds drv_current is out of range,lvds_drv_current=%d lvds format is out of range,lvds_fmt=%d panel_height is illegal,panel_height=%d tcon success: tconpower=%d pwm freq is out of range,pwm_freq=%d lvds spread freq is out of range,lvds_spread_freq=%d hsync_fp must align to align_mode,hsync_fp=%d lvds spread ratio is out of range,lvds_spread_ratio=%d spread_ratio success: spread_ratio=%d resolution type is out of range,resolution=%d htotal must align to align_mode,htotal=%d panel_width is illegal,panel_width=%d panel_width must align to align_mode,panel_width=%d htotal must bigger than panel width.htotal=%d,panel_width=%d hsync_width must align to align_mode,hsync_width=%d pwm postive must 0 or 1,pwm_postive=%d de negative must 0 or 1,de_negative=%d vsync negative must 0 or 1,v_sync_negative=%d hsync negative must 0 or 1,h_sync_negative=%d dbgtimuse success: debug timming use=%d pwm_type iis out of range,pwm_type=%d pwm_type is out of range,pwm_type=%d intf type is invalid,intf_type=%d tim_change_type is out of range,tim_change_type=%d tim_change_type is invalid,tim_change_type=%d blen success: backlight_power enable=%d dbgtimen success: debug timming enable=%d intf success: intfenable enable=%d lvds comvaltage is out of range,lvds_com_voltage=%d lvds link4 is out of range,link4=%d lvds link3 is out of range,link3=%d lvds link2 is out of range,link2=%d lvds link1 is out of range,link1=%d --------------dim_change_step:%d pwm_type:%d ivalid, pwm_type must be less than:%d dobly_level success: dobly_level:%d set_bl_level success: bl_level:%d bTconEnable:%d bIntfEnable:%d bBackLightEnable:%d set_bl_range success: bl_min is:%d, bl_max is %d pwm signal invert must TRUE or FALSE,current cfg is %d pwm enable must TRUE or FALSE,current cfg is %d pwm sync_whole_mode must TRUE or FALSE,current cfg is %d pwm dynamic_mode must TRUE or FALSE,current cfg is %d pwm vsync raise must TRUE or FALSE,,current cfg is %d parameter ERROR, correct range is 0 to %d vsync_fp=%d not in range 0 to %d hsync_fp=%d not in range 0 to %d vsync_width=%d not in range 0 to %d hsync_width=%d not in range 0 to %d current vsync_fp = %d, max = %d dbgheight success: debug timming height = %d spread_enable success: spread status = %d image_info's name copy wrong, err = %d memcpy_s failed, err = %d memset_s failed, err = %d ssp_freq is invalid,ssp_freq = %d dbgvsfp success: debug timming vsyncfp = %d dbghsfp success: debug timming hsyncfp = %d ssp_ratio is invalid,ssp_ratio = %d spread_ratio success: spread_ratio = %d ssc_en is invalid,ssc_en = %d ssc_set = %d, ssc_step = %d, ssc_span = %d dbgvtotal success: debug timming vtotal = %d dbghtotal success: debug timming htotal = %d dbgclk success: debug timming clk = %d dbgvswidth success: debug timming vsyncwidth = %d dbghswidth success: debug timming hsyncwidth = %d dbgwidth success: debug timming width = %d set panel power:value = %d port_mode is invalid,port_mode = %d pair_mode is invali,pair_mode = %d tconio_delay is out of range,tconio_delay[%d] = %d au32_drv_current is invalid,au32_drv_current[%d] = %d au32_pre_emphasis is invalid,au32_pre_emphasis[%d] = %d com_vlotage is invalid,com_vlotage[%d] = %d cur_delay: %d, pre_delay: %d, i: %d <===[Exit] target str out of range! find_type_str [%s] ===>[Enter] error: vbo spread ratio invalid, must in range[0, PANEL_SPREAD_RATIO_MAX] Call %s Failed, Error Code: [0x%08X] echo dbgclk [0~600M] >/proc/msp/panel set debug timming clk [0~600M] parameter ERROR Set panel pwm attr is NULL param attr is NULL dobly_en_test success: dobly_en_test:%d? TRUE : FALSE dimen success: dimming enable:%d ? TRUE : FALSE dphy PLL LOCKED comb reg info: backlight on,intf enable to backlight on delay: <%d ms.> start to send I2C cmd,tcon poweron to I2C cmd sending delay: <%d ms.> intf enable, tcon poweron to intf enable delay: <%d ms.> ============================================panel proc info============================================= =========================================== panel pwm info =========================================== =========================================== 0d_dim info state ========================================== PANEL start power_on: info name len larger than 48 inv_28s_enable is invalid, must 0 or 1 support_other flag invalid, must 0 or 1 port or pair is incorrect!port_mode=%u,pair_mode=%u. spi_sel reg addr init success. set refresh rate success. parameter ERROR, min_level must less than max_level. sort type out off range. spi_sel reg addr init already inited. panel_drv_pwm_init failed. drv_panel_init failed. panel_drv_set_pwm_attr failed. panel_drv_get_pwm_attr failed. panel_drv_set_pwm_cfg failed. register PANEL failed. vtotal must bigger than panel height.vtotal=%d,panel_height=%d. pwm_type is out of range,pwm_type=%d. parameter_error, the max = %d, the conf is %d. parameter_error, correct range is 8 to %d. parameter ERROR, correct range is 8 to %d. parameter ERROR, correct range is 0 to %d. parameter ERROR, cfg should higher than %d. parameter_error, correct range [0~9]. parameter ERROR, TCON correct range [2~8]. parameter ERROR, correct range [0~7]. parameter ERROR, correct range [0~6]. parameter RROR, correct range [0~6]. parameter ERROR, Correct range [0~16]. parameter ERROR, correct range [3~5]. parameter_error, LVDS correct range [2~5]. parameter ERROR, TCON correct range [2~5]. parameter ERROR, correct range [0~5]. parameter ERROR, bl level range [0-255]. parameter ERROR, correct range link[1~4]. parameter ERROR, correct range [0~4]. fix_rate_type parameter ERROR, correct range [0~3]. parameter ERROR, correct range [0~2]. parameter ERROR, correct range [0~1]. parameter[%d] ERROR, correct range [0~1]. parameter ERROR, correct range [0~31]. parameter ERROR, correct range [0~11]. parameter ERROR, VBONE correct range [2~10]. level ERROR, info . parameter ERROR, correct range and align 8. parameter ERROR, correct range is 32 to %d, and align 8. parameter ERROR, Correct range 60 or 120. ---intf power--- ---set backlight on--- ---set backlight on timer:%d--- ---send I2C--- ------set backlight on done---- --------------------------------------panel commit time %s----------------------------- -------------------------------------------panel power stats-------------------------------------------- --------------------------------------------disp expect info-------------------------------------------- ---------------------------------------------intf attr info--------------------------------------------- ---------------------------------------------panel cfg info--------------------------------------------- -----------------------------------------------intf info------------------------------------------------ ----------------------------------------------TIM DBG------------------------------------------------------- ---------------------------------------------other CMD------------------------------------------------------- ---------------------------------------------LVDS CMD------------------------------------------------------- ----------------------------------------------VBO CMD------------------------------------------------------- ---------------------------------------------TCON CMD------------------------------------------------------- ------------------------------------------------PANEL--------------------------------------------------------- ------------------------------------------------- pwm_help --------------------------------------------------- echo misc [0~7] >/proc/msp/panel fix misc_all frm_rate (0:off 1:fhd50_hz 2:fhd60_hz 3:4_k24_hz 4:4_k25_hz 5:4_k30_hz 6:4_k50_hz 7:4_k60_hz) echo misc4k [0-5] >/proc/msp/panel fix misc4_k frm_rate (0:off 1:4_k24_hz 2:4_k25_hz 3:4_k30_hz 4:4_k50_hz 5:4_k60_hz) echo miscfhd4k [0~4] >/proc/msp/panel fix misc_fhd 4K frm_rate (0:off 1:fhd50_hz 2:fhd60_hz 3:4_k50_hz 4:4_k60_hz) echo pwminvert [0~3] [0/1] >/proc/msp/panel set pwm freq (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:positive 1:invert) echo vbitwidth [0/1] >/proc/msp/panel set vbo bitwidth (0:8bit 1:10bit) load hi_panel.ko success. (%s) echo division [0~3] >/proc/msp/panel set division type (0:one_oe 1:one 2:two 3:four) echo fixrate [0~3] >/proc/msp/panel fix out frm_rate (0:off 1:50_hz 2:60_hz 3:other) echo power [0/1] >/proc/msp/panel set panel power on/off (0:power off 1:power on) echo vsyncinv [0/1] >/proc/msp/panel set vsync signal invert (0:invert 1:normal) echo hsyncinv [0/1] >/proc/msp/panel set hsync signal invert (0:invert 1:normal) echo deinv [0/1] >/proc/msp/panel set de signal invert (0:invert 1:normal) echo ldatainv [0/1] >/proc/msp/panel set lvds data invert (0:invert 1:normal) echo cfgstat [0/1/2] >/proc/msp/panel set dim strength (0:weak 1:mid 2:strong) echo dbgtimuse [0/1] >/proc/msp/panel set use debug timming info(0:not use 1:use) echo pwmdymode [0~3] [0/1] >/proc/msp/panel set pwm dynamic_mode (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:disable 1:enable) echo pwmen [0~3] [0/1] >/proc/msp/panel set pwm enable (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:disable 1:enable) echo dbgtimen [0/1] >/proc/msp/panel set debug timming enable (0:disable 1:enable) echo spreaden [0/1] >/proc/msp/panel set spread enable (0:disable 1:enable) echo lsyncout [0/1] >/proc/msp/panel set lvds syncout enable (0:disable 1:enable) echo vlockndbg [0/1] >/proc/msp/panel set vbo LOCKN high (0:sw_low 1:sw_high 2:hw_mode) echo syncwhole [0~3] [0/1] >/proc/msp/panel set pwm sync_whole_mod(0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:sync_whole 1:sync_vsync) (5:5db 6:6db 7:7db 8:8db 9:9db) echo emp [0~9] >/proc/msp/panel set emphasis (0:0db 1:1db 2:2db 3:3db 4:4db) (3:K28.5-data 4:increase_data 5:prbs10_data) echo vtstmd [0~5] >/proc/msp/panel set vbo test mode (0:off 1:over_turn_data 2:K28.5+data) echo sfreq [2~5] >/proc/msp/panel set spreadfreq ([2~5]) echo sratio [0~31] >/proc/msp/panel set spreadratio ([1~31]) echo voltage [0~14] >/proc/msp/panel set voltage (0:400MV 1:450MV 2:500MV 3:550MV) echo current [0~6] >/proc/msp/panel set drvcurrent (0:200MV 1:250MV 2:300MV 3:350MV) (8:900MV 9:1000MV 10:1100MV 11:1150MV) (4:600MV 5:650MV 6:700MV 7:800MV) (4:400MV 5:450MV 6:500MV) (12:1200MV 13:1250MV 14:1300MV) error: VBO current invalid, must in range[0, HI_DRV_PANEL_CURRENT_BUTT) error: VBO spread freq invalid must in range[HI_DRV_PANEL_VBO_SSFREQ_46P875KHZ, HI_DRV_PANEL_VBO_SSFREQ_BUTT) error: VBO emphasis invalid, must in range[0, HI_DRV_PANEL_EMP_BUTT) error: VBO byte num invalid, must in range[HI_DRV_PANEL_VBO_BYTE_NUM_3, HI_DRV_PANEL_VBO_BYTE_NUM_BUTT) pwm_type ivalid, must in range[HI_DRV_PANEL_PWM_TYPE_PWM, HI_DRV_PANEL_PWM_TYPE_BUTT) error: VBO data_mode invalid, must in range[0, HI_DRV_PANEL_VBO_DATAMODE_BUTT) echo pwmfreq [0~3] [0~999]>/proc/msp/panel set pwm freq (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0~999) (tcon range from 2 to 8) echo pwmduty [0~3] [0~255]>/proc/msp/panel set pwm duty (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0~255) echo sfreq [2~8] >/proc/msp/panel set spreadfreq (lvds and vbone range from 2 to 5) echo vdatamod [0~6] >/proc/msp/panel set vbo data mode (0:30bit444 1:36bit444 2:24bit444 3:18bit444) echo llinkmap [1~4] [0~3] >/proc/msp/panel set lvds link map (1:link1, 2:link2, 3:link3, 4:link4)(0:pixel0, 1:pixel1, 2:pixel2, 3:pixel3) ##panel_drv_set_mlvds_power 20ms## get misc panel timing failed, use default timing60_hz! change to 4_k_60_hz! change to fhd_60_hz! change to 4_k_30_hz! spread_ratio is not legal, spread_ratio=%u! panel PWM level illegal, def_level=%u, mix_level=%u, max_level=%u! 3D type, timming not need to adjust! update_pwm_duty failed, please init first! update pwm dynamic mode failed, please init first! please init 0D dim first! please init panel first! please config 0D dim hardware first! user spread freq param illegal, not support! step ctrl data str len %d is max than range, not support! bl_driver config start! chip_type or chip_version is NULL point! pfn_ldm_strength_level is NULL point! parse_mode is NULL point! spi_sel already deinit! vcnt check times is out of limit! COMBO VIRTUAL REG HEAD is incorrect! pwm_type not init, please init first,pwm_type=%s! pwm_type not init, please init first,pwm_type is %s! current have not mlvds attr! current have not P2P attr! covert str to dec, buf character is err! step ctrl data str have not number character, err! panel_drv_get_backlight_power error! panel_drv_get_tcon_power error! panel already unioreamp! not set default framerate, default to def_frm_rate_p! current panel not 3D FS, not support set 3D sync info! panel init failure, set panel power_down! no FRC funtion! ldm_spi clk too small, not support, min! panel_0d_dim_ctx is null! PANEL proc register fail! invalid ldm spi sel! timming gradual change not support, parameter illgal! panel advance info GPIO group temp_gpio_num=%u is illegal! param is illegal! get 0D dim strength param illegal! set 0D dim enable param illegal! get 0D dim enable param illegal! get 0D dim strength range param illegal! 0D dim strength illegal! other timming illegal! panel advance info i2c send time illegal! Current Illegal! Emphasis Illegal! emp_registor Illegal! clock change to pixel_clk! ldm_spi clk div not odd, please check! only VBO support to change bitwidth! tcon_param offset is 0! use default timing! other_hz timing caculate framerate, larger than max framerate! 60_hz timing caculate framerate, larger than max framerate! 50_hz timing caculate framerate, larger than max framerate! fix_frame_rate param illegal, default to def_frm_rate! fix_frame_rate set other, but support other flag is FALSE, default to def_frm_rate! resolution type illegal, default 60_hz out frame rate! read group2 data from peri failure! read group1 data from peri failure! panel_drv_tcon_peri_data_group1 failure! unknow timming type %d, not change link type! search timming type use rect and frame_rate failed, default 4K@60_hz timming type! not support interface type! panel intf_type is not tcon scene! panel can not init multiple! search misc resolution failed, fix_type=%d is not in table! search out frmrate failed, fix_type=%d is not in table! ldm scene, not support 0D dim enable! search timming type use rect and frame_rate failed, frm_rate=%d is out of range! search misc resolution failed,fix_type=%d is out of range! search out frmrate failed, fix_type=%d is out of range! timming gradual change not support, default to intance change! VBO intf enableinvalid! VBO current invalid! VBO emphasis invalid! i2c cfg is invalid! VBO spread freq invalid! VBO spread ratio invalid! panel advance info i2c flag invalid! panel advance info GPIO flag invalid! VBO spread enable invalid! panel already ioreamped! PANEL drv_update_panel_ctx failed! pdm_func pdm_map_phyaddr_to_viraddr_ptr failed! pdm_func pdm_get_phyaddr_by_name_ptr failed! ldm regist fun to disp failed! panel ioreamp failed! hi_drv_mmz_alloc_and_map failed! update ldm_data_map failed! panel_drv_get_default_panel_info failed! PANEL drv_get_image_info failed! get gpio export function failed! get dci_histram failed! set PQ dim strength level failed! set FRC ldm strength level failed! set BL level failed! update ldm_data_ori failed! panel_drv_get_display_timming failed! get ldm data send state failed! panel k_thread create failed! PANEL drv_config_hard_ware failed! call custom set_panel_mode failed! set FRC ldm mode failed! get parse param mode failed! panel add proc failed! get_pdm_func failed! get pdm_func failed! get_i2c_func failed! write i2c_func failed! get custom func failed! PANEL panel_drv_set_timing_for_graphic failed! write i2c data failed! read i2c data failed! get module function GPIO failed! get panel current_index from PDM failed! get panel total_index from PDM failed! get tcon_idx from PDM failed! get panel base info from PDM failed! get panel advance info from PDM failed! get tcon_param from PDM failed! get PWM range and level from PDM failed! LVDS driver current invalid,lvds_drv_current=%d! get default panel info failed, index=%d is larger than param_cnt=%d! u8_pwm_using_cnt is out of range,u8_pwm_using_cnt=%d! search timming type failed, condition not support,frm_rate=%d,width=%d,height=%d! LVDS spread freq invalid,lvds_spread_freq=%d! LVDS spread ratio invalid,lvds_spread_ratio=%d! get panel index illegal,cur_index=%d,total_num=%d! kmalloc size memory failed,size=%d! pwm_type not init, please init first,pwm_type=%d! LVDS intf enable invalid,intf_enable=%d! LVDS spread enable invalid,spread_enable=%d! LVDS comvaltage invalid,lvds_com_voltage=%d! parameter ERROR, correct range is 0 to %d! start panel_drv_tcon_peri_data! parameter ERROR, correct range [0~3]! parameter ERROR, correct range [0~2]! parameter ERROR, correct range [0~1]! call panel CMD_PANEL_SET_INDEX! call panel CMD_PANEL_SET_DRVCURRENT! call panel CMD_PANEL_GET_DRVCURRENT! call panel CMD_PANEL_SET_EMPHASIS! call panel CMD_PANEL_GET_EMPHASIS! call panel CMD_PANEL_GET_PANEL_ATTR! call panel CMD_PANEL_SET_INTF_ATTR! call panel CMD_PANEL_GET_INTF_ATTR! call panel CMD_PANEL_SET_INFO! call panel CMD_PANEL_GET_INFO! call panel CMD_PANEL_GET_STATUS_INFO! call panel CMD_PANEL_GET_DIM_STRGTH_INFO! call panel CMD_PANEL_GET_CONFIG_INFO! call panel CMD_PANEL_GET_BININFO! call panel CMD_PANEL_SET_POWERON! call panel CMD_PANEL_GET_POWERON! call panel CMD_PANEL_SET_LDMDIMENSION! call panel CMD_PANEL_SET_BACKLIGHT_EN! call panel CMD_PANEL_GET_BACKLIGHT_EN! call panel CMD_PANEL_GET_TOTOAL_NUM! panel_0d_dim_ctx is NULL! get default panel info failed, point is NULL! g_pst_pq_func->get_ldm_param_status is NULL! g_pst_pq_func->update_ldm_data_map is NULL! panel_ctx_p is NULL! g_pst_pq_func->get_dci_histram is NULL! g_pst_pq_func->set_backlight_level is NULL! g_pst_pq_func->set_dim_level is NULL! g_pst_pq_func->update_ldm_data is NULL! call panel CMD_PANEL_SET_BACKLIGHT_LEVEL! call panel CMD_PANEL_GET_BACKLIGHT_LEVEL! call panel CMD_PANEL_SET_DIM_STRGTH_LEVEL! call panel CMD_PANEL_GET_DIM_STRGTH_LEVEL! call panel CMD_PANEL_SET_BLDRIVER_REG! call panel CMD_PANEL_SET_COMBO_VIRTUAL_REG! call panel CMD_PANEL_GET_COMBO_VIRTUAL_REG! call panel CMD_PANEL_SET_REFRESH_RATE! call panel CMD_PANEL_GET_REFRESH_RATE! call panel CMD_PANEL_SET_FIX_OUTRATE! call panel CMD_PANEL_GET_FIX_OUTRATE! fix_rate_type is other, but support other flag is FALSE! call panel CMD_PANEL_LDM_GET_ENABLE! call panel CMD_PANEL_LDM_ENABLE! call panel CMD_PANEL_SET_DYNAMICBL_ENABLE! call panel CMD_PANEL_GET_DYNAMICBL_ENABLE! call panel CMD_PANEL_GET_DRVCURRENT_RANGE! call panel CMD_PANEL_GET_VOLTAGE_RANGE! call panel CMD_PANEL_GET_SPREAD_RANGE! call panel CMD_PANEL_SET_VOLTAGE! call panel CMD_PANEL_GET_VOLTAGE! call panel CMD_PANEL_SET_DIM_DEMO_MODE! call panel CMD_PANEL_GET_DIM_DEMO_MODE! call panel CMD_PANEL_SET_SPREAD! call panel CMD_PANEL_GET_SPREAD! call panel CMD_PANEL_GET_LDM_DATA! |HT(%d) * VT(%d)* frm_rate(%d) - pix_clk(%d)| > TOLERENCE(%d)! malloc tcon pinmux reg info error!! malloc tcon combo reg info error!! malloc 2d timing reg info error!! malloc tcon intf reg info error!! tcon pinmux reg data_size error!! tcon combo reg data_size error!! tcon 2d timing reg data_size error!! tcon interface reg data_size error!! malloc tcon tabel data error!! parse pinmux failure!! parse combo failure!! parse panel failure!! parse 2D timing failure!! parse intf failure!! panel moudle not init!!! get combo module_param error ! get pinmux module param error ! get panel module param error ! get 2D timing module param error ! get intf module param error ! [boottime] panel loader %d finished ! Get panel pwm freq fail, invalid freq value is 0x%x Set panel pwm duty fail, invalid pwm type is 0x%x Get panel pwm duty fail, invalid pwm type is 0x%x Set panel pwm freq fail, invalid pwm type is 0x%x Get panel pwm freq fail, invalid pwm type is 0x%x Set panel pwm enable fail, invalid pwm type is 0x%x spread_enable is invalid spread_freq para invalid ssc_span para invalid aphy_div_fb para invalid panel spread set failed target str not exist! find_type_str [%s] echo blrange [min_level~255] [0~max_level] >/proc/msp/panel set backlight min and max range [0~255] echo bllevel [0~max] >/proc/msp/panel set backlight level range [0~255] echo lbitwidth [0/1] >/proc/msp/panel set lvds bitwidth (0:10bit 1:8bit) echo vbyte [3/4/5] >/proc/msp/panel set vbo byte number (3:8bit 4:10bit 5:12bit) echo ldatafmt [0/1/2/3] >/proc/msp/panel set lvds map (0:VESA 1:JEIDA 2:FP 3:other) echo tconbist [0/16] >/proc/msp/panel Set Tcon bist (0:disable 1~16 pattern) echo tcon [0/1] >/proc/msp/panel set tcon power (0:power off 1:power on) echo llinkmod [0~3] >/proc/msp/panel set lvds linkmode (0:1link 1:2link 2:4link 3:8link) echo intf [0/1] >/proc/msp/panel set VBO/LVDS intf enable (0:disable 1:enable) echo dimen [0/1] >/proc/msp/panel set 0D/local dim enable (0:disable 1:enable) echo blenable [0/1] >/proc/msp/panel set backlight enable (0:disable 1:enable) (4:24bit422 5:20bit422 6:16bit422) |HT * VT* frm_rate - pix_clk| > TOLERENCE! panel not init!! panel height is invalid,it is 0!! p Np]pap0uppPp`P`8w88pwpp] a 0u 8 N8]8a80u88P8`8w88p pP p` X XP X` P`  P `8888p p p ppppP`] a 0u P` ظlI8h V,J]8h 'V,J]8,8,p! X p! X p;Xh p" p p;Xh Op X Op X Op  p  p p p;Xh  p N pv pv pp" p p p """"DDDDUUUUffffwwww u """"DDDDUUUUffffwwww          ,48<           A 栤#  $(,048<@DHPT X \`dhlptx| o  $@DHLPTX`dhlptx|?  $  $ @        $ ( , 0 4 !!! !!!!! !$!(!,!0!4!8!zy2 5S; V!!pG@ pG@ pG BFpG!(8!FpG-O@FF(/,73N*!3M#3H~D}DxD2FP .H2F.I#xDyD *!*H*!2F#xDP %H*!2F#xDP O0x'FOFyB EoBO E/Fн8F)FG  (8F)F2FG ]*X//t h@ pG F!F`!""!Fr( `J*!H#zDxD 0O01*𵇰F:HFxDh8hO` LF((m+.J*!.H@zDxD* F0F!#<(C+JF+H*!zD@)xD@m(0FGF(()J*!H@zDxD 9h FSmGF8J*!HOszDxD(D!$n~J58Ӧ(ϧJ)OzDh*hÂhD`hF)h X}$IP$J#yDzD hh*h hB )` m)J*!H@gzDxD Z$Y# Di$@kG` JF H*!zDOsxD <$)h Fz}}(x)IyD h h)Im)J*!H@yzDxD $YG` JF H*!zDOsxD $ Fn|5/U/$K{Dhh+n+J*!HOszDxD $YG` JF H*!zD@xD $ F{z&&qF FFHxDhh(n-J*!HOszDxD $Y cF$G` JF H*!zD@xD ,F F{3 3IyD h h)In)J*!H@zDxD `$YG` JF H*!zDOsxD N$ F{O8o8WIyD h h) l)J*!HOszDxD ($YG` JF H*!zD@xD $ Fz /,/HxDh& )F6Fh(hXm)Am)n)l) J*! H@zDxD  Fn(2zx*B𵃰F"HFxDh8h  F((j+J*!HOszDxD 9h F@j((F1FGF8 Bj(FGF8J*!H@#zDxD$y~'2' 𵃰FH FxDh8h  F((j*J*!HOszDxD 0F)FGJFH*!zD@#xD T9h F$ y(v(d𵃰FH FxDh8h  hF((i*J*!HO szDxD 0F)FGJFH*!zD@3#xD 9h FN$x''𵅰F-HFxDh8h  $F((h)$J*!$H@G#zDxD 9h Fi((FG@JFH*!zD@M#xDi0FG@JFH*!zD@R#xD0h)hBJKzD{D1 *!@]#O4$xqKz^HpFHxDh0h  F((k)J*!HOszDxD (FGJFH*!zD@w#xD ^1h Fp$2wJ3-AFHFxDFh(h  pF((k+J*!H@#zDxD 8F1FBFGJFH*!zD@#xD )h FT$v) J)-AFHFxDFh(h  (F((k+J*!HO)szDxD 8F1FBFGJFH*!zD@#xD )h F $v+)yI)HxDhE )FF((h(Ah) J*! H@#zDxD  Fh(u &𵃰FHxDh8h@Bh2h F0F!GHJFH@3IzDxDyD8h)Fh0FGxJFHOc IzDxDyD *!^$ FDuy(kY(k{𵅰FH FxDh8h E tF((h* J*!HOczDxD 0F)FGJFH@CIzDxDyD *!9h FV$t(U'!kF#F HxDhhh(FGh JF H*!zD@3CxD $ F t GHxDh h(h)Ah)# !Fx hhh)Ah)J*!HO3szDxD J*! H@#zDxD O0hh( s@F-@~Gp FFF H)FxDhhBh0FG` JF H*!zD@TCxD v$ FpDs?FFF HxDhhh(FG` JF H*!zD@nCxD P$ FrX<\`FhJFH*!zD@CxDJ*!H@}CzDxD *O4HxDhhj(FGp JF H*!zD@CxD  F$;;~r;!F#FHxDhhAiy(FGJFH*!zD@CxD  J*!H@CzDxD $ F r::FFHxDhhiy(FGJFH*!zD@CxD  J*!H@CzDxD $ Fq'~7'4𵅰FHIxDyDhh9h0h(h) 1FF(0h(h) J*!H@CzDxD j !h !"G$9h FBqPq!()J*!HOczDxD <i!-AFHOFxD Fh8h"F#)0F)F  J*! H@SzDxD O0:hQDpE0pFHxDh0h$< @ 1FF0h$(h.J*!H@)SzDxD )y(hLGp JF H*!zDOcxD  Fp$p<;lpF HxDh0h$<@ 1FF0hFh )y(hLGJFH*!zD@OSxDJ*!H@CSzDxD ~ J*! HOczDxD r$ FpoR,t:,Wf,F `"x ** 0 + @08`/ *  M*! H;#}DxD *F: H*F I<#xDyD *!.O0`;K𵉰FHIFFyDh9h!F~.B"#" *&x0 -؎T02 * ./0+x=;[ 1J*!1HN#zDxD/J*!/HS#zDxD 2J !2H[#zDxD *!O0:hQ ;. T  ` )"0 (@0"` )J*!Hh#zDxD L*!H;#|DxD "F H"F I<#xDyD#\nR;5D;!d:CJ:0;d pGpGIyD h`pGmF@h``i( i(J*!H1#zDxD J*! H+#zDxD H ``O0 FMFh @"D0+0+ؒ *0B J*!H=#zDxD JG#IzDyD *! `O0F@hxf`i( i(J*!H1#zDxDh FZ`JFHX#IzDxDyD *!$J*!H+#zDxD H#IJxDc`yDO4zD *!S# F6gzYbObsh)IyD hhm+*J|#HzDxDJ*!Ht#zDxD *J#HzDxD @h (J#IzDyD *!`O0 .7ڨ`k<7D7D7pFF FJFH@IzDxDyD *!.J*!HOszDxD "O4 h0Fhh(h$ Fp 6'6Qa6Fh * 1h h h)Fh @5(H $% ( # i jh a b ad b(  i jh a b i jh a b`pG( ( pG(pGFpG FpGpFNHXJFXH@*#WIzDxDyDL.FV 1FFHRJFRH@/#RIzDxDyD;0F@HNJFNH@3#NIzDxDyD-v(h1F6HIJFIHOsHIzDxDyD0F0HEJFEHOsDIzDxDyD(hq(鈱@JF@H@A#?IzDxDyD *!@ FpLl\"BӑB3x+)$/5\"0-M.K}D{D1 *!*Ff#(JO4(H*!zDOsxD  \d l(  \" \"l$L'$`$_m#_s#_#_#u_t#_FH@JF@H@b#?IzDxDyD*(FH`LAh h)F  HFp DFH >F  :F0?J@3>H?IzDxDyD# *!1h(F((HPaPa% q8x1 F 1b bJa*BJ "@*@ Oa$JF$H@13$IzDxDyDXJFH@-3IzDxDyD%(JFH@.3IzDxDyDd$U[P$3[Z$Z#Ze#Yh#7ZF (*J*!*HOszDxD NO0(  #n `%a'  #nP%a`h(  |   t x (F F  LPTX\`dhlptx|-CF9H:IPxDyDh!`T2*dRx@OA $A A O   (t((HFOJ*!H@3zDxD O OIF(   HFaa|@QFOzrPC) J*!H@3zDxD F@+aB @aB  |(  `?i gBiJghehJej Bj i ipG԰IyD h hx1Td+F+ qEaEFR J*!HOszDxD JLMzDP|D}D@ U#@ C*!O0b``lYHIyD h hbɱ$J*!H@#CzDxDJ*!H@'CzDxD O4 F( JF HOc IzDxDyD *!8_Vp("J*!"H@:CzDxDF HxDh0hpm)FJFH@ACIzDxDyDJ*!H@>CzDxD RO4)F툱JFH@DCIzDxDyD *!: Fp$m _3nEU_, iU(J*!H@MCzDxD!FHxDhhJFH@UCIzDxDyD *! J*! H@QCzDxD O4 F$`^T.IyD h hѱJ(JFH@dCIzDxDyD *! J*! H@^CzDxD J*! H@bCzDxD O4$ Fv4]fiT(J*!H@mCzDxDIyD h hJFH@sCIzDxDyD *!l J*! H@qCzDxD `O4 F$m~B]-KSIyD h hѱ(JFH@CIzDxDyD *!. J*! H@|CzDxD J*! HOczDxD O4$ F~\ QSB(J*!H@CzDxD FHxDhh0JFH@CIzDxDyD *! J*! H@CzDxD O4 F$G }(\ l! R𵅰F+H-xDh0hO'J*!'H@CzDxD %HxDh8hm<(#JF#H@C"IzDxDyD *! J*!H@CzDxD O41h FB)FHJFH@CIzDxDyD$[}[Kʖi R QȱFHxDhhڱm(JFHOcIzDxDyD *!, J*! HOczDxD J*! H@CzDxD O4$ F |Z MQ رF+HxDhhla`h&"`t`OzpPC()& `J*!H@CzDxDJ*!H@CzDxD O0J*!H@3zDxD @+aB @aB  |(  ` r{6Zbf3F/HxDh(h.JzD.H@C.IxDyD *!hB.(JF(H@C(IzDxDyD.H*!@CxDJ*!HOczDxD bO4 (FCHJFH@CIzDxDyD (F눱JFH@CIzDxDyD *!> F$lYtx2zOdO+HoO-OIeyD h!h2mn%*QQ0F0F9FdQ a0F0F9F,(( J*!H#zDxD N`!LP1lX!FOzqACN`!0F*F;n.@PVhlt&0 `p@DFb@ '6`6#p!fvĶR(ʀJ*!H@5zDxD L`(tBO %HQ?LHOOSOS V9FTOzqHCDQb@F ,OPO 2 xqt /p`// #pR@ 0"C` R DF1Fa(FP  5pFP(r2!` t`* @ @*xJFxH@#xIzDxDyD6pJFpH@#pIzDxDyDC *!+I)?8Lp0 /B>0R 8(i_JF_HO=s_IzDxDyDC *!b2!h0F3Pp@R c[ HXw"p0Bp[ #`pB6h ) *"@ '))+#@8@ &F`8C8C?J*!HOszDxD J!HOszDxD *!2G>Au{L'L [Kx(J*!H@CzDxDIyD h h*  J*! H@CzDxD O0uzSjڎPIyD h hj`  J*! H@SzDxD J*! H@SzDxD ZO0[t,SK|HIyD h hbh`  J*! HOczDxD J*! H@SzDxD *O0+ H!*!xD "F@S0 zED LF H*!|D@SxD "F H!)`*!xD "F@S DxDpȱFPHxDh(hر0FOJFOH@SNIzDxDyD *!&BJ*!BH@SzDxDAJ*!AH@SzDxDOq2FOsx=J*!=H@SzDxD O4 Fp(FH5JF5HOc4IzDxDyD(FJH1JF1H@c0IzDxDyD )(LDP,!F , $0 ( JF H@c IzDxDyD# *!t,F(HEE$ Yo:NInwDa%/5ED)DCIyD h h±OqOs"J*!H@czDxD J*! H@czDxD J*! H@czDxD O0  nL3pFh("`h('IHxDh0hPm(/(L FEJFEHOcEIzDxDyD,7J*!7H@*czDxD[5J*!5H@,czDxDS3J*!3H@.czDxDK2J*!2H@2czDxDC F쨱1JF1H@;c1IzDxDyD# *!5P!FP!F i(!"F`i(#hfhpf j`jiiPrxJ*!H@DczDxD nO5(Fp%nm^mvNmLf0B2L;B2IyD h hR(!(#.J*!H@ZczDxD J*! H@QczDxD J*! H@UczDxD O0 }lJm1 J*! H@nczDxD HxDh h(!D `hP% l`h5(HxD8J*!H@czDxD  J*! H@sczDxD -@,Jf,?IyD h h!ұ`(J*!H@czDxD J*! H@czDxD @:I lf -0F" J*!H@czDxD hO0j@IyD h` J*!H@czDxD HO0fjH(O0pGI yD h`!@  H0F" J*!H@czDxD O0ri@IyD h` J*!H@czDxD O0iHH(O0pGI yD hmaA L G0F " J*!H@ szDxD O0/Ni@IyD h` J*!H@szDxD O0iG (O0pGI yD hbmaB  NGxh)IyD hm ")` !!J*!HOczDxD "! J*! H@KszDxD NO1"!`A`!Fh G`IyD hm*%`%J*!H@VszDxD O0%`%B`L$`P$B`H` bhFpF-HxDh Fm|(*J+I+KzDyD{D*! @&J*!&H@tszDxDJ*!H@oszDxD O0ph(FX`h^ hbmAh)`hh`h hL`hP hH pxg2F<pرFH$xDh?@0F (c(F0!2F0#t頱J*!H@szDxDJ*!H@szDxD hO4 FpfXE#,Pm(J*!H@szDxDJ*!H@szDxD `@B  J*! H@szDxD .O0pyjc&JzDhm+$J*!$H@szDxD7@ l cEh@` J*!H@szDxDJ*!H@szDxDJ*!H@szDxDJ*!H@szDxD O0vDVjLb~|eF2HxDhm(0J*!0H@szDxD@@ l bE!h:*'bB D@))$J@s$HzDxD *!J*!H@szDxDJ*!H@szDxDJ*!H@szDxD bO0F Ci\a ~=HIyD h ha@ J*! H@szDxD J*! H@szDxD O04dB$} YpGHxDhh( J*!H@[zDxDJ*!H@WzDxD O0cHB }𵑰F.H,xDh(h+J*!+H@zDxD)HxDh0hP(J*!(H@zDxD"J*!"H@zDxD O0*hQ !F'>  F@t2,Txd"Oc   F. A bcA$}bhHIyD h ha  J*! H@zDxD J*! H@zDxD JO0m|b A]^|(JF(H*!zD@xD .줱&HxDhh (J*!(H@zDxD $J*!H@zDxDJ*!H@zDxD O4 F D F(JFH@IzDxDyD *!6a@{_66$JF$H*!zD@xD  HxDhh1$Y-J*!H@zDxD O4 FnxJFH@IzDxDyD *! J*!H@zDxD $ F6?z {T66n5'JF'H*!zD@xD b뤱%HxDhh 'J*!'H@3zDxD N$J*!HOczDxDJ*!H@$zDxD :O4 F F(JFH@-IzDxDyD *! 7Z5Z`?ny4JFH*!zD@fxD ꔱHxDhhJzDH*!@yxD   J*! H@hzDxD H*!@lxD O03^=x348O pGlF(FH(FN(FR(FX-&! !V !Z F^  !J !N FZ `( Fd$ Fh E( Fh- Fj ( Fj -- Fj Fn @ԽF#HPjFxD#h hmB (` (,0hF\bhlrv|OP !hhFhFhF*<Fh(MOsI}DyD *!*FJO4H*!zD@_#xD`h(M@I}DyD *!*FJO4H*!zD@a#xDhбh).ӺMOsI}DyD *!*FpJO4H*!zD@e#xDM@hI}DyD *!*FXJO4H*!zD@c#xD i (өMOsI}DyD *!*F>JO4H*!zD@g#xD{`i!(` (^Рi!(Z (Xi!(T (R j!(N (L`j!(H (FРj!(B (@j!(< (: k!(6 (4`k!(0 (.Рk !(* ((k !($ (" l !( (`l !( (Рl !( (l!( ( m!( (`m(!!noM@#nJ}DzD! *!*FjJO4iH*!zD@i#xD  Fm(!Im(!D n(!?`n(!:n(!5n(!0 o(!+`o(!&o( !!o( !( !( !( ! (!(!MO sJ}DzD! *!*FRJO4H*!zD@k#xD (! (! (!| (!v (!p (!j (!d (1!^u09'2f01-1@V.1-cQ1/iW0 (!( ( !" ( ! ( ! ( ! ( ! (! (!bM@7#aJ}DzD! *!*F]JO4\H*!zD@m#xDd(!dd(!^d(!Xd(!Rd(!Ld(!Fd(!@d(!:d(!4d( !.d( !(d( !" d( !d( !d(!d(! d(! e(!$M@J#$J}DzD! *!*F(JO4H*!zD@o#xDe$$dM*!H@U#}DxD *F JO4H*!zD@q#xD H F.y/ /-=+.7+7%-w0,-CFHxDh8h FX0(&N*!HOs~DxD 2F FHI@}JyDzD*! 2FJO5H*!zDOsxDOk8 l (XN*!HOs~DxD 2FH@!lJxDzD *!2FJO5H*!zD@#xD#N*!H@~DxD 2FpHOskJxDzD *!2F`JO5H*!zDOsxD R9h(F l(ӸM*!HOs}DxD *F8H@glJxDzD *!*F4!k * رpo>((:ر_7ӨM*!HOs}DxD *FN*Fl@qI~DyDa*!  k*FIOsyDa*! HO5J@#IxDzDyD *! m($ӒN*!H@~DxD 2FHOs!mJxDzD *!2FJO5H*!zD@#xDc(%ӄN*!HOs~DxD 2FH@~JxDzD *!2FzJO5yH*!zDO"sxD9  (%uN*!uH@~DxD 2FqHOs oJxDzD *!2FrkJO5jH*!zD@#xD(%fN*!fHOs~DxD 2FXbH@`JxDzD *!2FH\JO5[H*!zD@#xD(%WN*!WH@~DxD 2F.SHOsQJxDzD *!2FMJO5LH*!zD@#xDl(((@T(AJFAH@SAIzDxDyD5f/7,!~+/4=+  ~Ir o*]*  _*3 *7V _)+ c)0 )@(J*!H@WzDxDxLJFH@UIzDxDyD# *!\J (zDzH*!OsxD Nk[( J*!HOszDxD#z)FxOzxB"J*!HOszDxD F$N*!HJF~D@3xD` kJFIOsyDw#H)FDB8ٻJ*!HOszDxD FN*!HBF~D@=xD` kOzrIOsPCyDBFGIOsyD *!O5JO%sHIzDxDyDCk(C#)FOzxB5J*!H@GzDxD FN*!HJF~DOsxD` kJFI@IyDa*! JO5H@#IzDxDyD#`l (J#IzDyD kd(  akc)-J#HzDxDJ#IzDyD *!\HO3JIxDzDyD *!#LHO5J@#IxDzDyD1+ӻJ*!HzDxD #2JO3HIzDxDyD  *!##!*N(dРl(l(<(𑀠l(l(k@'(\(V(N(H(@(:(((k (%YzJ*!zH#zDxD^.%P'P~JrT >S@ &y&ZJ*!ZHzDxD #8^J*!^H@ zDxDXJ*!XHOszDxD_J1#^IzDyD8VJ*!VHOszDxDPJ*!PHOszDxD TJ6#SIzDyDRJ;#QIzDyDPJ@#OIzDyDNJE#MIzDyDLJJ#KIzDyD *!HJO5GH@#GIzDxDyDEJ*!EHT#zDxD DJ*!DHY#zDxDBJ*!BH^#zDxD ?JO5?HO(s>IzDxDyDcXSL%E1'5%+;%IYyf))Om% &#t"]"t𵃰F FF(0  LP0 `CN` `?kC1FOzqHC `0DO*!DHO9sD&`xD :F:@H:F@I@#xDyD&`5O*!5H@#D&`xD :F"0H:F0IO8sxDyDC *!k h`)N`!B@ `HaBLP2BN`"BMBBHbBB`LP1BN`!BMABHaBh``N:Nh) ))J*!H@9CzDxDJ*!H@?CzDxD J*! H@<$0$`:&()1 6 aiX!iThPi`!jd`[J*![H@SzDxD CJ*!CH@3zDxD  io`io K1E (p io`iopcSH  FE H`ELP0E?LP5lC1FOzqAF0F(5FpV`!%!!N`%! OROP J@3 IzDyD *!8PN`%uLDD M=UF1HPxDh/H/J)hxD !C !zD C *!@SLFhY!h'Bb0 !F!F J*!H@SzDxD  J*!H@SzDxDJ*!H@SzDxD O0 *hQ &>? Y7JFH*!zD@SxD ꜱ F<JFHOcIzDxDyD *!lJ*!H@SzDxD `O4 J*!H@SzDxD R$ F>mkH@cxDh(hiIjJyD zD *!( h(( `J*!`H@czDxD O4hl&p6VJ*!VH@-CzDxD O`OpaN`"l hp&@B(( p "r#'!!"2  24 6x/JF/H@"c/IzDxDyD *!8( (('J*!'H@9CzDxD'J*!'H@?CzDxD!J*!!H@4 H@-cxDh(hIJyD zD *!&H#xDJhzDK`!JFzDPH@4cIxDyD *!H*!@6cxD )h F@K\𵃰F(HF FxD@>ch8h%I%JyD zD *!.-J*!HOczDxD O0:hQ,hJzDIT23`yDd2+`@Jct ` *! H*!@DcxD8}]T;-THxDh(h a!$)h F HxDhx JF H@Vc IzDxDyD *!L"-F0H@ccxDh(h.I.JyD zD *!*DhQt).ahth!h9!|h`J*!H@czDxD  J*!H@eczDxDJ*!H@iczDxDJ*!H@}czDxD O0*hQ"9S^C8pF"H FxDh0h hX,J*!H@czDxDJ*!H@czDxD -J*!H@czDxD O02hQp F)F" F SpF"H FxDh0h  hX,J*!H@czDxDJ*!H@czDxDeih F)h F F J*!H@czDxD 0O02hQp nVRù pF!H FxDh0h  jhX,J*!H@czDxDJ*!H@czDxDM) F F)F J*!H@czDxD O02hQp NTQhQ.gLhB Eم-B%2J*!2HzDxD {#(J*!(HzDxD m# %J*!%Ht#zDxD [,B J*!HzDxD # (B JIzDyD *!#ɉ)B JKzD{D1 *!# ZByp p FA)%hJzDhhR!`GX`hGxGG pJ#hhIzDyDJ#`hIzDyD J#IzDyDJ# IzDyD *! p't ( J#IzDyD *!@C%)*J*!HOczDxDLOs|DC `FOqFOsp J*! HOczDxD O0 BG/=pMEB J@CIzDyD *!'NO ~D  $ hBV PBehBh` p K L{D|D@F *!@C ^O0pVA/:(&J F&H*!zD@CxD > I4#yDh<@IQK1B EQBFBG0QBN`!B LP1BK1B4!$04!04!0LB. (J@CIzDyDC +HxDP#K{D@0 ``  JOc IzDyD *! O0X&X 8BA9 (J@CIzDyDB *@s# J@ SIzDyD *! O0HxDP"JzD@h` ~XX7'98 :  I* JyDzD8FHJ*!H<#zDxD \ F6ʷ\* * HxD " & , p  HxD QHxD HxD AH."AIxDALyDh|D(hJb  F hJFH*!zD@xD FtDFJFH*!zDOsxD FDFJFH*!zD@+xD F>hpJFH*!zDOsxD FAF`JFH*!zD@ExD FAhPJFH*!zDOsxD F8?DF@JFH*!zD@_xD | FI8Dh0JFH*!zDOsxD d FϾt@F JFH*!zD@yxD L Fo@hJFH*!zDOsxD 4 FjBBFJFH*!zD@xD  FYAbO` JFH*!zD@xD FsCF JFH*!zDOsxD FPBF JFH*!zD@xD FBh JFH*!zDOsxD FSABF JFH*!zD@xD FlAF JFH*!zDOsxD FΧ:h JFH*!zD@xD p F_g:F |JFH*!zDOsxD X FHAF lJFH*!zD@ #xD @ Fw:h \JFH*!zD@#xD ( FJ#:F LJFH*!zD@##xD  Fh@F <JFH*!zDO sxD F{AF ,JFH*!zD@=#xD F)AF JFH*!zD@I#xD F:Q JFH*!zD@U#xD Fa > JFH*!zD@b#xD F=F JFH*!zD@o#xD | FíR=F JFH*!zDOsxD d Fַu:h JFH*!zD#xD L Fv=F JFH*!zD#xD 4 Fn=F JFH*!zDO"sxD  FU9F JFH*!zDO%sxD  F8Fh nر`h jhh (@SM>#SI}DyD *!*F OJO4OH*!zDn#xD[AM*# h@I}DyD *!*F HFxDh8h  * \q H6JF6H@#6IzDxDyD3 .  ` ` `  `  FOPdJO+sHIzDxDyD# *! ~9h(F `g\M.J3F#X7zD}DQ*!` @# \X%ڍ[LpW2𵅰F;H FxDh8h  l)0 F x, lhh Fph-JF-H@'3,IzDxDyD(F!F F^8)JF)HOKs(IzDxDyDC *! #(*(,( F H N(F!FJ*!H@)3zDxDJ*!H@-3zDxD &9h0F  F 2 F 6 <hBMD2/F4HxDh(h  m)ac%5c2,  x JFH@ 3IzDxDyD *! v" F $ 4  $ T (m O@P  )h F . -ObJzDhh#l( H` JO `*K`JN`jGJA D!F* Gj'7`&v$E>C(4C,UD 0/CT4GPG 8<G @%9CD5CHCLA AX%9C\59C`CCC"#P H(  J @ " J N 4 Ph   -OFHxDhh  }HdxDh zI@FyD jxI wJ@FyDzD `0|sMtLtN}DtI|DtJ~DyD`zD@FG\ JoL PH|DlMT#0}DkL|DU!piMT"`iLiH}DiI|DiJxDyDzD@FF\ "cKL{DaLbM|D}DS!0`IT"p_LyD_N|DU ^M^J~D}DzD@@F)Ff XH sxDP"VJzD R#0TJzD TLR!SOTJ|DDpzDA@F)F f MI@F\yD XII(yDHIyD(@ CLCN|DU!~DU 0AHAIU"xD@JU'pyD\zDLFPFg 7K{D7LS 0|D6HV!xDT"`P'3L3O4J|DDQzDvAF@PF h`,Pvjװ ,bteЕ1R5bD?BtsƗxXHl 'xDLMN|D}DP!0HU'p~DMT"xDJ}DzD)F F H p|`xDP"P'OP!0P&NIDJ~DyDzD)F F L\@H`4sxDLIJ|DyDzDXFGf 0IJyDLzD|D@XFff HxDLMJ|D}DzDAXF)Ff 0IOJyDDzDXF9Fff ,FLNJ|D~DazD@XF)F r0IJyDzDXF9F `0IJyDzD XF9F L9I'K{DK{DK{DS"0JXzDX!X IJyDzDXF * ʉLMO|DX 0}DX!X"JDzDPAXF9F  GIyDX 0}HxD}H}IxD}JyDzDXF B0DxLyMyN|DyI}DyJ~DyD`zDXF^L  sIXFyD  fGnKX {DlKX&`{DkKXF{DX!0X"gJ9FzD %@R6 V`IXFyD X(ǀ(@ @R0 @(@@Q1@B@MJMLNMzD|DR!`}DT!@S IHJKJIxDJJ{D\yDzD V4@FsF d`.z˟`X7fʇ(g[ +X\ԺֆچOUv^vYݓۓ+ؿԄÄ%0H 9& 2e ~(z@Q1@BsgJhLhMzD|DR!`}DT!@S dHdKeIxDeJ{D\yDzD V4@FsF `k(@@Q1@B@lTJzD%QLQMRN|DRI}D~DyDS 0T"NJ\`zDlP@F nHHf6xDFLFM|DP#0EIT&}DDJyDzDP%?L@M@N|D@I}D~DyDS 0T"=J\`zDlP@F 66HxD5JP!zDf0L0H|DR&`xDF.H/K/MxD F.I/J{D}DV0yDzD@F HLdbxDT2|DtrIJFyDzDNG@B^َґ:Ԙhλ`lJzDLV|DR!`S T%@HKMxDI{DJ}D\yDzD\4@FsF H&6xDLI|DP#0HT"`yDJ`xDzD@F rHT2dbxDtrLIJ|DyDzD@Fz Z@F I@FyD RpDPbh6lơt&LH|DxDQ"p IJLyDzD@F ,  &vL|DQ 0IyDP'W"pJ@zD@F &S 0 vP" R!`IJyDGzD p @F x|6fLO|DHDIJxDyDvzDL@FF h|F64wOxIxHDxJyD\xDzDQF@F| l6$ǵfkLlOlJ|D DzD@FQF X8(cHcKvxDf{DaIaJP&yDzDS'0F^J@FzDaFDD jYI@FYJ7yDzDDDD \TI@FyD VgDQb`fdƠKLLHLIMJxDyDzD |Du@FL 4T(@F @HAIxDyDhh@F "(F !h  L턢0>xܹ|D<ЀJcW{dQϥ|$H+}õfH!xDh dL|D F F F dXI=#JyDzD# h!AbDa J*! H@^CzDxD lO1FpY VL|D F F F@ J-GHxD hF HxD (HxD $`m( ;""ВIyDQ HxD HxD HxD HxD HxD HxD HxD HxD HxD HxD ,HxD HxD HxD HxD HxD ~HxD }HxD |HxD {HxD zHxD yHxD xHxD wHxD mб(5}HxD |HxD {H|MxD|N}DF{H|O~DxD{LDF{H|DxDgHgMxDgN}DFgHgO~DxDgLDFfH|DxD F 8F ~PF zLF_L`M`N|D}D~D0F p(F l F j @R0 (_HxD \^HxD X]HxD T\HxD P[HxD LZHxD HYHxD DXHxD @WHxD FDB F <ꀱO7sJIzD@GyD *! $ J*! H@#zDxD O0*hQ Vɐbe!H FxDh(h  V! " F@B F xJO(FB F >週@3JIzDJGyD *! & J*! H@3zDxD O0*hQ V'>H FxDh(h  V! " PJBzD IL@23yD *! H@-3xD *! O0*hQ $=H FxDh(h  ! " LJBzD H@A3xD *! O0 IP@F3yD *! *hQ Hx8-A#H FxD  ! "LgPwVW ^IBJOVsHzDxD *! NO0JKzDT{D0 *!@]3 <  Q xǀv𵅰H FxDh(h  z! "LgPw BJ@n3HzDxD *! O0JKzDV{D0 *!@s3 *hQ ,lÏQQ𵅰HxDh(h  .#@D'JwH7.L O|DDp *!"F@# Ozp 6H1HB)h  𵅰HxDh(h  #LP'VwT7.L O|DDp *!"FO,s lOzp T1TB)h  J"H FxDh(h  ! " <<(x(JKzD{D *!Os * J*! H@wzDxD O0*hQ Zz𵃰! " (%J*!%H@CzDxD O0 LF H*!|D@#CxD "F HnI"F7FxDyD'OO*.F@$C H@%CIxDJyDP%zD! *!"F 8F 0F `D~! " F(!#M*!#H@3}DxD *F H@3IxDJyDzDP$*! *F xO0 F M*!HOhs}DxD *F dH@3IxDJyDzDP$*! *F R 'ݯ! " 2F( M*! HOls}DxD *F $H*FI@3xDyD *! O0 F 8M*!H@3}DxD *F H@3IxDJyDzDP$*! *F ޜ]*! " (J*!HOqszDxD O0F(  F HOss JxD IzDP$yD *! |5𵅰6H FxDh8h  ! " (.J*!.HOwszDxDCFm(7 $ &-OP&@& f $0F  N*!HO}s~DxD 2F RH@3IxDJyDzDP%*! 2F @ J*! H@3zDxD 4O49h F pP ! " (J*!H@3CzDxD O0F @M*!HOc}DxD *F H*F I@9CxDyD *! xw.p#H FxDh0h  $! " F(M*!H@DS}DxD *F H*FI@ESxDyD *! O0@JSJIzDFyD *! 2hQp DmA mp#H FxDh0h  ! " fF(M*!H@YS}DxD *F VH*FI@ZSxDyD *! JO0@_SJIzDFyD *! 8 2hQp vtl! " (",6@JT4J!4H@zDxDN?J*!?HOszDxD G,J!,H@zDxD:)J!)H@zDxD0&J!&H@zDxD&#J !#H@zDxD J ! H@zDxDJ!H@zDxDJ!H@#zDxD *!p)h p5 +ё֜%m! " 8(J*!H@#zDxD ,O0F J*! H@#zDxD  sjkOj3! " (J*!H@##zDxD O0F J*! HO szDxD  yiUi! " (J*!HO szDxD O0F J*! H@9#zDxD  1j j! " (J*!H@E#zDxD O0F J*! H@J#zDxD | g3gH FxDh(h ! " ^F JzDXH*!@1SxD NO0 H*!@5SxD B *hQv/-H FxDh(h ! " ( (J*!(H@SzDxD O02 F A #mA*aBB*B*A B* lamb l H@S JxD IzDP$yD *! *hQ[``B)H FxDh(h ! " ( $J*!$H@SzDxD O0*F " d@@*`TAA*A*A*!@  H@S JxD IzDP$yD *!z *hQ޾Up*H FxDh0h ! " R ( %J*!%H@SzDxD DO0, %FCBC* mB*baC*B C* H@S JxD IzDP$yD *! 2hQpTVGbb0 H "xDh(h ! F(J*!H@3zDxD O0< FzJ*!H@3zDxD m)HDE *hQ pH FxDh(h @R0 Z0@Q1@B! "& Fm((@(qJ*!qH@SzDxD! "& rFm( Ш(.tJ*!tH@czDxD (2tJ*!tH@'czDxD (6uJ*!uHOczDxD DkJ*!kHOczDxD 8O0_I_JyD_KzDQ {D*!0 @"cQ^I_JyD_KzDQ {D*!0 @+cV\I\JyD\KzDQ {D*!0 @3cLAG (16J*!6H@SzDxD (G8J*!8H@czDxD -J*!-H@JczDxD$I%JyD%KzDQ {D*!0 @Sa!I"JyD"KzDQ {D*!0 @Sa `!FmF *hQpIJyDKzDQ {D*!0 @c炿hjgHg7gBgDgһgIhpg3hSgpghUg֙.H FxDh(h ! " F ( &J*!&H@_czDxD 8O04FmJ(zDعH*!@ccxD $EH*!@fcxD E H*!@icxD PD F *hQ@мih׼Mh>p#H "xDh0h ! F(M*!H@C}DxD *FH*FI@CxDyD *!O0 F NJ*!H@CzDxD  2hQpD}x9p#H "xDh0h ! F(M*!H@C}DxD *FtH*FI@CxDyD *!hO0@CJIzDGyD *!R 2hQpDW+>wqWTH "xDh(h ! ,J!H@CzDxD *!O0Ft@S J IzDGyD *! *hQD锺 WV! " ( J*!H@SzDxD F ` H@SJxDIzDP$yD *!  O0cV)9Vp'H FxDh0h ! " F ! " @J*!H@zDxDB J*!H@zDxD |O0JKzDd{DTB4*! @#h 2hQp耹Ik5Sݨ p J*! H@ozDxD @O0 {#$ `J*!H@zDxD "O4 Fz p J*! H@zDxD O0 Q p J*! H@zDxD O0 `Q# pJ*!H@zDxD O0 'U# hpJ*!H@zDxD O0 zߟIyD h`pG O$3E YhBh)*  Ԁh JN# HzDxD(h)Ah)i)Ai)Ҁi(# JS#HzDxDJX#HzDxD J]#HzDxDJb#HzDxD *!FO0Jg#IzDyDpZŸ@Z4Z|(ZͦZY 𵃰F( =J*!=H#zDxD :HxDh8x(8J#8IzDyD *!O60F Fh9F:$KhB h+>(F 'JF'H#'IzDxDyDC *!&a A9p!aAb 0@ 8x"0$ "e  e*8pB @*&,U?|UsU@YF( *J!*H#zDxDB'HxDhx"$2B*ЅhBkh+)i F ii Fi F i F &)j F *ij F .h F F ,  H# JxD IzDP$yD *!:O0+pU\ܳoZ( J# IzDyD *!1JzDh3 $hBS,*` `* A A* I JyD KzDQ {D*!0 #O0W~:7WpF( /J*!/HOszDxD L F(Fﰱ*JF*H*!zD@ xD ="J*!"H@zDxD /!HxDhx09$hBP,* !e 0e*A @* F&H@JxDIzDP$yD *!zO60FpVԠ`V|V ZV$((JOs(IzDyD *!PO0"IyD h"x:$ hBQ<+ "`A,!"#^J*!HOszDxD IJyDKzDQ {D*!0 Os  x(8 pRDvRRIyD hx29$ R <+R<+` J*!H@_zDxD O0JKIyD hx29$ h+R<+А` J*!H@yzDxD O0{UIyD hx29$ h+R<+Бh` J*!HOszDxD zO0I{-O?IFyDx=HxDhFx(m&$8HxD8HxD7HxD 7HxD 6HxD 6HxD 5HxD 5HxD4HxD4HxD F S!0T T"  HFQF 4'#T 0T%IHFJyDzDW 9hT 0HJxDT!zDHFQF$76xB<*v_PlqL YJLG{{ppHxDHxD HxD HxD HxD HxD HxD@Ӷ2!Aڸ0 F! "(&J*!&HOszDxD9F ! "n(LFH*!|DOsxD "FxH"FI@xDyD# *! F!p8J*!HOszDxD FpJ*!H@zDxD PO0 Kr,+r1Dkqjqƪ𵋰BHFPxD!F "h8h A A !(8J*!8HOszDxDVF ! "1J*!1H@#zDxDD/IyD hxI29$#hBR<+a "Fa* A*!B !F`(FX!J*!!H@#zDxDH#JxDIzDP%yD *!J*!H@#zDxD O0 :hQ  炮H8G'\P_GxG𵋰CHFPxD!F "h8h A A !d(9J*!9H@)#zDxDWF ! "Rz 2J@/#1IzDyD *!D.IyD hx929$!hBR<+a "Fa* !B*!FB `(F8X"J*!"H@9#zDxDH#JxDIzDP%yD *! J*!HO szDxD O0 :hQ T >UTOYiT2T@-ASH  FPxDAF "Fh8h A A !(GJ*!GH@I#zDxD`F ! "F(@L*!@H@O#|DxD "Fl>{lЩwDlkGkReyeCCuQXjbdd<WZYjWW\WyiQc!cMOqO#H}DDxD*Fp *!H*!*F#xDp FAh* J*!HQ#zDxDOq"Os(J#IzDyD&p*t` |+rcd*.tdJ HxDh hh`h&U  h6 5Bӽ̝) #`F԰FHxDh(h hF F  #-maamb!`n )h𵃰F(H' FxDh0h8D8D8D7T/ ih(Fhmaxambx!`b \1h,ꌜpFhcHh Fc#h(dhhdHi(ei!e\xJIKzDyD{D*! @#U,!#xJIKzDyD{D*! @#<<!#xJIKzDyD{D*! @##L!N m`mmm n9$`nnn  oL\l`oP`poTdtoXhxp(7 oL\l`oP`poTdtoXhx |$48a a*90aJaj@ @* :!' FJFjp@ "Jg<>I5 >I=ˆ ɈB pGpF'H F !xD*F #h0hXh!J"I"KzDyD{D*! @3((F !"F #BhJIKzDyD{D*! @3 F ! #.pJIKzDyD{D*! @3&1hpf5Cn; CoD;BE;𵝰kJ(zDh"h@)>hJ*!hH@3zDxD  Nt`MA}DO)pJ**\J *!zD@N3 2AO)J*+UJ *!@3zD!h #!!*0+?J*!?H@^3zDxDF#!!*0?긳7J*!7H@3zDxD tP(|Bx(x\1DtH`p!B\zT1t#B(?J*!H@r3zDxD wP(B (h\1DHzp!B\jT1#Bp0e21ji%izih(pưHPxxDh hE B hB XB HB 8B (B !B F Dd)(E!hFpM@a}D(hB@Rػ p a*02F`aJ@ajPb aIbyDbB B*0BJ@BjPB`cA BA(h@aB@ (@Op2Fb Xw yK b*@{D`bJ` Fb@,CBJ`dcBF$(B blHB*b(PBvabPBD!BlC0lNLAb0,#Bl L"* "j*"h(`&"JdjJdhPDKHA{DA Fb hB0!*xBj@P0n¨L@* z`0`n`@BJzl`Pfhz``dHv`jb(taJ`rph`,`Fȿ@)oQ(($ &.ho &.`p(`DvFh`h0i (5IM*!IH#}DxD *FfFH#iEJxDzDb8M*!8H#}DxD *FT5H#!h4JxDzDP3M*!3H#}DxD *FB0H#ah/JxDzD>i8 (0M*!0H#}DxD *F,-H#i,JxDzD( j(*M*!*H#}DxD *F&H#!j&JxDzD`j (#M*!#H#}DxD *F H#ajJxDzD *!*FO0 O-κk.X+-ksXs-g"l>,ٺk;,mkU1,YZku4Fj (DM*!DH#}DxD *FAH#!j@JxDzDh`j8 (=M*!=H#}DxD *F:H#aj9JxDzDRi(7M*!7H#}DxD *F3H#i3JxDzD=i (0M*!0H#}DxD *Fl-H#i,JxDzD( i(*M*!*H#}DxD *FV&H#!i&JxDzD`i(#M*!#H#}DxD *FB H#aiJxDzD *!*F4O0 K4j<4jD:3Xj 03-.j(33jM[w3inC""jaBjaiJbibpG𵃰F*H' FxDh0hB P`*)F@*@ A (bhbb lhccc`O` D, T0o1hF@k Fik(lik(lik(lh"(ifhiliP(j6hj* )F  )F@x  pF@H FxDh0h hF(h!hBhjajBO`*jD,jj T0oab )j jB4)j)j)j)j)j)j)j)j)j)j)j)j)j)j)ja liiB |iiB~hhahB1h p ҎpFH@R1xDh(h  dOU0h lp& ")OO8 l( !"#)hpč-CVF$OD846&8Y(8Ah)hBiBiEjE$@F!#b(J*!H@zDxD ^VD6tBl# 8#:"@'(pGY]aeimquy}8 F(IyDQ J*!H#zDxD IPPa) j?JzDR!@lJ*!H#zDxD B.B8 F(IyDQ J*!H#zDxD IPPa) j?JzDR!@0J*!H#zDxD B[BW $(,048<@DHLPT(p(IyD(IyDh(F@=J*!HOszDxD Xr3B-AFF"rA!`h9),JFWzDR!p(F9FrB%J*!%H@kzDxDJ*!H@ezDxD $F hrh PCDRb N(`"/?J#hLzD|DC *!@qO0"h E=EhE}ĽȽ̽нԽؽܽ𽨱((  J*! H@zDxD  ܽ ٽRl(( սٽ#`FؽlFoFF HmFxDh0h(Fe D 1h F,(( ýǽ˽Ͻ( ϽIyDQ ɽʽνҽֽ( ׽۽8"(8"@ @Խؽܽ!`pG)O!"((FF罁C@  8@"&*.26:>F F@;?CGKOSHCV*X\`dhlptx|ľȾ̾оԾؾܾ "#F F@hF ah h !i "#h  ai i iaj "#!j z @-Ohiihn*EKELFM{D|D}DS"T"`U")!!oG!oDoEO &O )x!OGEN`!ugztoI!O !'$%r0FvXF|@FPFHF8F F(FHF8F F(FHF8F F(FHF8F F(FO9tJPzDh"hjFC C TC DC 4$C OB O"O") jF!!hFD(D p@(D!F@߽FD (D(D!F@νFD(D(D!F@pFvD0DxF- @z$Db0D!Fp@pFXD0D\FdEN0D)Fp@FDDDH-HxDP%@F6D D!F@q? 90 :p 5@6` 8 073 201O(4;<8 O        &'O$D XDD PD0CCD9C@ CADXD!F C CCC CCADPD!F)hl{CO-C FFDlDDpD~DtDvDDzFnDDr%FF@PB @uPB @ B @g'@W@m7PDlD)FZHDpD)FR@DtD)FJ8DxD1FBo4 D@D(DD!F2 8D@DDD!FCV-O FF D HDD PDD XDDDFDDFDDFHD)FPD)FXD)FeDD1Fo4 DE,DD!F ,DD!FOp F!@@, @)Fp@ѿFD%(D `$(D!F@-OFFFFpD*PDrhD !DlbD!DdZD!D^. $J*!$H@#zDxD (0M}D,X>PD/ e%=d F, D0J*!H@#zDxD  J*!H@#zDxD O0d-]-ZmD(DF(DD1@2pFDP&0DFd 0D)Fp@pFDP&0DFd%0D)Fp@ pFDP&0DFd50D)Fp@DP!D 0pFDP&0DFde0D)Fp@׽FDT%(D@$(D!F@ý|DT!D FrD$(Dtj(D!F@pF`D 0DdFdV0D)Fp@pFLD 0DPFdAB0D)Fp@hpG`pG-A4H4I5JxDyDzDh hh0h((h(8h(HO@O>$0`tO4(` FO.%I@yD hO `@F"8`OI"hyD h9h`0h((h(*)J*!HJ#zDxD hO0 J*! H6#zDxD Z sssћss𵁰HIJxDKyDzDh{D hhh8h(1h))h)!h)O0hO(hO hO 0`8`(` ` J*! HU#zDxD rrrrw2IM0yD h hD@AR hB :J*!Hv#zDxD `r)GHxDhhpGrHMxDhhD@BQ9h<:J*!H#zDxD r)Os x BгO HxD f HxD HxD HxDHxDh@hP 0#C@ pGqqxqqxqHxDhhpGJqHxDhhpG2qHxDhhpGqFG(DOo4@D(D!F@pFG0DFd0D)Fp@׻F0FdYe0)F@ûFG(D|Oo4@D(D!F@𨻰F0dFdE0)F@𔻰F|0PFdet0)F@Fh0< E,E\0)F@ip FFPG0D"OAb!ADGrC :0D!Fp@Gp FF.G0Do$ eDD0D!Fp@,p FFG0Do$ eDD0D!Fp@pFG0DFd0D)Fp@pFG0DFd0D)Fp@庰FG(DoD(D!F@κFG (D!oT@D(D!F@𴺰F0pFd 0)F@𠺰F0\FdU0)F@Ft0HFdEl0)F@xbP@6@ZP@!F@fFNG(D @@dB(D!F Ԁ600 JI#zDyD *!~ 2 /\F@P @@t@P!F@F@P `F@PFde@P)F@F@PFde@P)F@깰F@PFd^u@P)F@ֹF@PFdUU@P)F@¹Fz@P~FdUr@P)F@𮹰 FFf@Pj- I JyDzDQ%R% @@@L@P!F@F<@P@Fd54@P)F@pF(@P,Fd5 @P)F@\-AFFFFC@Dga @AaAq @D!FA9FCDq`aa`a!``pFC0DFd0D)Fp@pFH0DFd0D)Fp@pFH0DFd0D)Fp@pFH0DFd%0D)Fp@ԸpFH0DFdE0D)Fp@pFH0D|Fd0D)Fp@pFH0DhFd0D)Fp@pFH0DTFdv0D)Fp@pFlH0D@Fdb0D)Fp@ppFXH0D,FdN0D)Fp@\pFDH0DFd:0D)Fp@HpF0H0DFd&0D)Fp@4pFH0DFd0D)Fp@ pFH0DFd0D)Fp@ pFH0DFd0D)Fp@pFH0DFd0D)Fp@pFH0DFd0D)Fp@пpFH0DFd0D)Fp@pFH0DxFd0D)Fp@pFH0DdFd0D)Fp@pF|H0DPFdr0D)Fp@pFhH0D<Fd^0D)Fp@lpFTH0D(FdJ0D)Fp@XpF@H0DFd60D)Fp@DpF,H0DFd"0D)Fp@0FH(DD(D!F@FH(D(D!F@ IC(yD h h@!3"C@pG"gI(yD h h@!"2@!pGgIyD h h@!"rB@pGfIyD h h@!"RB@ @pGfHxDh hd"h@ad@𶾤fFP@pOqq@@pDP@!F@FMDV `IyD h h!`2!pG.fIyD h h!`B!pGfH "xDhhbapGeF($ROQDPH"xDhhb^apGeFP @@tP!F@5FP `FPFduP)F@FPFdeP)F@FPFdEP)F@(4A(D D(D!F@ֽ-OFA@D vFdi~o%1g % )D@DAA AQA a!pAAqO𦽰F^Pb#C?| TD@@@ @ @48P!F@tpF,A$0D0FdU"0D)Fp@`pF_6J !6H#zDxD *!pD(DF(DD1ID0DFd 0D)FD<%(Da@BaaaFa! aJ a a aH@@P!H@@@H@@0H@@ aH@@!H@@C(D!Fp@X ,5n0D)Fp@lp( F$^@"FdV@ pPF`J@FdB@ FV%d0p@oXpF H FxDhV%0&FGpV% `p@QWpF H FxDhV%0FV%d0p@9WpF H FxDhV% 0FV%d 1 0p@!WpF H FxDhV% 0FV%d  0p@ PWpF H FxDhV%0FV%d 10p@ WpF H FxDhV%0FV%bb 0p@ؾVpF H FxDhV%0FV%d0p@VpF H FxDhV%P0xFV%d 1P0p@VpF H FxDhV%P0`FV%d P0p@`VpF H FxDhV%T0HFV%d!T0p@y0VpF H FxDhV%T00FV%bbT0p@`VJzDhR 0VUpF H FxDhV%L0FV%d!L0p@?UpF H FxDhV%L0FV%dL0p@'UpF H FxDhV%H0FV%dH0p@\UIyD hQ 00UIyD hQ 0@UIyD hQ 0TIyD hQ 0@TpFH FxDh0hd, J*!H@ 3zDxD p r-r,F0h"q-q,Fdp@TWMupFH FxDh0hXP, J*!H@!3zDxD pF3he,FFe,FXp@i>TtFb0Fd%0)F@NpFFA&0D FdE<0D)Fp@:pF2A&0DFd (0D)Fp@&pFA&0DFdE0D)Fp@pF A&0DFd 0D)Fp@pFA &0DFd0D)Fp@pFA&0DFd%0D)Fp@ּpFA&0DFd0D)Fp@¼pFA&0D~Fd%0D)Fp@pFA&0DjFd0D)Fp@𚼰FA%(DV @@d(D!F@pF~A&0D@FdEt0D)Fp@qpFjA&0D,Fd`0D)Fp@]pFVA&0DFdEL0D)Fp@IpFBA&0DFd 80D)Fp@5F.PFd $P)F@!F"Fd)F@FA\!DaOq@p FFA\&0D!-@ 0D!Fp@$(OtA$!D!F@ѻ-OFFFFOq A%(D@ F{ `F(D1FzO4W(DjFg (D1FhA%(DZF @ `F(D1FV(DHF` z(D1FFtA%(D6 qo @f(D1F2Y'^(D$FgV(D1F"PA'8DO !o FD8D1F$<8DFd48D)F.A $ DF `" D)FA&0DFG`e0D)F 0DF`E0D)FA'8DFoE8D)F0D  /50D)F8D@1 8D!FPFOp` P!FOĺpFAPrFPPlFdAP)FjdPP1Fp@𒺰F 0NFd 0)F@~FvP:FdnP)F@jFbP& DXP!F@T𵁰%L NFOw~DV5Ih8@ D5DFPFdP)F@$FP `FPFdEP)F@FPFd%P)F@𹰵FPFdP)F@ܹFB(D @@d(D!F@ǹpFB0DFdEv0D)Fp@pFlB0DnFd%b0D)Fp@pFXB0DZFdN0D)Fp@FDB(DF @@d8(D!F@vpF.B0D2FdE$0D)Fp@bpFB0DFd%0D)Fp@NpFB0D Fd0D)Fp@:FB (D @@d(D!F@%pFB 0DFdE0D)Fp@pFB 0DFd%0D)Fp@pFB 0DFd0D)Fp@鸰FB$(D @@d(D!F@ԸpFB$0DFdE0D)Fp@pFxB$0D|Fd%n0D)Fp@pFdB$0DhFdZ0D)Fp@pFPB0DTFH0D%ATB0DFO1 ,O!E40D)F@Ou,Ou(0D, @D 0D)F,%,%0D C0D)FOe,OuB0D @D0D)FO%,O%0D D0D)FOe,O@u0D @D0D)F0DF `0D)FB 0DF `e0D)FO%,O@%0D D0D)FO e,Oe0D @D0D)F %, %~0D Cv0D)FO@e,O ejB$0Dl @D`0D)FlOP%,O`%T0DX DL0D)FXO`e,O0e@0DD @D80D!FD20D6F `(0D!Fp@f-AFB0D D-C0Da 0DF `D0D!F0DF `$0D!F0DF `0D!FBD DOOwO6C0D!F0DF `D0D!F0DF `$0D!F0DF `0D!FBDF `dOOgO&B(D!F(D @z(D!Ft(Dx @@j(D!Fvd(Dj \(D!FhVB0DXFN0D$AXF0DLF `D>0D!FJ80D<F `$.0D!F:(0D.F ` 0D!F,(DF `d(D!F (DF `D(D!F(DF `$(D!F(DF `(D!FA!pFB0D De0D@q0DF `D0D!F0DF `$0D!F0D ,0D!F0DF `D0D!F0DF `$0D!F~0DF `vBD!Fp@pFjB0DlOa @,OaEZ0D)FfO%,O%N0DR DF0D)FROe,Oe:0D> @D20D)F>%,%(0D, @0D!Fp@\pFB0DFd 5 0D)Fp@HpFB0DFd %0D)Fp@4pFB0DFd0D)Fp@ pFB0DFd0D)Fp@ FB(D(D!F@FB D!! `P P!F@ټpFB80DFd %0D)Fp@żpF~B0DFdt0D)Fp@𵁰FhPlFbB8DdF%@@DRP!F^L8DF@@ D`G@ D`G@ , D`G@, D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@L D`G@\| D`G@| D`GA$ D`GA( D`GA, D`GAL D`GAdL D`G@(| D`GA| D`GA| D`GA| D`GA| D`GA D`GA D`GAL D`GAX\ D`G@l D`GA \ D`GA$\ D`GA(\ D`GA,\ D`GA0\ D`GA4\ D`GA8\ D`GA<\ D`GA@\ D`GAD\ D`GAH\ D`GAL\ D`GAP\ D`GAT\ D`GAX\ D`GA\\ D`GA`\ D`GAd\ D`GAh\ D`GAl\ D`GAp\ D`GAt\ D`GAx\ D`GA|\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GA\ D`GAl D`GAl D`GAl D`GA l D`GAl D`GAl D`GAl D`GAl D`GA l D`GA$l D`GA(l D`GA,l D`GA0l D`GA4l D`GA8l D`GA^^NS ((p0  2< O$00"F0:0@ @ t,A,!Y)X)p@ .p@8@@