| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonOptAddrMode.cpp | 413 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses() local
483 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, in changeLoad()
544 bool HexagonOptAddrMode::changeStore(MachineInstr *OldMI, MachineOperand ImmOp, in changeStore()
605 const MachineOperand &ImmOp, in changeAddAsl()
671 const MachineOperand ImmOp = TfrMI->getOperand(1); in xformUseMI() local
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| D | HexagonAsmPrinter.cpp | 255 MCOperand &ImmOp = Inst.getOperand(i); in ScaleVectorOffset() local
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| D | HexagonConstExtenders.cpp | 1761 const MachineOperand &ImmOp = MI.getOperand(IsAddi ? 2 : 1); in replaceInstrExpr() local
1878 MachineOperand &ImmOp = P.first->getOperand(J+1); in replaceInstr() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86CallFrameOptimization.cpp | 291 MachineOperand ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
297 MachineOperand ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
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| D | X86MCInstLower.cpp | 293 unsigned ImmOp = Inst.getNumOperands() - 1; in SimplifyShortImmForm() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVMergeBaseOffset.cpp | 244 MachineOperand &ImmOp = LoADDI.getOperand(2); in detectAndFoldOffset() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/AsmParser/ |
| D | BPFAsmParser.cpp | 91 struct ImmOp { struct
92 const MCExpr *Val;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 54 struct ImmOp { struct
55 const MCExpr *Val;
56 bool LocalRef;
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| D | X86AsmParser.cpp | 2681 const MCExpr *ImmOp = MCConstantExpr::create(ComparisonPredicate, in ParseInstruction() local
2722 const MCExpr *ImmOp = MCConstantExpr::create(ComparisonPredicate, in ParseInstruction() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFMISimplifyPatchable.cpp | 120 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIFoldOperands.cpp | 882 MachineOperand ImmOp = MachineOperand::CreateImm(Imm.getSExtValue()); in foldOperand() local
990 MachineOperand *ImmOp) { in tryConstantFoldOp()
1389 const MachineOperand *ImmOp = nullptr; in isOMod() local
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| D | SIFixSGPRCopies.cpp | 334 const MachineOperand *ImmOp = in isSafeToFoldImmIntoCopy() local
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| D | AMDGPUInstructionSelector.cpp | 1420 MachineOperand &ImmOp = I.getOperand(1); in selectG_CONSTANT() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 235 struct ImmOp { struct in __anon21df661e0211::SparcOperand
236 const MCExpr *Val;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelDAGToDAG.cpp | 241 SDValue ImmOp = Op->getOperand(1); in SelectInlineAsmMemoryOperand() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 654 MachineOperand &ImmOp = MI.getOperand(FrameRegIdx+1); in rewriteT2FrameIndex() local
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| D | ThumbRegisterInfo.cpp | 394 MachineOperand &ImmOp = MI.getOperand(ImmIdx); in rewriteFrameIndex() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/AsmParser/ |
| D | LanaiAsmParser.cpp | 124 struct ImmOp { struct
125 const MCExpr *Value;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 188 struct ImmOp { struct
189 int64_t Val;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/AsmParser/ |
| D | RISCVAsmParser.cpp | 230 struct ImmOp { struct
231 const MCExpr *Val;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 196 struct ImmOp { struct in __anonf20eba280111::AMDGPUOperand
197 int64_t Val;
198 ImmTy Type;
199 bool IsFPImm;
200 Modifiers Mods;
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| D | code-generator-arm64.cc | 2101 #define SIMD_FCM_L_CASE(Op, ImmOp, RegOp) \ in AssembleArchInstruction() argument
2114 #define SIMD_FCM_G_CASE(Op, ImmOp) \ in AssembleArchInstruction() argument
2123 #define SIMD_CM_L_CASE(Op, ImmOp) \ in AssembleArchInstruction() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 848 struct ImmOp { struct in __anon586bbabe0211::MipsOperand
849 const MCExpr *Val;
2836 const MCOperand &ImmOp = Inst.getOperand(1); in expandLoadImm() local
3589 const MCOperand &ImmOp = Inst.getOperand(1); in expandBranchImm() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 1659 MachineOperand &ImmOp = I.getOperand(1); in select() local
3431 MachineOperand &ImmOp = I.getOperand(1); in emitFMovForFConstant() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 348 struct ImmOp { struct in __anon1a2c50be0111::AArch64Operand
349 const MCExpr *Val;
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