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Searched defs:base_reg (Results 1 – 17 of 17) sorted by relevance

/third_party/mesa3d/src/util/
Dregister_allocate.c160 unsigned int base_reg, unsigned int reg) in ra_add_transitive_reg_conflict()
179 unsigned int base_reg, unsigned int reg0, unsigned int reg1) in ra_add_transitive_reg_pair_conflict()
/third_party/mesa3d/src/amd/vulkan/
Dradv_cmd_buffer.c990 uint32_t base_reg = pipeline->user_data_0[stage]; in radv_emit_userdata_address() local
1211 uint32_t base_reg = pipeline->user_data_0[stage]; in radv_emit_inline_push_consts() local
3299 uint32_t base_reg = cmd_buffer->state.graphics_pipeline->base.user_data_0[MESA_SHADER_VERTEX]; in emit_prolog_inputs() local
3890 uint32_t base_reg; in radv_emit_streamout_buffers() local
3993 uint32_t base_reg; in radv_flush_ngg_query_state() local
4024 uint32_t base_reg; in radv_flush_force_vrs_state() local
6564 uint32_t base_reg = pipeline->base.user_data_0[stage]; in radv_emit_view_index_per_stage() local
6580 uint32_t base_reg = R_00B130_SPI_SHADER_USER_DATA_VS_0; in radv_emit_view_index() local
6688 uint32_t base_reg = cmd_buffer->state.graphics_pipeline->vtx_base_sgpr; in radv_cs_emit_indirect_draw_packet() local
6824 uint32_t base_reg = cmd_buffer->state.graphics_pipeline->vtx_base_sgpr; in radv_cs_emit_dispatch_taskmesh_gfx_packet() local
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/third_party/pcre2/pcre2/src/
Dpcre2_jit_simd_inc.h1142 sljit_s32 base_reg, sljit_s32 index_reg) in load_from_mem_vector()
Dpcre2_jit_compile.c2613 int from_sp, base_reg, offset, i; in copy_recurse_data() local
/third_party/node/deps/v8/src/interpreter/
Dinterpreter-assembler.cc263 TNode<IntPtrT> base_reg = RegisterLocation(BytecodeOperandReg(operand_index)); in GetRegisterListAtOperandIndex() local
/third_party/node/deps/v8/src/diagnostics/x64/
Ddisasm-x64.cc346 int base_reg(int low_bits) { return low_bits | ((rex_ & 0x01) << 3); } in base_reg() function in disasm::DisassemblerX64
/third_party/mesa3d/src/freedreno/ir3/
Dir3_spill.c128 struct ir3_register *base_reg; member
/third_party/pcre2/pcre2/src/sljit/
DsljitNativeARM_32.c1024 #define EMIT_DATA_TRANSFER(type, add, target_reg, base_reg, arg) \ argument
/third_party/mesa3d/src/freedreno/decode/
Dcffdec.c1457 const unsigned base_reg = stage == MESA_SHADER_COMPUTE in cp_load_state() local
/third_party/node/deps/v8/src/compiler/backend/loong64/
Dcode-generator-loong64.cc856 Register base_reg = offset.from_stack_pointer() ? sp : fp; in AssembleArchInstruction() local
/third_party/mesa3d/src/microsoft/vulkan/
Ddzn_private.h660 uint32_t *base_reg; member
/third_party/node/deps/v8/src/compiler/backend/riscv64/
Dcode-generator-riscv64.cc888 Register base_reg = offset.from_stack_pointer() ? sp : fp; in AssembleArchInstruction() local
/third_party/node/deps/v8/src/compiler/backend/mips64/
Dcode-generator-mips64.cc865 Register base_reg = offset.from_stack_pointer() ? sp : fp; in AssembleArchInstruction() local
/third_party/node/deps/v8/src/compiler/backend/mips/
Dcode-generator-mips.cc904 Register base_reg = offset.from_stack_pointer() ? sp : fp; in AssembleArchInstruction() local
/third_party/node/deps/v8/src/codegen/x64/
Dassembler-x64.cc177 int base_reg = (has_sib ? operand.data().buf[1] : modrm) & 0x07; in Operand() local
/third_party/node/deps/v8/src/builtins/x64/
Dbuiltins-x64.cc4492 Register base_reg = r15; in CallApiFunctionAndReturn() local
/third_party/node/deps/v8/src/execution/s390/
Dsimulator-s390.cc2982 #define GET_ADDRESS(index_reg, base_reg, offset) \ argument