| /third_party/node/deps/v8/src/interpreter/ |
| D | interpreter-assembler.h | 88 RegListNodePair(TNode<IntPtrT> base_reg_location, TNode<Word32T> reg_count) in RegListNodePair()
91 TNode<Word32T> reg_count() const { return reg_count_; } in reg_count() function
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| D | interpreter-assembler.cc | 264 TNode<Uint32T> reg_count = BytecodeOperandCount(operand_index + 1); in GetRegisterListAtOperandIndex() local
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| /third_party/node/deps/v8/src/compiler/ |
| D | bytecode-analysis.cc | 119 uint32_t reg_count = iterator.GetRegisterCountOperand(i + 1); in UpdateInLivenessForOutOperand() local
177 uint32_t reg_count = iterator.GetRegisterCountOperand(i + 1); in UpdateInLivenessForInOperand() local
438 uint32_t reg_count = iterator.GetRegisterCountOperand(i); in UpdateAssignments() local
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| D | bytecode-graph-builder.cc | 2447 size_t reg_count = bytecode_iterator().GetRegisterCountOperand(2); in BuildCallVarArgs() local
2546 size_t reg_count = bytecode_iterator().GetRegisterCountOperand(2); in VisitCallWithSpread() local
2579 size_t reg_count = bytecode_iterator().GetRegisterCountOperand(2); in VisitCallJSRuntime() local
2592 size_t reg_count) { in ProcessCallRuntimeArguments()
2610 size_t reg_count = bytecode_iterator().GetRegisterCountOperand(2); in VisitCallRuntime() local
2638 size_t reg_count = bytecode_iterator().GetRegisterCountOperand(2); in VisitCallRuntimeForPair() local
2681 size_t reg_count = bytecode_iterator().GetRegisterCountOperand(2); in VisitConstruct() local
2713 size_t reg_count = bytecode_iterator().GetRegisterCountOperand(2); in VisitConstructWithSpread() local
2746 size_t reg_count = bytecode_iterator().GetRegisterCountOperand(2); in VisitInvokeIntrinsic() local
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| /third_party/skia/third_party/externals/spirv-tools/source/opt/ |
| D | register_pressure.cpp | 217 size_t reg_count = live_inout->live_out_.size(); in EvaluateRegisterRequirements() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/opt/ |
| D | register_pressure.cpp | 217 size_t reg_count = live_inout->live_out_.size(); in EvaluateRegisterRequirements() local
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| /third_party/spirv-tools/source/opt/ |
| D | register_pressure.cpp | 216 size_t reg_count = live_inout->live_out_.size(); in EvaluateRegisterRequirements() local
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| /third_party/vixl/test/aarch64/ |
| D | test-utils-aarch64.cc | 492 int reg_count, in PopulateRegisterArray()
523 int reg_count, in PopulateVRegisterArray()
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| D | test-assembler-sve-aarch64.cc | 7341 int reg_count = 2; in TEST_SVE() local
7511 int reg_count = 2; in TEST_SVE() local
7708 int reg_count = 3; in TEST_SVE() local
7918 int reg_count = 3; in TEST_SVE() local
8160 int reg_count = 4; in TEST_SVE() local
8418 int reg_count = 4; in TEST_SVE() local
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| D | test-assembler-aarch64.cc | 7982 static void PushPopSimpleHelper(int reg_count, in PushPopSimpleHelper()
8225 static void PushPopFPSimpleHelper(int reg_count, in PushPopFPSimpleHelper()
8570 static void PushPopWXOverlapHelper(int reg_count, int claim) { in PushPopWXOverlapHelper()
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| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_fs.cpp | 2139 int reg_count = 0; in split_virtual_grfs() local
4565 unsigned reg_count = DIV_ROUND_UP(inst->size_written, REG_SIZE); in get_fpu_lowered_simd_width() local
4608 const unsigned reg_count = DIV_ROUND_UP(inst->size_written, REG_SIZE); in get_fpu_lowered_simd_width() local
5096 const unsigned reg_count = in get_lowered_simd_width() local
7390 brw_register_blocks(int reg_count) in brw_register_blocks()
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| /third_party/backends/backend/ |
| D | rts8891_low.h | 220 SANE_Int reg_count; member
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | register-arm64.h | 331 int reg_count = IsVectorFormat(format) ? LaneCountFromFormat(format) : 1; in Create() local
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3.c | 257 unsigned reg_count, bool double_threadsize) in ir3_get_reg_dependent_max_waves()
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| D | ir3_ra.c | 2326 unsigned reg_count = DIV_ROUND_UP(pressure, 2 * 4); in calc_target_full_pressure() local
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| /third_party/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 1432 int reg_count, in Simulator()
1452 int reg_count, in Simulator()
1741 int reg_count, in Simulator()
1771 int reg_count, in Simulator()
1790 int reg_count, in Simulator()
1833 int reg_count, in Simulator()
7986 int reg_count = 1; in Simulator() local
8254 int reg_count = 0; in Simulator() local
12277 int reg_count = instr->ExtractBits(22, 21) + 1; in Simulator() local
12709 int reg_count = instr->ExtractBits(22, 21) + 1; in Simulator() local
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| D | simulator-aarch64.h | 864 void SetRegCount(int reg_count) { in SetRegCount()
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| D | disasm-aarch64.cc | 6508 int reg_count = instr->ExtractBits(22, 21) + 1; in Disassembler() local
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| D | logic-aarch64.cc | 7230 int reg_count = addr.GetRegCount(); in SVEStructuredStoreHelper() local
7291 int reg_count = addr.GetRegCount(); in SVEStructuredLoadHelper() local
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | ir2_private.h | 179 unsigned reg_count; member
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| /third_party/node/deps/v8/src/maglev/ |
| D | maglev-graph-builder.cc | 643 int reg_count = argc_count_with_recv; in BuildCallFromRegisters() local
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| /third_party/mesa3d/src/util/ |
| D | register_allocate.c | 429 unsigned int reg_count = blob_read_uint32(blob); in ra_set_deserialize() local
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_cmd_buffer.c | 2429 unsigned reg_offset = 0, reg_count = 0; in radv_load_ds_clear_metadata() local
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