| /third_party/vixl/src/aarch32/ |
| D | disasm-aarch32.cc | 1130 Register rn, in adc()
1144 Register rn, in adcs()
1158 Register rn, in add()
1178 Register rn, in adds()
1196 Register rn, in addw()
1220 Register rn, in and_()
1234 Register rn, in ands()
1289 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) { in bfi()
1299 Register rn, in bic()
1313 Register rn, in bics()
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| D | macro-assembler-aarch32.h | 1125 void Adc(Condition cond, Register rd, Register rn, const Operand& operand) { in Assembler()
1143 void Adc(Register rd, Register rn, const Operand& operand) { in Assembler()
1149 Register rn, in Assembler()
1172 Register rn, in Assembler()
1177 void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) { in Assembler()
1191 void Adcs(Register rd, Register rn, const Operand& operand) { in Assembler()
1195 void Add(Condition cond, Register rd, Register rn, const Operand& operand) { in Assembler()
1235 void Add(Register rd, Register rn, const Operand& operand) { in Assembler()
1241 Register rn, in Assembler()
1278 Register rn, in Assembler()
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| D | assembler-aarch32.h | 1891 void adc(Register rd, Register rn, const Operand& operand) { in adc()
1894 void adc(Condition cond, Register rd, Register rn, const Operand& operand) { in adc()
1899 Register rn, in adc()
1909 void adcs(Register rd, Register rn, const Operand& operand) { in adcs()
1912 void adcs(Condition cond, Register rd, Register rn, const Operand& operand) { in adcs()
1917 Register rn, in adcs()
1927 void add(Register rd, Register rn, const Operand& operand) { in add()
1930 void add(Condition cond, Register rd, Register rn, const Operand& operand) { in add()
1935 Register rn, in add()
1948 void adds(Register rd, Register rn, const Operand& operand) { in adds()
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| D | assembler-aarch32.cc | 1926 Register rn, in adc()
2014 Register rn, in adcs()
2102 Register rn, in add()
2351 Register rn, in adds()
2504 Register rn, in addw()
2700 Register rn, in and_()
2788 Register rn, in ands()
3222 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) { in bfi()
3253 Register rn, in bic()
3341 Register rn, in bics()
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| D | operands-aarch32.h | 638 : rn_(rn), in rn_() argument
655 : rn_(rn), in rn_() argument
665 : rn_(rn), in rn_() argument
682 : rn_(rn), in rn_() argument
696 : rn_(rn), in rn_() argument
716 : rn_(rn), in rn_() argument
732 : rn_(rn), in rn_() argument
755 : rn_(rn), in rn_() argument
776 : rn_(rn), in rn_() argument
878 : MemOperand(rn, addrmode), align_(align) { in MemOperand() argument
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | macro-assembler-arm64-inl.h | 24 void TurboAssembler::And(const Register& rd, const Register& rn, in And()
31 void TurboAssembler::Ands(const Register& rd, const Register& rn, in Ands()
38 void TurboAssembler::Tst(const Register& rn, const Operand& operand) { in Tst()
43 void TurboAssembler::Bic(const Register& rd, const Register& rn, in Bic()
50 void MacroAssembler::Bics(const Register& rd, const Register& rn, in Bics()
57 void TurboAssembler::Orr(const Register& rd, const Register& rn, in Orr()
64 void TurboAssembler::Orn(const Register& rd, const Register& rn, in Orn()
71 void TurboAssembler::Eor(const Register& rd, const Register& rn, in Eor()
78 void TurboAssembler::Eon(const Register& rd, const Register& rn, in Eon()
85 void TurboAssembler::Ccmp(const Register& rn, const Operand& operand, in Ccmp()
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| D | assembler-arm64.h | 603 void bfi(const Register& rd, const Register& rn, int lsb, int width) { in bfi()
610 void bfxil(const Register& rd, const Register& rn, int lsb, int width) { in bfxil()
618 void asr(const Register& rd, const Register& rn, int shift) { in asr()
624 void sbfiz(const Register& rd, const Register& rn, int lsb, int width) { in sbfiz()
631 void sbfx(const Register& rd, const Register& rn, int lsb, int width) { in sbfx()
638 void sxtb(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 7); } in sxtb()
641 void sxth(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 15); } in sxth()
644 void sxtw(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 31); } in sxtw()
648 void lsl(const Register& rd, const Register& rn, int shift) { in lsl()
655 void lsr(const Register& rd, const Register& rn, int shift) { in lsr()
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| D | assembler-arm64.cc | 838 void Assembler::add(const Register& rd, const Register& rn, in add()
843 void Assembler::adds(const Register& rd, const Register& rn, in adds()
848 void Assembler::cmn(const Register& rn, const Operand& operand) { in cmn()
853 void Assembler::sub(const Register& rd, const Register& rn, in sub()
858 void Assembler::subs(const Register& rd, const Register& rn, in subs()
863 void Assembler::cmp(const Register& rn, const Operand& operand) { in cmp()
878 void Assembler::adc(const Register& rd, const Register& rn, in adc()
883 void Assembler::adcs(const Register& rd, const Register& rn, in adcs()
888 void Assembler::sbc(const Register& rd, const Register& rn, in sbc()
893 void Assembler::sbcs(const Register& rd, const Register& rn, in sbcs()
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| /third_party/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 783 const Register& rn, in bfi()
796 const Register& rn, in bfxil()
812 void asr(const Register& rd, const Register& rn, unsigned shift) { in asr()
819 const Register& rn, in sbfiz()
832 const Register& rn, in sbfx()
841 void sxtb(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 7); } in sxtb()
844 void sxth(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 15); } in sxth()
847 void sxtw(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 31); } in sxtw()
852 void lsl(const Register& rd, const Register& rn, unsigned shift) { in lsl()
860 void lsr(const Register& rd, const Register& rn, unsigned shift) { in lsr()
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| D | macro-assembler-aarch64.cc | 802 const Register& rn, in Emit()
810 const Register& rn, in Emit()
817 void MacroAssembler::Tst(const Register& rn, const Operand& operand) { in Emit()
824 const Register& rn, in Emit()
832 const Register& rn, in Emit()
840 const Register& rn, in Emit()
848 const Register& rn, in Emit()
856 const Register& rn, in Emit()
864 const Register& rn, in Emit()
872 const Register& rn, in Emit()
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| D | assembler-aarch64.cc | 470 const Register& rn, in add()
477 const Register& rn, in adds()
483 void Assembler::cmn(const Register& rn, const Operand& operand) { in cmn()
490 const Register& rn, in sub()
497 const Register& rn, in subs()
503 void Assembler::cmp(const Register& rn, const Operand& operand) { in cmp()
522 const Register& rn, in adc()
529 const Register& rn, in adcs()
536 const Register& rn, in sbc()
543 const Register& rn, in sbcs()
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| /third_party/f2fs-tools/fsck/ |
| D | node.h | 71 static inline void set_nid(struct f2fs_node * rn, int off, nid_t nid, int i) in set_nid()
79 static inline nid_t get_nid(struct f2fs_node * rn, int off, int i) in get_nid()
164 static inline void set_cold_node(struct f2fs_node *rn, bool is_dir) in set_cold_node()
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| /third_party/vixl/test/aarch32/ |
| D | test-simulator-cond-rd-rn-operand-imm12-t32.cc | 134 Register rn; member
141 uint32_t rn; member
937 Register rn = kTests[i].operands.rn; in TestHelper() local
1007 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-rd-rn-rm-t32.cc | 137 Register rn; member
144 uint32_t rn; member
503 Register rn = kTests[i].operands.rn; in TestHelper() local
577 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-rd-rn-rm-a32.cc | 137 Register rn; member
144 uint32_t rn; member
503 Register rn = kTests[i].operands.rn; in TestHelper() local
577 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-cond-rd-operand-rn-a32.cc | 146 Register rn; member
153 uint32_t rn; member
533 Register rn = kTests[i].operands.rn; in TestHelper() local
625 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-cond-rd-operand-rn-t32.cc | 146 Register rn; member
153 uint32_t rn; member
533 Register rn = kTests[i].operands.rn; in TestHelper() local
625 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-cond-rd-rn-a32.cc | 139 Register rn; member
146 uint32_t rn; member
882 Register rn = kTests[i].operands.rn; in TestHelper() local
973 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-cond-dt-drt-drd-drn-drm-float-f64-t32.cc | 134 DRegister rn; member
142 uint64_t rn; member
1424 DRegister rn = kTests[i].operands.rn; in TestHelper() local
1510 uint64_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-cond-rd-rn-operand-const-a32.cc | 152 Register rn; member
160 uint32_t rn; member
1130 Register rn = kTests[i].operands.rn; in TestHelper() local
1223 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-cond-dt-drt-drd-drn-drm-float-f64-a32.cc | 134 DRegister rn; member
142 uint64_t rn; member
1424 DRegister rn = kTests[i].operands.rn; in TestHelper() local
1510 uint64_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-cond-rd-rn-t32.cc | 139 Register rn; member
146 uint32_t rn; member
882 Register rn = kTests[i].operands.rn; in TestHelper() local
973 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-cond-rd-rn-operand-const-t32.cc | 152 Register rn; member
160 uint32_t rn; member
1154 Register rn = kTests[i].operands.rn; in TestHelper() local
1247 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-cond-rdlow-rnlow-operand-immediate-t32.cc | 138 Register rn; member
146 uint32_t rn; member
983 Register rn = kTests[i].operands.rn; in TestHelper() local
1076 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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| D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 140 Register rn; member
149 uint32_t rn; member
890 Register rn = kTests[i].operands.rn; in TestHelper() local
984 uint32_t rn = results[i]->outputs[j].rn; in TestHelper() local
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