Searched defs:uzp1 (Results 1 – 6 of 6) sorted by relevance
| /third_party/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2478 __ uzp1(v30.V16B(), v9.V16B(), v17.V16B()); in GenerateTestSequenceNEON() local
2479 __ uzp1(v7.V2D(), v26.V2D(), v28.V2D()); in GenerateTestSequenceNEON() local
2480 __ uzp1(v26.V2S(), v16.V2S(), v22.V2S()); in GenerateTestSequenceNEON() local
2481 __ uzp1(v14.V4H(), v19.V4H(), v6.V4H()); in GenerateTestSequenceNEON() local
2482 __ uzp1(v17.V4S(), v23.V4S(), v30.V4S()); in GenerateTestSequenceNEON() local
2483 __ uzp1(v28.V8B(), v27.V8B(), v13.V8B()); in GenerateTestSequenceNEON() local
2484 __ uzp1(v17.V8H(), v1.V8H(), v12.V8H()); in GenerateTestSequenceNEON() local
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| /third_party/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 5509 void Assembler::uzp1(const PRegisterWithLaneSize& pd, in uzp1() function in vixl::aarch64::Assembler
5623 void Assembler::uzp1(const ZRegister& zd, in uzp1() function in vixl::aarch64::Assembler
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| D | assembler-aarch64.cc | 4893 void Assembler::uzp1(const VRegister& vd, in uzp1() function in vixl::aarch64::Assembler
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| D | logic-aarch64.cc | 4392 LogicVRegister Simulator::uzp1(VectorFormat vform, in uzp1() function in vixl::aarch64::Simulator
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | assembler-arm64.cc | 1551 void Assembler::uzp1(const VRegister& vd, const VRegister& vn, in uzp1() function in v8::internal::Assembler
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| /third_party/node/deps/v8/src/execution/arm64/ |
| D | simulator-logic-arm64.cc | 2886 LogicVRegister Simulator::uzp1(VectorFormat vform, LogicVRegister dst, in uzp1() function in v8::internal::Simulator
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