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/kernel/linux/linux-5.10/arch/m68k/math-emu/
Dfp_util.S23 * the restrictions contained in a BSD-style copyright.)
49 * something here. %d0 and %d1 is always usable, sometimes %d2 (or
63 tst.l (TASK_MM-8,%a2)
65 tst.l (TASK_MM-4,%a2)
69 1: printf ,"oops:%p,%p,%p\n",3,%a2@(TASK_MM-8),%a2@(TASK_MM-4),%a2@(TASK_MM)
94 | args: %d0 = source (32-bit long)
98 printf PCONV,"l2e: %p -> %p(",2,%d0,%a0
125 | args: %d0 = source (single-precision fp value)
129 printf PCONV,"s2e: %p -> %p(",2,%d0,%a0
139 add.w #0x3fff-0x7f,%d1 | re-bias the exponent.
[all …]
Dfp_movem.S23 * the restrictions contained in a BSD-style copyright.)
52 btst #11,%d2
54 bfextu %d2{#24,#8},%d0 | static register list
56 1: bfextu %d2{#25,#3},%d0 | dynamic register list
67 btst #12,%d2
69 printf PDECODE,"-" | decremental move
72 2: btst #13,%d2
74 printf PDECODE,"->" | fpu -> cpu
76 1: printf PDECODE,"<-" | fpu <- cpu
135 btst #12,%d2
[all …]
Dfp_decode.h23 * the restrictions contained in a BSD-style copyright.)
46 * d0 - will contain source operand for data direct mode,
48 * d1 - upper 16bit are reserved for caller
51 * d2 - contains first two instruction words,
53 * a0 - will point to source/dest operand for any indirect mode
55 * a1 - scratch register
56 * a2 - base addr to the task structure
73 bfextu %d2{#8,#2},%d0
85 bfextu %d2{#16,#3},%d0
99 bfextu %d2{#19,#3},%d0
[all …]
Dfp_move.S23 * the restrictions contained in a BSD-style copyright.)
82 lea (-8,%a1),%a0
84 move.l %d1,%d2
99 swap %d2
100 move.w %d2,%d0
103 move.w %d2,%d1
111 swap %d2
112 move.w %d2,%d0
115 move.l %d2,%d1
122 swap %d2
[all …]
/kernel/linux/linux-6.6/arch/m68k/math-emu/
Dfp_util.S23 * the restrictions contained in a BSD-style copyright.)
49 * something here. %d0 and %d1 is always usable, sometimes %d2 (or
63 tst.l (TASK_MM-8,%a2)
65 tst.l (TASK_MM-4,%a2)
69 1: printf ,"oops:%p,%p,%p\n",3,%a2@(TASK_MM-8),%a2@(TASK_MM-4),%a2@(TASK_MM)
94 | args: %d0 = source (32-bit long)
98 printf PCONV,"l2e: %p -> %p(",2,%d0,%a0
125 | args: %d0 = source (single-precision fp value)
129 printf PCONV,"s2e: %p -> %p(",2,%d0,%a0
139 add.w #0x3fff-0x7f,%d1 | re-bias the exponent.
[all …]
Dfp_movem.S23 * the restrictions contained in a BSD-style copyright.)
52 btst #11,%d2
54 bfextu %d2{#24,#8},%d0 | static register list
56 1: bfextu %d2{#25,#3},%d0 | dynamic register list
67 btst #12,%d2
69 printf PDECODE,"-" | decremental move
72 2: btst #13,%d2
74 printf PDECODE,"->" | fpu -> cpu
76 1: printf PDECODE,"<-" | fpu <- cpu
135 btst #12,%d2
[all …]
Dfp_decode.h23 * the restrictions contained in a BSD-style copyright.)
46 * d0 - will contain source operand for data direct mode,
48 * d1 - upper 16bit are reserved for caller
51 * d2 - contains first two instruction words,
53 * a0 - will point to source/dest operand for any indirect mode
55 * a1 - scratch register
56 * a2 - base addr to the task structure
73 bfextu %d2{#8,#2},%d0
85 bfextu %d2{#16,#3},%d0
99 bfextu %d2{#19,#3},%d0
[all …]
Dfp_move.S23 * the restrictions contained in a BSD-style copyright.)
82 lea (-8,%a1),%a0
84 move.l %d1,%d2
99 swap %d2
100 move.w %d2,%d0
103 move.w %d2,%d1
111 swap %d2
112 move.w %d2,%d0
115 move.l %d2,%d1
122 swap %d2
[all …]
/kernel/linux/linux-6.6/arch/m68k/lib/
Dudivsi3.S1 /* libgcc1 routines for 68000 w/o floating-point hardware.
33 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
69 #define d2 REG (d2) macro
90 movel d2, sp@-
96 movel d0, d2
97 clrw d2
98 swap d2
99 divu d1, d2 /* high quotient in lower word */
100 movew d2, d0 /* save high quotient */
102 movew sp@(10), d2 /* get low dividend + high rest */
[all …]
/kernel/linux/linux-5.10/arch/m68k/lib/
Dudivsi3.S1 /* libgcc1 routines for 68000 w/o floating-point hardware.
33 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
69 #define d2 REG (d2) macro
90 movel d2, sp@-
96 movel d0, d2
97 clrw d2
98 swap d2
99 divu d1, d2 /* high quotient in lower word */
100 movew d2, d0 /* save high quotient */
102 movew sp@(10), d2 /* get low dividend + high rest */
[all …]
/kernel/linux/linux-6.6/drivers/block/
Dswim_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * low-level functions for the SWIM floppy controller
13 * 2004-08-21 (lv) - Initial implementation
14 * 2008-11-05 (lv) - add get_swim_mode
48 moveml %d1-%d5/%a0-%a4,%sp@-
51 moveml %sp@+, %d1-%d5/%a0-%a4
64 moveq #-1, %d0
65 movew #seek_time, %d2
68 tstb %a3@(read_error - read_mark)
69 moveb #0x18, %a3@(write_mode0 - read_mark)
[all …]
/kernel/linux/linux-5.10/drivers/block/
Dswim_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * low-level functions for the SWIM floppy controller
13 * 2004-08-21 (lv) - Initial implementation
14 * 2008-11-05 (lv) - add get_swim_mode
48 moveml %d1-%d5/%a0-%a4,%sp@-
51 moveml %sp@+, %d1-%d5/%a0-%a4
64 moveq #-1, %d0
65 movew #seek_time, %d2
68 tstb %a3@(read_error - read_mark)
69 moveb #0x18, %a3@(write_mode0 - read_mark)
[all …]
/kernel/linux/linux-6.6/drivers/net/wan/
Dwanxlfw.S1 /* SPDX-License-Identifier: GPL-2.0-only */
14 0x000 - 0x050 TX#0 0x050 - 0x140 RX#0
15 0x140 - 0x190 TX#1 0x190 - 0x280 RX#1
16 0x280 - 0x2D0 TX#2 0x2D0 - 0x3C0 RX#2
17 0x3C0 - 0x410 TX#3 0x410 - 0x500 RX#3
20 000 5FF 1536 Bytes Dual-Port RAM User Data / BDs
21 600 6FF 256 Bytes Dual-Port RAM User Data / BDs
22 700 7FF 256 Bytes Dual-Port RAM User Data / BDs
23 C00 CBF 192 Bytes Dual-Port RAM Parameter RAM Page 1
24 D00 DBF 192 Bytes Dual-Port RAM Parameter RAM Page 2
[all …]
/kernel/linux/linux-5.10/drivers/net/wan/
Dwanxlfw.S1 /* SPDX-License-Identifier: GPL-2.0-only */
14 0x000 - 0x050 TX#0 0x050 - 0x140 RX#0
15 0x140 - 0x190 TX#1 0x190 - 0x280 RX#1
16 0x280 - 0x2D0 TX#2 0x2D0 - 0x3C0 RX#2
17 0x3C0 - 0x410 TX#3 0x410 - 0x500 RX#3
20 000 5FF 1536 Bytes Dual-Port RAM User Data / BDs
21 600 6FF 256 Bytes Dual-Port RAM User Data / BDs
22 700 7FF 256 Bytes Dual-Port RAM User Data / BDs
23 C00 CBF 192 Bytes Dual-Port RAM Parameter RAM Page 1
24 D00 DBF 192 Bytes Dual-Port RAM Parameter RAM Page 2
[all …]
/kernel/linux/linux-6.6/arch/m68k/fpsp040/
Dround.S21 | round --- round result according to precision/mode
36 | a0 is preserved and the g-r-s bits in d0 are cleared.
37 | The result is not typed - the tag field is invalid. The
41 | inexact (i.e. if any of the g-r-s bits were set).
51 | ;the appropriate g-r-s bits.
117 asll #1,%d0 |shift g-bit to c-bit
124 | ext_grs --- extract guard, round and sticky bits
144 moveml %d2/%d3,-(%a7) |make some temp registers
148 bfextu LOCAL_HI(%a0){#24:#2},%d3 |sgl prec. g-r are 2 bits right
149 movel #30,%d2 |of the sgl prec. limits
[all …]
Dbinstr.S5 | Description: Converts a 64-bit binary integer to bcd.
7 | Input: 64-bit binary integer in d2:d3, desired length (LEN) in
12 | Output: LEN bcd digits representing the 64-bit integer.
15 | The 64-bit binary is assumed to have a decimal point before
26 | Copy the fraction in d2:d3 to d4:d5.
28 | A3. Multiply the fraction in d2:d3 by 8 using bit-field
29 | extracts and shifts. The three msbs from d2 will go into
35 | A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5
36 | into d2:d3. D1 will contain the bcd digit formed.
38 | A6. Test d7. If zero, the digit formed is the ms digit. If non-
[all …]
Dsrem_mod.S9 | -----
10 | Double-extended value Y is pointed to by address in register
11 | A0. Double-extended value X is located in -12(A0). The values
17 | ------
21 | ---------
28 | Step 2. Set L := expo(X)-expo(Y), k := 0, Q := 0.
32 | R := 2^(-L)X, j := L.
37 | 3.2 If R > Y, then { R := R - Y, Q := Q + 1}
39 | 3.4 k := k + 1, j := j - 1, Q := 2Q, R := 2R. Go to
42 | Step 4. At this point, R = X - QY = MOD(X,Y). Set
[all …]
/kernel/linux/linux-5.10/arch/m68k/fpsp040/
Dround.S21 | round --- round result according to precision/mode
36 | a0 is preserved and the g-r-s bits in d0 are cleared.
37 | The result is not typed - the tag field is invalid. The
41 | inexact (i.e. if any of the g-r-s bits were set).
51 | ;the appropriate g-r-s bits.
117 asll #1,%d0 |shift g-bit to c-bit
124 | ext_grs --- extract guard, round and sticky bits
144 moveml %d2/%d3,-(%a7) |make some temp registers
148 bfextu LOCAL_HI(%a0){#24:#2},%d3 |sgl prec. g-r are 2 bits right
149 movel #30,%d2 |of the sgl prec. limits
[all …]
Dbinstr.S5 | Description: Converts a 64-bit binary integer to bcd.
7 | Input: 64-bit binary integer in d2:d3, desired length (LEN) in
12 | Output: LEN bcd digits representing the 64-bit integer.
15 | The 64-bit binary is assumed to have a decimal point before
26 | Copy the fraction in d2:d3 to d4:d5.
28 | A3. Multiply the fraction in d2:d3 by 8 using bit-field
29 | extracts and shifts. The three msbs from d2 will go into
35 | A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5
36 | into d2:d3. D1 will contain the bcd digit formed.
38 | A6. Test d7. If zero, the digit formed is the ms digit. If non-
[all …]
Dsrem_mod.S9 | -----
10 | Double-extended value Y is pointed to by address in register
11 | A0. Double-extended value X is located in -12(A0). The values
17 | ------
21 | ---------
28 | Step 2. Set L := expo(X)-expo(Y), k := 0, Q := 0.
32 | R := 2^(-L)X, j := L.
37 | 3.2 If R > Y, then { R := R - Y, Q := Q + 1}
39 | 3.4 k := k + 1, j := j - 1, Q := 2Q, R := 2R. Go to
42 | Step 4. At this point, R = X - QY = MOD(X,Y). Set
[all …]
/kernel/linux/linux-6.6/arch/m68k/ifpsp060/src/
Ditest.S3 M68000 Hi-Performance Microprocessor Division
5 Production Release P1.00 -- October 10, 1994
30 set SREGS, -64
31 set IREGS, -128
32 set SCCR, -130
33 set ICCR, -132
34 set TESTCTR, -136
35 set EAMEM, -140
36 set EASTORE, -144
37 set DATA, -160
[all …]
/kernel/linux/linux-5.10/arch/m68k/ifpsp060/src/
Ditest.S3 M68000 Hi-Performance Microprocessor Division
5 Production Release P1.00 -- October 10, 1994
30 set SREGS, -64
31 set IREGS, -128
32 set SCCR, -130
33 set ICCR, -132
34 set TESTCTR, -136
35 set EAMEM, -140
36 set EASTORE, -144
37 set DATA, -160
[all …]
/kernel/linux/linux-5.10/include/asm-generic/
Dxor.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-generic/xor.h
5 * Generic optimized RAID-5 checksumming functions.
26 } while (--lines > 0); in xor_8regs_2()
47 } while (--lines > 0); in xor_8regs_3()
69 } while (--lines > 0); in xor_8regs_4()
92 } while (--lines > 0); in xor_8regs_5()
101 register long d0, d1, d2, d3, d4, d5, d6, d7; in xor_32regs_2() local
104 d2 = p1[2]; in xor_32regs_2()
112 d2 ^= p2[2]; in xor_32regs_2()
[all …]
/kernel/linux/linux-6.6/arch/s390/crypto/
Dchacha-s390.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Original implementation written by Andy Polyakov, @dot-asm.
6 * Copyright (C) 2006-2019 CRYPTOGAMS by <appro@openssl.org>. All Rights Reserved.
10 #include <asm/nospec-insn.h>
11 #include <asm/vx-insn.h>
20 .long 0x61707865,0x3320646e,0x79622d32,0x6b206574 # endian-neutral
304 aghi LEN,-0x40
330 aghi LEN,-0x40
357 aghi LEN,-0x40
453 #define D2 %v11 macro
[all …]
/kernel/linux/linux-6.6/include/asm-generic/
Dxor.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-generic/xor.h
5 * Generic optimized RAID-5 checksumming functions.
27 } while (--lines > 0); in xor_8regs_2()
49 } while (--lines > 0); in xor_8regs_3()
73 } while (--lines > 0); in xor_8regs_4()
99 } while (--lines > 0); in xor_8regs_5()
109 register long d0, d1, d2, d3, d4, d5, d6, d7; in xor_32regs_2() local
112 d2 = p1[2]; in xor_32regs_2()
120 d2 ^= p2[2]; in xor_32regs_2()
[all …]

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