| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| D | mpic.h | 14 #define MPIC_GREG_BASE 0x01000 16 #define MPIC_GREG_FEATURE_0 0x00000 17 #define MPIC_GREG_FEATURE_LAST_SRC_MASK 0x07ff0000 19 #define MPIC_GREG_FEATURE_LAST_CPU_MASK 0x00001f00 21 #define MPIC_GREG_FEATURE_VERSION_MASK 0xff 22 #define MPIC_GREG_FEATURE_1 0x00010 23 #define MPIC_GREG_GLOBAL_CONF_0 0x00020 24 #define MPIC_GREG_GCONF_RESET 0x80000000 27 * 0b00 = pass through (interrupts routed to IRQ0) 28 * 0b01 = Mixed mode [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | mpic.h | 14 #define MPIC_GREG_BASE 0x01000 16 #define MPIC_GREG_FEATURE_0 0x00000 17 #define MPIC_GREG_FEATURE_LAST_SRC_MASK 0x07ff0000 19 #define MPIC_GREG_FEATURE_LAST_CPU_MASK 0x00001f00 21 #define MPIC_GREG_FEATURE_VERSION_MASK 0xff 22 #define MPIC_GREG_FEATURE_1 0x00010 23 #define MPIC_GREG_GLOBAL_CONF_0 0x00020 24 #define MPIC_GREG_GCONF_RESET 0x80000000 27 * 0b00 = pass through (interrupts routed to IRQ0) 28 * 0b01 = Mixed mode [all …]
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| /kernel/linux/linux-5.10/drivers/i2c/busses/ |
| D | i2c-efm32.c | 17 #define REG_CTRL 0x00 18 #define REG_CTRL_EN 0x00001 19 #define REG_CTRL_SLAVE 0x00002 20 #define REG_CTRL_AUTOACK 0x00004 21 #define REG_CTRL_AUTOSE 0x00008 22 #define REG_CTRL_AUTOSN 0x00010 23 #define REG_CTRL_ARBDIS 0x00020 24 #define REG_CTRL_GCAMEN 0x00040 25 #define REG_CTRL_CLHR__MASK 0x00300 26 #define REG_CTRL_BITO__MASK 0x03000 [all …]
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| /kernel/linux/linux-6.6/arch/parisc/include/uapi/asm/ |
| D | termbits.h | 42 #define VINTR 0 61 #define IUCLC 0x0200 62 #define IXON 0x0400 63 #define IXOFF 0x1000 64 #define IMAXBEL 0x4000 65 #define IUTF8 0x8000 68 #define OLCUC 0x00002 69 #define ONLCR 0x00004 70 #define NLDLY 0x00100 71 #define NL0 0x00000 [all …]
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| /kernel/linux/linux-6.6/include/uapi/asm-generic/ |
| D | termbits.h | 42 #define VINTR 0 61 #define IUCLC 0x0200 62 #define IXON 0x0400 63 #define IXOFF 0x1000 64 #define IMAXBEL 0x2000 65 #define IUTF8 0x4000 68 #define OLCUC 0x00002 69 #define ONLCR 0x00004 70 #define NLDLY 0x00100 71 #define NL0 0x00000 [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amd/ |
| D | amd-seattle-xgbe-b.dtsi | 10 #clock-cells = <0>; 17 #clock-cells = <0>; 24 #clock-cells = <0>; 31 #clock-cells = <0>; 38 reg = <0 0xe0700000 0 0x80000>, 39 <0 0xe0780000 0 0x80000>, 40 <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */ 41 <0 0xe1250000 0 0x00060>, /* SERDES IR 1/2 */ 42 <0 0xe12500f8 0 0x00004>; /* SERDES IR 2/2 */ 43 interrupts = <0 325 4>, [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amd/ |
| D | amd-seattle-xgbe-b.dtsi | 10 #clock-cells = <0>; 17 #clock-cells = <0>; 24 #clock-cells = <0>; 31 #clock-cells = <0>; 38 reg = <0 0xe0700000 0 0x80000>, 39 <0 0xe0780000 0 0x80000>, 40 <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */ 41 <0 0xe1250000 0 0x00060>, /* SERDES IR 1/2 */ 42 <0 0xe12500f8 0 0x00004>; /* SERDES IR 2/2 */ 43 interrupts = <0 325 4>, [all …]
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| /kernel/linux/linux-6.6/arch/mips/include/uapi/asm/ |
| D | termbits.h | 55 #define VINTR 0 /* Interrupt character [ISIG] */ 67 #if 0 81 #define IUCLC 0x0200 /* Map upper case to lower case on input */ 82 #define IXON 0x0400 /* Enable start/stop output control */ 83 #define IXOFF 0x1000 /* Enable start/stop input control */ 84 #define IMAXBEL 0x2000 /* Ring bell when input queue is full */ 85 #define IUTF8 0x4000 /* Input is UTF-8 */ 88 #define OLCUC 0x00002 /* Map lower case to upper case on output */ 89 #define ONLCR 0x00004 /* Map NL to CR-NL on output */ 90 #define NLDLY 0x00100 [all …]
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| /kernel/linux/linux-6.6/arch/x86/events/ |
| D | perf_event_flags.h | 5 PERF_ARCH(PEBS_LDLAT, 0x00001) /* ld+ldlat data address sampling */ 6 PERF_ARCH(PEBS_ST, 0x00002) /* st data address sampling */ 7 PERF_ARCH(PEBS_ST_HSW, 0x00004) /* haswell style datala, store */ 8 PERF_ARCH(PEBS_LD_HSW, 0x00008) /* haswell style datala, load */ 9 PERF_ARCH(PEBS_NA_HSW, 0x00010) /* haswell style datala, unknown */ 10 PERF_ARCH(EXCL, 0x00020) /* HT exclusivity on counter */ 11 PERF_ARCH(DYNAMIC, 0x00040) /* dynamic alloc'd constraint */ 12 /* 0x00080 */ 13 PERF_ARCH(EXCL_ACCT, 0x00100) /* accounted EXCL event */ 14 PERF_ARCH(AUTO_RELOAD, 0x00200) /* use PEBS auto-reload */ [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/arm/ |
| D | malidp_regs.h | 20 #define MALIDP_DE_IRQ_UNDERRUN (1 << 0) 34 #define MALIDP500_SE_IRQ_CONF_MODE (1 << 0) 50 #define MALIDP550_SE_IRQ_EOW (1 << 0) 54 #define MALIDP550_DC_IRQ_CONF_VALID (1 << 0) 67 #define MALIDP_CFG_VALID (1 << 0) 68 #define MALIDP_DISP_FUNC_GAMMA (1 << 0) 75 #define MALIDP_REG_STATUS 0x00000 76 #define MALIDP_REG_SETIRQ 0x00004 77 #define MALIDP_REG_MASKIRQ 0x00008 78 #define MALIDP_REG_CLEARIRQ 0x0000c [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/arm/ |
| D | malidp_regs.h | 20 #define MALIDP_DE_IRQ_UNDERRUN (1 << 0) 34 #define MALIDP500_SE_IRQ_CONF_MODE (1 << 0) 50 #define MALIDP550_SE_IRQ_EOW (1 << 0) 54 #define MALIDP550_DC_IRQ_CONF_VALID (1 << 0) 67 #define MALIDP_CFG_VALID (1 << 0) 68 #define MALIDP_DISP_FUNC_GAMMA (1 << 0) 75 #define MALIDP_REG_STATUS 0x00000 76 #define MALIDP_REG_SETIRQ 0x00004 77 #define MALIDP_REG_MASKIRQ 0x00008 78 #define MALIDP_REG_CLEARIRQ 0x0000c [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/nohash/32/ |
| D | pte-fsl-booke.h | 12 RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR 20 #define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */ 21 #define _PAGE_USER 0x00002 /* S: User page (maps to UR) */ 22 #define _PAGE_RW 0x00004 /* S: Write permission (SW) */ 23 #define _PAGE_DIRTY 0x00008 /* S: Page dirty */ 24 #define _PAGE_EXEC 0x00010 /* H: SX permission */ 25 #define _PAGE_ACCESSED 0x00020 /* S: Page referenced */ 27 #define _PAGE_ENDIAN 0x00040 /* H: E bit */ 28 #define _PAGE_GUARDED 0x00080 /* H: G bit */ 29 #define _PAGE_COHERENT 0x00100 /* H: M bit */ [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/include/asm/nohash/32/ |
| D | pte-85xx.h | 12 RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR 20 #define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */ 21 #define _PAGE_USER 0x00002 /* S: User page (maps to UR) */ 22 #define _PAGE_RW 0x00004 /* S: Write permission (SW) */ 23 #define _PAGE_DIRTY 0x00008 /* S: Page dirty */ 24 #define _PAGE_EXEC 0x00010 /* H: SX permission */ 25 #define _PAGE_ACCESSED 0x00020 /* S: Page referenced */ 27 #define _PAGE_ENDIAN 0x00040 /* H: E bit */ 28 #define _PAGE_GUARDED 0x00080 /* H: G bit */ 29 #define _PAGE_COHERENT 0x00100 /* H: M bit */ [all …]
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| /kernel/linux/linux-5.10/drivers/block/ |
| D | umem.h | 18 #define MEMCTRLSTATUS_MAGIC 0x00 19 #define MM_MAGIC_VALUE (unsigned char)0x59 21 #define MEMCTRLSTATUS_BATTERY 0x04 22 #define BATTERY_1_DISABLED 0x01 23 #define BATTERY_1_FAILURE 0x02 24 #define BATTERY_2_DISABLED 0x04 25 #define BATTERY_2_FAILURE 0x08 27 #define MEMCTRLSTATUS_MEMORY 0x07 28 #define MEM_128_MB 0xfe 29 #define MEM_256_MB 0xfc [all …]
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| /kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/ |
| D | dm-user.h | 22 #define DM_USER_REQ_MAP_READ 0 35 #define DM_USER_REQ_MAP_FLAG_FAILFAST_DEV 0x00001 36 #define DM_USER_REQ_MAP_FLAG_FAILFAST_TRANSPORT 0x00002 37 #define DM_USER_REQ_MAP_FLAG_FAILFAST_DRIVER 0x00004 38 #define DM_USER_REQ_MAP_FLAG_SYNC 0x00008 39 #define DM_USER_REQ_MAP_FLAG_META 0x00010 40 #define DM_USER_REQ_MAP_FLAG_PRIO 0x00020 41 #define DM_USER_REQ_MAP_FLAG_NOMERGE 0x00040 42 #define DM_USER_REQ_MAP_FLAG_IDLE 0x00080 43 #define DM_USER_REQ_MAP_FLAG_INTEGRITY 0x00100 [all …]
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| /kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/ |
| D | dm-user.h | 22 #define DM_USER_REQ_MAP_READ 0 35 #define DM_USER_REQ_MAP_FLAG_FAILFAST_DEV 0x00001 36 #define DM_USER_REQ_MAP_FLAG_FAILFAST_TRANSPORT 0x00002 37 #define DM_USER_REQ_MAP_FLAG_FAILFAST_DRIVER 0x00004 38 #define DM_USER_REQ_MAP_FLAG_SYNC 0x00008 39 #define DM_USER_REQ_MAP_FLAG_META 0x00010 40 #define DM_USER_REQ_MAP_FLAG_PRIO 0x00020 41 #define DM_USER_REQ_MAP_FLAG_NOMERGE 0x00040 42 #define DM_USER_REQ_MAP_FLAG_IDLE 0x00080 43 #define DM_USER_REQ_MAP_FLAG_INTEGRITY 0x00100 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | amd-xgbe.txt | 32 0 - 1GbE and 10GbE (default) 44 0 - Off 55 reg = <0 0xe0700000 0 0x80000>, 56 <0 0xe0780000 0 0x80000>, 57 <0 0xe1240800 0 0x00400>, 58 <0 0xe1250000 0 0x00060>, 59 <0 0xe1250080 0 0x00004>; 61 interrupts = <0 325 4>, 62 <0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>, 63 <0 323 4>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | amd-xgbe.txt | 32 0 - 1GbE and 10GbE (default) 44 0 - Off 55 reg = <0 0xe0700000 0 0x80000>, 56 <0 0xe0780000 0 0x80000>, 57 <0 0xe1240800 0 0x00400>, 58 <0 0xe1250000 0 0x00060>, 59 <0 0xe1250080 0 0x00004>; 61 interrupts = <0 325 4>, 62 <0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>, 63 <0 323 4>; [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/include/uapi/asm/ |
| D | termbits.h | 48 #define VINTR 0 67 #define IXON 0x0200 68 #define IXOFF 0x0400 69 #define IUCLC 0x1000 70 #define IMAXBEL 0x2000 71 #define IUTF8 0x4000 74 #define ONLCR 0x00002 75 #define OLCUC 0x00004 76 #define NLDLY 0x00300 77 #define NL0 0x00000 [all …]
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| /kernel/linux/linux-6.6/arch/alpha/include/uapi/asm/ |
| D | termbits.h | 54 #define VEOF 0 73 #define IXON 0x0200 74 #define IXOFF 0x0400 75 #define IUCLC 0x1000 76 #define IMAXBEL 0x2000 77 #define IUTF8 0x4000 80 #define ONLCR 0x00002 81 #define OLCUC 0x00004 82 #define NLDLY 0x00300 83 #define NL0 0x00000 [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ |
| D | vmmnv04.c | 31 u32 data = addr | 0x00000003; /* PRESENT, RW. */ in nv04_vmm_pgt_pte() 34 data += 0x00001000; in nv04_vmm_pgt_pte() 52 VMM_WO032(pt, vmm, 8 + (ptei++ * 4), *map->dma++ | 0x00000003); in nv04_vmm_pgt_dma() 63 VMM_FO032(pt, vmm, 8 + (ptei * 4), 0, ptes); in nv04_vmm_pgt_unmap() 75 { PGT, 15, 4, 0x1000, &nv04_vmm_desc_pgt }, 96 { 12, &nv04_vmm_desc_12[0], NVKM_VMM_PAGE_HOST }, 135 mem = vmm->pd->pt[0]->memory; in nv04_vmm_new() 137 nvkm_wo32(mem, 0x00000, 0x0002103d); /* PCI, RW, PT, !LN */ in nv04_vmm_new() 138 nvkm_wo32(mem, 0x00004, vmm->limit - 1); in nv04_vmm_new() 140 return 0; in nv04_vmm_new()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ |
| D | vmmnv04.c | 31 u32 data = addr | 0x00000003; /* PRESENT, RW. */ in nv04_vmm_pgt_pte() 34 data += 0x00001000; in nv04_vmm_pgt_pte() 52 VMM_WO032(pt, vmm, 8 + (ptei++ * 4), *map->dma++ | 0x00000003); in nv04_vmm_pgt_dma() 63 VMM_FO032(pt, vmm, 8 + (ptei * 4), 0, ptes); in nv04_vmm_pgt_unmap() 75 { PGT, 15, 4, 0x1000, &nv04_vmm_desc_pgt }, 96 { 12, &nv04_vmm_desc_12[0], NVKM_VMM_PAGE_HOST }, 135 mem = vmm->pd->pt[0]->memory; in nv04_vmm_new() 137 nvkm_wo32(mem, 0x00000, 0x0002103d); /* PCI, RW, PT, !LN */ in nv04_vmm_new() 138 nvkm_wo32(mem, 0x00004, vmm->limit - 1); in nv04_vmm_new() 140 return 0; in nv04_vmm_new()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/v3d/ |
| D | v3d_regs.h | 14 WARN_ON((fieldval & ~field##_MASK) != 0); \ 23 #define V3D_HUB_AXICFG 0x00000 24 # define V3D_HUB_AXICFG_MAX_LEN_MASK V3D_MASK(3, 0) 25 # define V3D_HUB_AXICFG_MAX_LEN_SHIFT 0 26 #define V3D_HUB_UIFCFG 0x00004 27 #define V3D_HUB_IDENT0 0x00008 29 #define V3D_HUB_IDENT1 0x0000c 40 # define V3D_HUB_IDENT1_TVER_MASK V3D_MASK(3, 0) 41 # define V3D_HUB_IDENT1_TVER_SHIFT 0 43 #define V3D_HUB_IDENT2 0x00010 [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/v3d/ |
| D | v3d_regs.h | 14 WARN_ON((fieldval & ~field##_MASK) != 0); \ 23 #define V3D_HUB_AXICFG 0x00000 24 # define V3D_HUB_AXICFG_MAX_LEN_MASK V3D_MASK(3, 0) 25 # define V3D_HUB_AXICFG_MAX_LEN_SHIFT 0 26 #define V3D_HUB_UIFCFG 0x00004 27 #define V3D_HUB_IDENT0 0x00008 29 #define V3D_HUB_IDENT1 0x0000c 40 # define V3D_HUB_IDENT1_TVER_MASK V3D_MASK(3, 0) 41 # define V3D_HUB_IDENT1_TVER_SHIFT 0 43 #define V3D_HUB_IDENT2 0x00010 [all …]
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| /kernel/linux/linux-6.6/include/linux/perf/ |
| D | arm_pmu.h | 27 #define ARMPMU_EVT_64BIT 0x00001 /* Event uses a 64bit counter */ 28 #define ARMPMU_EVT_47BIT 0x00002 /* Event uses a 47bit counter */ 29 #define ARMPMU_EVT_63BIT 0x00004 /* Event uses a 63bit counter */ 35 #define HW_OP_UNSUPPORTED 0xFFFF 37 #define CACHE_OP_UNSUPPORTED 0xFFFF 40 [0 ... PERF_COUNT_HW_MAX - 1] = HW_OP_UNSUPPORTED 43 [0 ... C(MAX) - 1] = { \ 44 [0 ... C(OP_MAX) - 1] = { \ 45 [0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \ 58 * an event. A 0 means that the counter can be used. [all …]
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