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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dci-hdrc-usb2.txt45 aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This
53 "ahb-burst-config" is set to 0, if this property is missing the reset
59 "ahb-burst-config" is set to 0, if this property is missing the reset
64 of the external connector devices is not required, empty <0> phandle should
69 ttctrl.ttha will be 0x7f; if not, the value will be 0x0, this is the default
72 On the most of chipidea platforms, the "usage_tt" flag at RTL is 0, so this
85 controller. It's expected that a mux state of 0 indicates device mode and a
106 The range is from 0x0 to 0x3, the default value is 0x1.
110 The range is from 0x0 to 0xf, the default value is 0x3.
117 reg = <0xf7ed0000 0x10000>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dci-hdrc-usb2.yaml111 AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is
116 minimum: 0x0
117 maximum: 0x7
125 is set to 0, if this property is missing the reset default of the
128 minimum: 0x0
129 maximum: 0x20
137 is set to 0, if this property is missing the reset default of the
140 minimum: 0x0
141 maximum: 0x20
149 required, empty <0> phandle should be specified.
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx6sl.dtsi51 #size-cells = <0>;
53 cpu@0 {
56 reg = <0x0>;
88 #clock-cells = <0>;
94 #clock-cells = <0>;
102 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
107 #phy-cells = <0>;
119 reg = <0x00900000 0x20000>;
120 ranges = <0 0x00900000 0x20000>;
130 reg = <0x00a01000 0x1000>,
[all …]
Dimx6qdl.dtsi59 #clock-cells = <0>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #clock-cells = <0>;
78 #size-cells = <0>;
83 lvds-channel@0 {
85 #size-cells = <0>;
86 reg = <0>;
89 port@0 {
90 reg = <0>;
[all …]
Dimx6sx.dtsi61 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0>;
100 #clock-cells = <0>;
107 #clock-cells = <0>;
114 #clock-cells = <0>;
115 clock-frequency = <0>;
121 #clock-cells = <0>;
122 clock-frequency = <0>;
128 #clock-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx6sl.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x0>;
86 #clock-cells = <0>;
92 #clock-cells = <0>;
100 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
105 #phy-cells = <0>;
117 reg = <0x00900000 0x20000>;
118 ranges = <0 0x00900000 0x20000>;
128 reg = <0x00a01000 0x1000>,
[all …]
Dimx6qdl.dtsi59 #clock-cells = <0>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #clock-cells = <0>;
78 #size-cells = <0>;
83 lvds-channel@0 {
85 #size-cells = <0>;
86 reg = <0>;
89 port@0 {
90 reg = <0>;
[all …]
Dimx6sx.dtsi61 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0>;
100 #clock-cells = <0>;
107 #clock-cells = <0>;
114 #clock-cells = <0>;
115 clock-frequency = <0>;
121 #clock-cells = <0>;
122 clock-frequency = <0>;
128 #clock-cells = <0>;
[all …]