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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/bridge/
Dingenic,jz4780-hdmi.yaml33 port@0:
56 reg = <0x10180000 0x8000>;
65 #size-cells = <0>;
66 hdmi_in: port@0 {
67 reg = <0>;
/kernel/linux/linux-6.6/arch/arm/mach-nomadik/
Dcpu-8815.c17 #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */
18 #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */
19 #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */
20 #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */
21 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */
22 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */
23 #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */
24 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */
25 #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */
26 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Ddwc2.yaml145 reg = <0x10180000 0x40000>;
/kernel/linux/linux-5.10/arch/arm/mach-nomadik/
Dcpu-8815.c30 #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */
31 #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */
32 #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */
33 #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */
34 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */
35 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */
36 #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */
37 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */
38 #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */
39 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */
[all …]
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-ralink/
Drt3883.h15 #define RT3883_SDRAM_BASE 0x00000000
16 #define RT3883_SYSC_BASE IOMEM(0x10000000)
17 #define RT3883_TIMER_BASE 0x10000100
18 #define RT3883_INTC_BASE 0x10000200
19 #define RT3883_MEMC_BASE 0x10000300
20 #define RT3883_UART0_BASE 0x10000500
21 #define RT3883_PIO_BASE 0x10000600
22 #define RT3883_FSCC_BASE 0x10000700
23 #define RT3883_NANDC_BASE 0x10000810
24 #define RT3883_I2C_BASE 0x10000900
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Ddwc2.yaml192 reg = <0x10180000 0x40000>;
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-ralink/
Drt3883.h13 #define RT3883_SDRAM_BASE 0x00000000
14 #define RT3883_SYSC_BASE 0x10000000
15 #define RT3883_TIMER_BASE 0x10000100
16 #define RT3883_INTC_BASE 0x10000200
17 #define RT3883_MEMC_BASE 0x10000300
18 #define RT3883_UART0_BASE 0x10000500
19 #define RT3883_PIO_BASE 0x10000600
20 #define RT3883_FSCC_BASE 0x10000700
21 #define RT3883_NANDC_BASE 0x10000810
22 #define RT3883_I2C_BASE 0x10000900
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Drk3xxx.dtsi43 reg = <0x20018000 0x4000>;
44 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
55 reg = <0x2001c000 0x4000>;
56 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
68 reg = <0x20078000 0x4000>;
82 #clock-cells = <0>;
88 reg = <0x10090000 0x10000>;
99 reg = <0x10138000 0x1000>;
106 reg = <0x1013c000 0x100>;
111 reg = <0x1013c200 0x20>;
[all …]
Drk3036.dtsi33 #size-cells = <0>;
39 reg = <0xf00>;
52 reg = <0xf01>;
65 reg = <0x20078000 0x4000>;
66 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
102 #clock-cells = <0>;
107 reg = <0x10080000 0x2000>;
110 ranges = <0 0x10080000 0x2000>;
112 smp-sram@0 {
114 reg = <0x00 0x10>;
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/ingenic/
Djz4780.dtsi13 #size-cells = <0>;
15 cpu0: cpu@0 {
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 reg = <0>;
26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
35 #address-cells = <0>;
43 reg = <0x10001000 0x50>;
54 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x10000000 0x100>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/
Drk3xxx.dtsi35 #clock-cells = <0>;
41 reg = <0x10090000 0x10000>;
52 reg = <0x10104000 0x800>;
64 reg = <0x10138000 0x1000>;
71 reg = <0x1013c000 0x100>;
76 reg = <0x1013c200 0x20>;
90 reg = <0x1013c600 0x20>;
99 reg = <0x1013d000 0x1000>,
100 <0x1013c100 0x0100>;
105 reg = <0x10124000 0x400>;
[all …]
Drk3036.dtsi34 #size-cells = <0>;
40 reg = <0xf00>;
53 reg = <0xf01>;
84 #clock-cells = <0>;
89 reg = <0x10080000 0x2000>;
92 ranges = <0 0x10080000 0x2000>;
94 smp-sram@0 {
96 reg = <0x00 0x10>;
102 reg = <0x10090000 0x10000>;
122 reg = <0x10108000 0x800>;
[all …]
Drk3128.dtsi29 #size-cells = <0>;
34 reg = <0xf00>;
47 reg = <0xf01>;
53 reg = <0xf02>;
59 reg = <0xf03>;
77 #clock-cells = <0>;
82 reg = <0x100a0000 0x1000>;
87 reg = <0x10139000 0x1000>,
88 <0x1013a000 0x1000>,
89 <0x1013c000 0x2000>,
[all …]