Home
last modified time | relevance | path

Searched +full:0 +full:x11006000 (Results 1 – 25 of 29) sorted by relevance

12

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dpwm-mediatek.txt24 - pinctrl-0: One property must exist for each entry in pinctrl-names.
34 reg = <0 0x11006000 0 0x1000>;
46 pinctrl-0 = <&pwm0_pins>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/
Dmtk-uart.txt29 index 0: an interrupt specifier for the UART controller itself
48 reg = <0x11006000 0x400>;
54 pinctrl-0 = <&uart_pin>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pwm/
Dmediatek,mt2712-pwm.yaml82 reg = <0x11006000 0x1000>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/
Dmediatek,uart.yaml90 pinctrl-0: true
113 reg = <0x11006000 0x400>;
119 pinctrl-0 = <&uart_pin>;
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmt6580.dtsi19 #size-cells = <0>;
21 cpu@0 {
24 reg = <0x0>;
29 reg = <0x1>;
34 reg = <0x2>;
39 reg = <0x3>;
47 #clock-cells = <0>;
53 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x10008000 0x80>;
[all …]
Dmt6589.dtsi19 #size-cells = <0>;
21 cpu@0 {
24 reg = <0x0>;
29 reg = <0x1>;
34 reg = <0x2>;
39 reg = <0x3>;
53 #clock-cells = <0>;
59 #clock-cells = <0>;
65 #clock-cells = <0>;
77 reg = <0x10008000 0x80>;
[all …]
Dmt8135.dtsi42 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x000>;
54 reg = <0x001>;
60 reg = <0x100>;
66 reg = <0x101>;
77 reg = <0 0x80002000 0 0x1000>;
90 #clock-cells = <0>;
96 #clock-cells = <0>;
101 #clock-cells = <0>;
[all …]
Dmt7629.dtsi24 #size-cells = <0>;
27 cpu0: cpu@0 {
30 reg = <0x0>;
38 reg = <0x1>;
51 clk20m: oscillator-0 {
53 #clock-cells = <0>;
60 #clock-cells = <0>;
83 reg = <0x10000000 0x1000>;
89 reg = <0x10002000 0x1000>;
97 reg = <0x10006000 0x1000>;
[all …]
Dmt7623.dtsi73 #size-cells = <0>;
76 cpu0: cpu@0 {
79 reg = <0x0>;
91 reg = <0x1>;
103 reg = <0x2>;
115 reg = <0x3>;
137 #clock-cells = <0>;
142 #clock-cells = <0>;
147 clk26m: oscillator-0 {
149 #clock-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/
Dmt6580.dtsi19 #size-cells = <0>;
21 cpu@0 {
24 reg = <0x0>;
29 reg = <0x1>;
34 reg = <0x2>;
39 reg = <0x3>;
47 #clock-cells = <0>;
53 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x10008000 0x80>;
[all …]
Dmt6589.dtsi19 #size-cells = <0>;
22 cpu@0 {
25 reg = <0x0>;
30 reg = <0x1>;
35 reg = <0x2>;
40 reg = <0x3>;
54 #clock-cells = <0>;
60 #clock-cells = <0>;
66 #clock-cells = <0>;
78 reg = <0x10008000 0x80>;
[all …]
Dmt8135.dtsi42 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x000>;
54 reg = <0x001>;
60 reg = <0x100>;
66 reg = <0x101>;
77 reg = <0 0x80002000 0 0x1000>;
90 #clock-cells = <0>;
96 #clock-cells = <0>;
101 #clock-cells = <0>;
[all …]
Dmt7629.dtsi24 #size-cells = <0>;
27 cpu0: cpu@0 {
30 reg = <0x0>;
38 reg = <0x1>;
51 clk20m: oscillator-0 {
53 #clock-cells = <0>;
60 #clock-cells = <0>;
83 reg = <0x10000000 0x1000>;
89 reg = <0x10002000 0x1000>;
97 reg = <0x10006000 0x1000>;
[all …]
Dmt7623.dtsi73 #size-cells = <0>;
76 cpu0: cpu@0 {
79 reg = <0x0>;
91 reg = <0x1>;
103 reg = <0x2>;
115 reg = <0x3>;
137 #clock-cells = <0>;
142 #clock-cells = <0>;
147 clk26m: oscillator-0 {
149 #clock-cells = <0>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt8516.dtsi21 cluster0_opp: opp-table-0 {
48 #size-cells = <0>;
50 cpu0: cpu@0 {
53 reg = <0x0>;
66 reg = <0x1>;
79 reg = <0x2>;
92 reg = <0x3>;
105 CPU_SLEEP_0_0: cpu-sleep-0-0 {
110 arm,psci-suspend-param = <0x0010000>;
113 CLUSTER_SLEEP_0: cluster-sleep-0 {
[all …]
Dmt7622.dtsi69 #size-cells = <0>;
71 cpu0: cpu@0 {
74 reg = <0x0 0x0>;
88 reg = <0x0 0x1>;
103 #clock-cells = <0>;
108 #clock-cells = <0>;
132 reg = <0 0x43000000 0 0x30000>;
142 thermal-sensors = <&thermal 0>;
208 reg = <0 0x10000000 0 0x1000>;
215 reg = <0 0x10001000 0 0x250>;
[all …]
Dmt2712e.dtsi66 #size-cells = <0>;
85 cpu0: cpu@0 {
88 reg = <0x000>;
100 reg = <0x001>;
113 reg = <0x200>;
126 CPU_SLEEP_0: cpu-sleep-0 {
132 arm,psci-suspend-param = <0x0010000>;
135 CLUSTER_SLEEP_0: cluster-sleep-0 {
141 arm,psci-suspend-param = <0x1010000>;
154 #clock-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt8516.dtsi21 cluster0_opp: opp-table-0 {
48 #size-cells = <0>;
50 cpu0: cpu@0 {
53 reg = <0x0>;
66 reg = <0x1>;
79 reg = <0x2>;
92 reg = <0x3>;
105 CPU_SLEEP_0_0: cpu-sleep-0-0 {
110 arm,psci-suspend-param = <0x0010000>;
113 CLUSTER_SLEEP_0: cluster-sleep-0 {
[all …]
Dmt8365.dtsi21 #size-cells = <0>;
23 cluster0_opp: opp-table-0 {
125 cpu0: cpu@0 {
128 reg = <0x0>;
132 i-cache-size = <0x8000>;
135 d-cache-size = <0x8000>;
148 reg = <0x1>;
152 i-cache-size = <0x8000>;
155 d-cache-size = <0x8000>;
168 reg = <0x2>;
[all …]
Dmt6795.dtsi29 #size-cells = <0>;
31 cpu0: cpu@0 {
35 reg = <0x000>;
44 reg = <0x001>;
59 reg = <0x002>;
74 reg = <0x003>;
89 reg = <0x100>;
104 reg = <0x101>;
119 reg = <0x102>;
134 reg = <0x103>;
[all …]
Dmt7622.dtsi69 #size-cells = <0>;
71 cpu0: cpu@0 {
74 reg = <0x0 0x0>;
89 reg = <0x0 0x1>;
111 #clock-cells = <0>;
116 #clock-cells = <0>;
140 reg = <0 0x43000000 0 0x30000>;
150 thermal-sensors = <&thermal 0>;
216 reg = <0 0x10000000 0 0x1000>;
223 reg = <0 0x10001000 0 0x250>;
[all …]
Dmt2712e.dtsi22 cluster0_opp: opp-table-0 {
66 #size-cells = <0>;
85 cpu0: cpu@0 {
88 reg = <0x000>;
100 reg = <0x001>;
113 reg = <0x200>;
126 CPU_SLEEP_0: cpu-sleep-0 {
132 arm,psci-suspend-param = <0x0010000>;
135 CLUSTER_SLEEP_0: cluster-sleep-0 {
141 arm,psci-suspend-param = <0x1010000>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos7.dtsi45 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu_atlas0: cpu@0 {
55 reg = <0x0>;
62 reg = <0x1>;
69 reg = <0x2>;
76 reg = <0x3>;
84 cpu_off = <0x84000002>;
85 cpu_on = <0xC4000003>;
88 soc: soc@0 {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/
Dexynos7.dtsi45 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu_atlas0: cpu@0 {
55 reg = <0x0>;
57 i-cache-size = <0xc000>;
60 d-cache-size = <0x8000>;
69 reg = <0x1>;
71 i-cache-size = <0xc000>;
74 d-cache-size = <0x8000>;
83 reg = <0x2>;
[all …]
/kernel/linux/linux-5.10/arch/arm/
DKconfig.debug138 0x80000000 | 0xf0000000 | UART0
139 0x80004000 | 0xf0004000 | UART1
140 0x80008000 | 0xf0008000 | UART2
141 0x8000c000 | 0xf000c000 | UART3
142 0x80010000 | 0xf0010000 | UART4
143 0x80014000 | 0xf0014000 | UART5
144 0x80018000 | 0xf0018000 | UART6
145 0x8001c000 | 0xf001c000 | UART7
146 0x80020000 | 0xf0020000 | UART8
147 0x80024000 | 0xf0024000 | UART9
[all …]

12