Home
last modified time | relevance | path

Searched +full:0 +full:x1294 (Results 1 – 25 of 45) sorted by relevance

12

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/
Dsamsung-scaler.yaml75 reg = <0x12800000 0x1294>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpu/
Dsamsung-scaler.yaml75 reg = <0x12800000 0x1294>;
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Dexynos5420.dtsi153 cluster_a15_opp_table: opp-table-0 {
270 reg = <0x10d20000 0x1000>;
271 ranges = <0x0 0x10d20000 0x6000>;
276 reg = <0x4000 0x1000>;
281 reg = <0x5000 0x1000>;
287 reg = <0x10010000 0x30000>;
293 reg = <0x03810000 0x0c>;
303 reg = <0x11000000 0x10000>;
316 #size-cells = <0>;
317 reg = <0x12200000 0x2000>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos5420.dtsi162 reg = <0x10d20000 0x1000>;
163 ranges = <0x0 0x10d20000 0x6000>;
168 reg = <0x4000 0x1000>;
173 reg = <0x5000 0x1000>;
179 reg = <0x10010000 0x30000>;
185 reg = <0x03810000 0x0C>;
195 reg = <0x11000000 0x10000>;
208 #size-cells = <0>;
209 reg = <0x12200000 0x2000>;
212 fifo-depth = <0x40>;
[all …]
/kernel/linux/linux-5.10/drivers/hid/
Dhid-ids.h17 #define USB_VENDOR_ID_258A 0x258a
18 #define USB_DEVICE_ID_258A_6A88 0x6a88
20 #define USB_VENDOR_ID_3M 0x0596
21 #define USB_DEVICE_ID_3M1968 0x0500
22 #define USB_DEVICE_ID_3M2256 0x0502
23 #define USB_DEVICE_ID_3M3266 0x0506
25 #define USB_VENDOR_ID_A4TECH 0x09da
26 #define USB_DEVICE_ID_A4TECH_WCP32PU 0x0006
27 #define USB_DEVICE_ID_A4TECH_X5_005D 0x000a
28 #define USB_DEVICE_ID_A4TECH_RP_649 0x001a
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/microchip/
Dlan743x_main.h15 #define ID_REV (0x00)
16 #define ID_REV_ID_MASK_ (0xFFFF0000)
17 #define ID_REV_ID_LAN7430_ (0x74300000)
18 #define ID_REV_ID_LAN7431_ (0x74310000)
20 (((id_rev) & 0xFFF00000) == 0x74300000)
21 #define ID_REV_CHIP_REV_MASK_ (0x0000FFFF)
22 #define ID_REV_CHIP_REV_A0_ (0x00000000)
23 #define ID_REV_CHIP_REV_B0_ (0x00000010)
25 #define FPGA_REV (0x04)
26 #define FPGA_REV_GET_MINOR_(fpga_rev) (((fpga_rev) >> 8) & 0x000000FF)
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
59 reg = <0x100>;
71 reg = <0x101>;
81 reg = <0x102>;
91 reg = <0x103>;
97 cpu4: cpu@0 {
101 reg = <0x0>;
113 reg = <0x1>;
123 reg = <0x2>;
[all …]
/kernel/linux/linux-6.6/drivers/hid/
Dhid-ids.h17 #define USB_VENDOR_ID_258A 0x258a
18 #define USB_DEVICE_ID_258A_6A88 0x6a88
20 #define USB_VENDOR_ID_3M 0x0596
21 #define USB_DEVICE_ID_3M1968 0x0500
22 #define USB_DEVICE_ID_3M2256 0x0502
23 #define USB_DEVICE_ID_3M3266 0x0506
25 #define USB_VENDOR_ID_A4TECH 0x09da
26 #define USB_DEVICE_ID_A4TECH_WCP32PU 0x0006
27 #define USB_DEVICE_ID_A4TECH_X5_005D 0x000a
28 #define USB_DEVICE_ID_A4TECH_RP_649 0x001a
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
91 reg = <0x100>;
96 i-cache-size = <0x8000>;
99 d-cache-size = <0x8000>;
109 reg = <0x101>;
112 i-cache-size = <0x8000>;
115 d-cache-size = <0x8000>;
125 reg = <0x102>;
128 i-cache-size = <0x8000>;
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/renesas/
Drswitch.h17 for (i = 0; i < RSWITCH_NUM_PORTS; i++) \
23 for (i--; i >= 0; i--) \
38 #define RSWITCH_TOP_OFFSET 0x00008000
39 #define RSWITCH_COMA_OFFSET 0x00009000
40 #define RSWITCH_ETHA_OFFSET 0x0000a000 /* with RMAC */
41 #define RSWITCH_ETHA_SIZE 0x00002000 /* with RMAC */
42 #define RSWITCH_GWCA0_OFFSET 0x00010000
43 #define RSWITCH_GWCA1_OFFSET 0x00012000
49 #define GWCA_INDEX 0
51 #define GWCA_IPV_NUM 0
[all …]
/kernel/linux/linux-6.6/drivers/media/dvb-frontends/
Ddib3000mc.c23 MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
27 MODULE_PARM_DESC(buggy_sfn_workaround, "Enable work-around for buggy SFNs (default: 0)");
33 } while (0)
56 { .addr = state->i2c_addr >> 1, .flags = 0, .len = 2 }, in dib3000mc_read_word()
64 return 0; in dib3000mc_read_word()
66 b[0] = (reg >> 8) | 0x80; in dib3000mc_read_word()
68 b[2] = 0; in dib3000mc_read_word()
69 b[3] = 0; in dib3000mc_read_word()
71 msg[0].buf = b; in dib3000mc_read_word()
86 .addr = state->i2c_addr >> 1, .flags = 0, .len = 4 in dib3000mc_write_word()
[all …]
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Ddib3000mc.c23 MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
27 MODULE_PARM_DESC(buggy_sfn_workaround, "Enable work-around for buggy SFNs (default: 0)");
33 } while (0)
56 { .addr = state->i2c_addr >> 1, .flags = 0, .len = 2 }, in dib3000mc_read_word()
64 return 0; in dib3000mc_read_word()
66 b[0] = (reg >> 8) | 0x80; in dib3000mc_read_word()
68 b[2] = 0; in dib3000mc_read_word()
69 b[3] = 0; in dib3000mc_read_word()
71 msg[0].buf = b; in dib3000mc_read_word()
86 .addr = state->i2c_addr >> 1, .flags = 0, .len = 4 in dib3000mc_write_word()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/microchip/
Dlan743x_main.h15 #define ID_REV (0x00)
16 #define ID_REV_ID_MASK_ (0xFFFF0000)
17 #define ID_REV_ID_LAN7430_ (0x74300000)
18 #define ID_REV_ID_LAN7431_ (0x74310000)
19 #define ID_REV_ID_LAN743X_ (0x74300000)
20 #define ID_REV_ID_A011_ (0xA0110000) // PCI11010
21 #define ID_REV_ID_A041_ (0xA0410000) // PCI11414
22 #define ID_REV_ID_A0X1_ (0xA0010000)
24 ((((id_rev) & 0xFFF00000) == ID_REV_ID_LAN743X_) || \
25 (((id_rev) & 0xFF0F0000) == ID_REV_ID_A0X1_))
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_3_1_4_offset.h31 // base address: 0x0
32 …DPCSSYS_CR0_SUP_DIG_IDCODE_LO 0x0000
33 …DPCSSYS_CR0_SUP_DIG_IDCODE_HI 0x0001
34 …DPCSSYS_CR0_SUP_DIG_REFCLK_OVRD_IN 0x0002
35 …DPCSSYS_CR0_SUP_DIG_MPLLA_DIV_CLK_OVRD_IN 0x0003
36 …DPCSSYS_CR0_SUP_DIG_MPLLA_HDMI_CLK_OVRD_IN 0x0004
37 …DPCSSYS_CR0_SUP_DIG_MPLLB_DIV_CLK_OVRD_IN 0x0005
38 …DPCSSYS_CR0_SUP_DIG_MPLLB_HDMI_CLK_OVRD_IN 0x0006
39 …DPCSSYS_CR0_SUP_DIG_MPLLA_OVRD_IN_0 0x0007
40 …DPCSSYS_CR0_SUP_DIG_MPLLA_OVRD_IN_1 0x0008
[all …]
Ddpcs_4_2_2_offset.h14 // base address: 0x0
15 …DPCSSYS_CR0_DPCSSYS_CR_ADDR 0x2934
17 …DPCSSYS_CR0_DPCSSYS_CR_DATA 0x2935
22 // base address: 0x360
23 …DPCSSYS_CR1_DPCSSYS_CR_ADDR 0x2a0c
25 …DPCSSYS_CR1_DPCSSYS_CR_DATA 0x2a0d
30 // base address: 0x6c0
31 …DPCSSYS_CR2_DPCSSYS_CR_ADDR 0x2ae4
33 …DPCSSYS_CR2_DPCSSYS_CR_DATA 0x2ae5
38 // base address: 0xa20
[all …]
Ddpcs_4_2_0_offset.h27 // base address: 0x0
28 …DPCSSYS_CR0_DPCSSYS_CR_ADDR 0x2934
30 …DPCSSYS_CR0_DPCSSYS_CR_DATA 0x2935
35 // base address: 0x360
36 …DPCSSYS_CR1_DPCSSYS_CR_ADDR 0x2a0c
38 …DPCSSYS_CR1_DPCSSYS_CR_DATA 0x2a0d
43 // base address: 0x6c0
44 …DPCSSYS_CR2_DPCSSYS_CR_ADDR 0x2ae4
46 …DPCSSYS_CR2_DPCSSYS_CR_DATA 0x2ae5
51 // base address: 0xa20
[all …]
Ddpcs_4_2_3_offset.h31 // base address: 0x0
32 …DPCSSYS_CR0_DPCSSYS_CR_ADDR 0x2934
34 …DPCSSYS_CR0_DPCSSYS_CR_DATA 0x2935
39 // base address: 0x360
40 …DPCSSYS_CR1_DPCSSYS_CR_ADDR 0x2a0c
42 …DPCSSYS_CR1_DPCSSYS_CR_DATA 0x2a0d
47 // base address: 0x6c0
48 …DPCSSYS_CR2_DPCSSYS_CR_ADDR 0x2ae4
50 …DPCSSYS_CR2_DPCSSYS_CR_DATA 0x2ae5
55 // base address: 0xa20
[all …]
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8195/
Dmt8195-reg.h13 #define AFE_SRAM_BASE (0x10880000)
14 #define AFE_SRAM_SIZE (0x10000)
16 #define AUDIO_TOP_CON0 (0x0000)
17 #define AUDIO_TOP_CON1 (0x0004)
18 #define AUDIO_TOP_CON2 (0x0008)
19 #define AUDIO_TOP_CON3 (0x000c)
20 #define AUDIO_TOP_CON4 (0x0010)
21 #define AUDIO_TOP_CON5 (0x0014)
22 #define AUDIO_TOP_CON6 (0x0018)
23 #define AFE_MAS_HADDR_MSB (0x0020)
[all …]
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8188/
Dmt8188-reg.h14 #define AUDIO_TOP_CON0 (0x0000)
15 #define AUDIO_TOP_CON1 (0x0004)
16 #define AUDIO_TOP_CON2 (0x0008)
17 #define AUDIO_TOP_CON3 (0x000c)
18 #define AUDIO_TOP_CON4 (0x0010)
19 #define AUDIO_TOP_CON5 (0x0014)
20 #define AUDIO_TOP_CON6 (0x0018)
21 #define AFE_MAS_HADDR_MSB (0x0020)
22 #define AFE_MEMIF_ONE_HEART (0x0024)
23 #define AFE_MUX_SEL_CFG (0x0044)
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h27 // base address: 0x0
28 …PHYPLLA_PIXCLK_RESYNC_CNTL 0x0040
30 …PHYPLLB_PIXCLK_RESYNC_CNTL 0x0041
32 …DP_DTO_DBUF_EN 0x0044
34 …DPREFCLK_CGTT_BLK_CTRL_REG 0x0048
36 …REFCLK_CNTL 0x0049
38 …REFCLK_CGTT_BLK_CTRL_REG 0x004b
40 …DCCG_PERFMON_CNTL2 0x004e
42 …DCCG_DS_DTO_INCR 0x0053
44 …DCCG_DS_DTO_MODULO 0x0054
[all …]
/kernel/linux/linux-6.6/drivers/usb/serial/
Doption.c51 #define OPTION_VENDOR_ID 0x0AF0
52 #define OPTION_PRODUCT_COLT 0x5000
53 #define OPTION_PRODUCT_RICOLA 0x6000
54 #define OPTION_PRODUCT_RICOLA_LIGHT 0x6100
55 #define OPTION_PRODUCT_RICOLA_QUAD 0x6200
56 #define OPTION_PRODUCT_RICOLA_QUAD_LIGHT 0x6300
57 #define OPTION_PRODUCT_RICOLA_NDIS 0x6050
58 #define OPTION_PRODUCT_RICOLA_NDIS_LIGHT 0x6150
59 #define OPTION_PRODUCT_RICOLA_NDIS_QUAD 0x6250
60 #define OPTION_PRODUCT_RICOLA_NDIS_QUAD_LIGHT 0x6350
[all …]
/kernel/linux/linux-5.10/drivers/usb/serial/
Doption.c51 #define OPTION_VENDOR_ID 0x0AF0
52 #define OPTION_PRODUCT_COLT 0x5000
53 #define OPTION_PRODUCT_RICOLA 0x6000
54 #define OPTION_PRODUCT_RICOLA_LIGHT 0x6100
55 #define OPTION_PRODUCT_RICOLA_QUAD 0x6200
56 #define OPTION_PRODUCT_RICOLA_QUAD_LIGHT 0x6300
57 #define OPTION_PRODUCT_RICOLA_NDIS 0x6050
58 #define OPTION_PRODUCT_RICOLA_NDIS_LIGHT 0x6150
59 #define OPTION_PRODUCT_RICOLA_NDIS_QUAD 0x6250
60 #define OPTION_PRODUCT_RICOLA_NDIS_QUAD_LIGHT 0x6350
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h29 // base address: 0x0
30 …DIDT_SQ_CTRL0 0x0000
31 …DIDT_SQ_CTRL2 0x0002
32 …DIDT_SQ_STALL_CTRL 0x0004
33 …DIDT_SQ_TUNING_CTRL 0x0005
34 …DIDT_SQ_STALL_AUTO_RELEASE_CTRL 0x0006
35 …DIDT_SQ_CTRL3 0x0007
36 …DIDT_SQ_STALL_PATTERN_1_2 0x0008
37 …DIDT_SQ_STALL_PATTERN_3_4 0x0009
38 …DIDT_SQ_STALL_PATTERN_5_6 0x000a
[all …]
Dgc_9_1_offset.h24 …SQ_DEBUG_STS_GLOBAL 0x0309
25 …ne mmSQ_DEBUG_STS_GLOBAL_BASE_IDX 0
26 …SQ_DEBUG_STS_GLOBAL2 0x0310
27 …ne mmSQ_DEBUG_STS_GLOBAL2_BASE_IDX 0
28 …SQ_DEBUG_STS_GLOBAL3 0x0311
29 …ne mmSQ_DEBUG_STS_GLOBAL3_BASE_IDX 0
32 // base address: 0x8000
33 …GRBM_CNTL 0x0000
34 …ne mmGRBM_CNTL_BASE_IDX 0
35 …GRBM_SKEW_CNTL 0x0001
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_1_offset.h24 …SQ_DEBUG_STS_GLOBAL 0x0309
25 …ne mmSQ_DEBUG_STS_GLOBAL_BASE_IDX 0
26 …SQ_DEBUG_STS_GLOBAL2 0x0310
27 …ne mmSQ_DEBUG_STS_GLOBAL2_BASE_IDX 0
28 …SQ_DEBUG_STS_GLOBAL3 0x0311
29 …ne mmSQ_DEBUG_STS_GLOBAL3_BASE_IDX 0
32 // base address: 0x8000
33 …GRBM_CNTL 0x0000
34 …ne mmGRBM_CNTL_BASE_IDX 0
35 …GRBM_SKEW_CNTL 0x0001
[all …]

12