| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | ingenic,pinctrl.yaml | 18 which the pin is associated and N is an integer from 0 to 31 identifying the
22 pins. The X2000 and the X2100 contains 5 GPIO ports, PA to PE, for a total of
47 - ingenic,x2100-pinctrl
65 const: 0
68 "^gpio@[0-9]$":
86 - ingenic,x2100-gpio
170 reg = <0x10010000 0x600>;
173 #size-cells = <0>;
175 gpio@0 {
177 reg = <0>;
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-mv78xx0/ |
| D | mv78xx0.h | 20 * f0800000 PCIe #0 I/O space
32 * fee00000 f0800000 64K PCIe #0 I/O space
42 #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
43 #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
44 #define MV78XX0_CORE_REGS_VIRT_BASE IOMEM(0xfe400000)
45 #define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000
48 #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
51 #define MV78XX0_REGS_PHYS_BASE 0xf1000000
52 #define MV78XX0_REGS_VIRT_BASE IOMEM(0xfec00000)
55 #define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000
[all …]
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| /kernel/linux/linux-6.6/arch/arm/mach-mv78xx0/ |
| D | mv78xx0.h | 17 * f0800000 PCIe #0 I/O space
29 * fee00000 f0800000 64K PCIe #0 I/O space
39 #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
40 #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
41 #define MV78XX0_CORE_REGS_VIRT_BASE IOMEM(0xfe400000)
42 #define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000
45 #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
48 #define MV78XX0_REGS_PHYS_BASE 0xf1000000
49 #define MV78XX0_REGS_VIRT_BASE IOMEM(0xfec00000)
52 #define MV78XX0_SRAM_PHYS_BASE (0xf2200000)
[all …]
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| /kernel/linux/linux-5.10/drivers/isdn/hardware/mISDN/ |
| D | hfc_pci.h | 16 #define HFCPCI_BTRANS_THRESMASK 0x00
19 #define PCI_ENA_MEMIO 0x02
20 #define PCI_ENA_MASTER 0x04
23 #define HCFPCI_C_I 0x08
24 #define HFCPCI_TRxR 0x0C
25 #define HFCPCI_MON1_D 0x28
26 #define HFCPCI_MON2_D 0x2C
29 #define HFCPCI_B1_SSL 0x80
30 #define HFCPCI_B2_SSL 0x84
31 #define HFCPCI_AUX1_SSL 0x88
[all …]
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| /kernel/linux/linux-6.6/drivers/isdn/hardware/mISDN/ |
| D | hfc_pci.h | 16 #define HFCPCI_BTRANS_THRESMASK 0x00
19 #define PCI_ENA_MEMIO 0x02
20 #define PCI_ENA_MASTER 0x04
23 #define HCFPCI_C_I 0x08
24 #define HFCPCI_TRxR 0x0C
25 #define HFCPCI_MON1_D 0x28
26 #define HFCPCI_MON2_D 0x2C
29 #define HFCPCI_B1_SSL 0x80
30 #define HFCPCI_B2_SSL 0x84
31 #define HFCPCI_AUX1_SSL 0x88
[all …]
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| /kernel/linux/linux-6.6/arch/mips/generic/ |
| D | board-ingenic.c | 28 return "X2100"; in ingenic_get_system_type()
64 #define INGENIC_CGU_BASE 0x10000000
77 if (offset < 0) in ingenic_force_12M_ext()
94 cgu = ioremap(INGENIC_CGU_BASE, 0x4); in ingenic_force_12M_ext()
114 if (!fdt_node_check_compatible(fdt, 0, "qi,lb60") && in ingenic_fixup_fdt()
115 fdt_path_offset(fdt, "/memory") < 0) in ingenic_fixup_fdt()
116 early_init_dt_add_memory_arch(0, SZ_32M); in ingenic_fixup_fdt()
153 { .compatible = "ingenic,x2100", .data = (void *)MACH_INGENIC_X2100 },
181 return 0; in ingenic_pm_enter()
197 return 0; in ingenic_pm_init()
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | diu.txt | 20 reg = <0x2c000 100>;
28 reg = <0x2100 0x100>;
29 interrupts = <64 0x8>;
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | diu.txt | 20 reg = <0x2c000 100>;
28 reg = <0x2100 0x100>;
29 interrupts = <64 0x8>;
|
| /kernel/linux/linux-5.10/arch/arm/mach-orion5x/ |
| D | orion5x.h | 39 #define ORION5X_REGS_PHYS_BASE 0xf1000000
40 #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000)
43 #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000
44 #define ORION5X_PCIE_IO_BUS_BASE 0x00000000
47 #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000
48 #define ORION5X_PCI_IO_BUS_BASE 0x00010000
51 #define ORION5X_SRAM_PHYS_BASE (0xf2200000)
55 #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000
56 #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000)
59 #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000
[all …]
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| /kernel/linux/linux-6.6/arch/arm/mach-orion5x/ |
| D | orion5x.h | 36 #define ORION5X_REGS_PHYS_BASE 0xf1000000
37 #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000)
40 #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000
41 #define ORION5X_PCIE_IO_BUS_BASE 0x00000000
44 #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000
45 #define ORION5X_PCI_IO_BUS_BASE 0x00010000
48 #define ORION5X_SRAM_PHYS_BASE (0xf2200000)
52 #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000
53 #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000)
56 #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000
[all …]
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| /kernel/linux/linux-6.6/arch/mips/boot/dts/realtek/ |
| D | rtl83xx.dtsi | 14 #address-cells = <0>;
23 ranges = <0x0 0x18000000 0x10000>;
27 reg = <0x2000 0x100>;
44 reg = <0x2100 0x100>;
|
| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | rt5514.h | 15 #define RT5514_DEVICE_ID 0x10ec5514
17 #define RT5514_RESET 0x2000
18 #define RT5514_PWR_ANA1 0x2004
19 #define RT5514_PWR_ANA2 0x2008
20 #define RT5514_I2S_CTRL1 0x2010
21 #define RT5514_I2S_CTRL2 0x2014
22 #define RT5514_VAD_CTRL6 0x2030
23 #define RT5514_EXT_VAD_CTRL 0x206c
24 #define RT5514_DIG_IO_CTRL 0x2070
25 #define RT5514_PAD_CTRL1 0x2080
[all …]
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | rt5514.h | 15 #define RT5514_DEVICE_ID 0x10ec5514
17 #define RT5514_RESET 0x2000
18 #define RT5514_PWR_ANA1 0x2004
19 #define RT5514_PWR_ANA2 0x2008
20 #define RT5514_I2S_CTRL1 0x2010
21 #define RT5514_I2S_CTRL2 0x2014
22 #define RT5514_VAD_CTRL6 0x2030
23 #define RT5514_EXT_VAD_CTRL 0x206c
24 #define RT5514_DIG_IO_CTRL 0x2070
25 #define RT5514_PAD_CTRL1 0x2080
[all …]
|
| /kernel/linux/linux-5.10/drivers/scsi/ufs/ |
| D | ufs-mediatek.h | 15 #define REG_UFS_REFCLK_CTRL 0x144
16 #define REG_UFS_EXTREG 0x2100
17 #define REG_UFS_MPHYCTRL 0x2200
18 #define REG_UFS_REJECT_MON 0x22AC
19 #define REG_UFS_DEBUG_SEL 0x22C0
20 #define REG_UFS_PROBE 0x22C8
27 #define REFCLK_RELEASE 0x0
28 #define REFCLK_REQUEST BIT(0)
52 #define VS_DEBUGCLOCKENABLE 0xD0A1
53 #define VS_SAVEPOWERCONTROL 0xD0A6
[all …]
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| /kernel/linux/linux-6.6/drivers/phy/broadcom/ |
| D | phy-bcm-ns2-pcie.c | 11 #define BLK_ADDR_REG_OFFSET 0x1f
12 #define PLL_AFE1_100MHZ_BLK 0x2100
13 #define PLL_CLK_AMP_OFFSET 0x03
14 #define PLL_CLK_AMP_2P05V 0x2b18
31 return 0; in ns2_pci_phy_init()
66 return 0; in ns2_pci_phy_probe()
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-pcie.dtsi | 8 reg = <0 0x60400000 0 0x1000>;
11 bus-range = <0x0 0x1>;
16 ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
22 <0x101 &gic_its 0x2080 0x1>, /* PF1 */
23 <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */
24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */
25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
26 <0x103 &gic_its 0x2180 0x1>, /* PF3 */
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-pcie.dtsi | 8 reg = <0 0x60400000 0 0x1000>;
11 bus-range = <0x0 0x1>;
16 ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
22 <0x101 &gic_its 0x2080 0x1>, /* PF1 */
23 <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */
24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */
25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
26 <0x103 &gic_its 0x2180 0x1>, /* PF3 */
[all …]
|
| /kernel/linux/linux-5.10/drivers/scsi/arm/ |
| D | cumana_1.c | 39 #define CTRL 0x16fc
40 #define STAT 0x2004
41 #define L(v) (((v)<<16)|((v) & 0x0000ffff))
42 #define H(v) (((v)>>16)|((v) & 0xffff0000))
49 u8 __iomem *dma = hostdata->pdma_io + 0x2000; in cumanascsi_pwrite()
51 if(!len) return 0; in cumanascsi_pwrite()
53 writeb(0x02, base + CTRL); in cumanascsi_pwrite()
60 if(status & 0x80) in cumanascsi_pwrite()
62 if(!(status & 0x40)) in cumanascsi_pwrite()
73 if(len == 0) in cumanascsi_pwrite()
[all …]
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| /kernel/linux/linux-6.6/drivers/scsi/arm/ |
| D | cumana_1.c | 39 #define CTRL 0x16fc
40 #define STAT 0x2004
41 #define L(v) (((v)<<16)|((v) & 0x0000ffff))
42 #define H(v) (((v)>>16)|((v) & 0xffff0000))
49 u8 __iomem *dma = hostdata->pdma_io + 0x2000; in cumanascsi_pwrite()
51 if(!len) return 0; in cumanascsi_pwrite()
53 writeb(0x02, base + CTRL); in cumanascsi_pwrite()
60 if(status & 0x80) in cumanascsi_pwrite()
62 if(!(status & 0x40)) in cumanascsi_pwrite()
73 if(len == 0) in cumanascsi_pwrite()
[all …]
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| /kernel/linux/linux-5.10/drivers/phy/broadcom/ |
| D | phy-bcm-ns2-pcie.c | 21 #define BLK_ADDR_REG_OFFSET 0x1f
22 #define PLL_AFE1_100MHZ_BLK 0x2100
23 #define PLL_CLK_AMP_OFFSET 0x03
24 #define PLL_CLK_AMP_2P05V 0x2b18
43 return 0; in ns2_pci_phy_init()
78 return 0; in ns2_pci_phy_probe()
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/ |
| D | qcom,sm8250-venus.yaml | 113 reg = <0x0aa00000 0xff000>;
129 iommus = <&apps_smmu 0x2100 0x0400>;
|
| /kernel/linux/linux-6.6/drivers/phy/renesas/ |
| D | r8a779f0-ether-serdes.c | 18 #define R8A779F0_ETH_SERDES_OFFSET 0x0400
19 #define R8A779F0_ETH_SERDES_BANK_SELECT 0x03fc
78 for (i = 0; i < R8A779F0_ETH_SERDES_NUM; i++) { in r8a779f0_eth_serdes_common_init_ram()
80 ret = r8a779f0_eth_serdes_reg_wait(channel, 0x026c, 0x180, BIT(0), 0x01); in r8a779f0_eth_serdes_common_init_ram()
85 r8a779f0_eth_serdes_write32(dd->addr, 0x026c, 0x180, 0x03); in r8a779f0_eth_serdes_common_init_ram()
97 r8a779f0_eth_serdes_write32(dd->addr, 0x0244, 0x180, 0x0097); in r8a779f0_eth_serdes_common_setting()
98 r8a779f0_eth_serdes_write32(dd->addr, 0x01d0, 0x180, 0x0060); in r8a779f0_eth_serdes_common_setting()
99 r8a779f0_eth_serdes_write32(dd->addr, 0x01d8, 0x180, 0x2200); in r8a779f0_eth_serdes_common_setting()
100 r8a779f0_eth_serdes_write32(dd->addr, 0x01d4, 0x180, 0x0000); in r8a779f0_eth_serdes_common_setting()
101 r8a779f0_eth_serdes_write32(dd->addr, 0x01e0, 0x180, 0x003d); in r8a779f0_eth_serdes_common_setting()
[all …]
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| /kernel/linux/linux-6.6/include/video/ |
| D | trident.h | 4 #define TRIDENTFB_DEBUG 0
20 #define CYBER9320 0x9320
21 #define CYBER9388 0x9388
22 #define CYBER9382 0x9382 /* the real PCI id for this is 9660 */
23 #define CYBER9385 0x9385 /* ditto */
24 #define CYBER9397 0x9397
25 #define CYBER9397DVD 0x939A
26 #define CYBER9520 0x9520
27 #define CYBER9525DVD 0x9525
28 #define TGUI9440 0x9440
[all …]
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| /kernel/linux/linux-5.10/include/video/ |
| D | trident.h | 4 #define TRIDENTFB_DEBUG 0
20 #define CYBER9320 0x9320
21 #define CYBER9388 0x9388
22 #define CYBER9382 0x9382 /* the real PCI id for this is 9660 */
23 #define CYBER9385 0x9385 /* ditto */
24 #define CYBER9397 0x9397
25 #define CYBER9397DVD 0x939A
26 #define CYBER9520 0x9520
27 #define CYBER9525DVD 0x9525
28 #define TGUI9440 0x9440
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | omap3-overo-common-dvi.dtsi | 13 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
14 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
15 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
16 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
17 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
18 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
19 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
20 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
21 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
22 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
[all …]
|