Home
last modified time | relevance | path

Searched +full:0 +full:x27200 (Results 1 – 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interconnect/
Dqcom,rpmh.yaml99 reg = <0x01380000 0x27200>;
106 reg = <0x01740000 0x1c1000>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interconnect/
Dqcom,rpmh.yaml130 reg = <0x01380000 0x27200>;
137 reg = <0x01740000 0x1c1000>;
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-sdx65.dtsi20 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;
25 reg = <0 0>;
33 #clock-cells = <0>;
40 #clock-cells = <0>;
46 #clock-cells = <0>;
52 #size-cells = <0>;
54 cpu0: cpu@0 {
57 reg = <0x0>;
115 reg = <0x8fcad000 0x40000>;
120 reg = <0x8fcfd000 0x1000>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsdm670.dtsi32 #size-cells = <0>;
34 CPU0: cpu@0 {
37 reg = <0x0 0x0>;
41 qcom,freq-domain = <&cpufreq_hw 0>;
64 reg = <0x0 0x100>;
68 qcom,freq-domain = <&cpufreq_hw 0>;
86 reg = <0x0 0x200>;
90 qcom,freq-domain = <&cpufreq_hw 0>;
108 reg = <0x0 0x300>;
112 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsdm845.dtsi76 #clock-cells = <0>;
83 #clock-cells = <0>;
90 #size-cells = <0>;
92 CPU0: cpu@0 {
95 reg = <0x0 0x0>;
96 clocks = <&cpufreq_hw 0>;
100 qcom,freq-domain = <&cpufreq_hw 0>;
124 reg = <0x0 0x100>;
125 clocks = <&cpufreq_hw 0>;
129 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/cavium/liquidio/
Dlio_ethtool.c211 #define OCTNIC_NCMD_AUTONEG_ON 0x1
212 #define OCTNIC_NCMD_PHY_ON 0x2
269 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
281 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
390 return 0; in lio_get_link_ksettings()
424 return 0; in lio_set_link_ksettings()
431 return 0; in lio_set_link_ksettings()
443 memset(drvinfo, 0, sizeof(struct ethtool_drvinfo)); in lio_get_drvinfo()
459 memset(drvinfo, 0, sizeof(struct ethtool_drvinfo)); in lio_get_vf_drvinfo()
472 int ret = 0; in lio_send_queue_count_update()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/cavium/liquidio/
Dlio_ethtool.c212 #define OCTNIC_NCMD_AUTONEG_ON 0x1
213 #define OCTNIC_NCMD_PHY_ON 0x2
270 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
282 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
391 return 0; in lio_get_link_ksettings()
425 return 0; in lio_set_link_ksettings()
432 return 0; in lio_set_link_ksettings()
444 memset(drvinfo, 0, sizeof(struct ethtool_drvinfo)); in lio_get_drvinfo()
460 memset(drvinfo, 0, sizeof(struct ethtool_drvinfo)); in lio_get_vf_drvinfo()
473 int ret = 0; in lio_send_queue_count_update()
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi73 reg = <0 0x80000000 0 0>;
82 reg = <0 0x85700000 0 0x600000>;
87 reg = <0 0x85e00000 0 0x100000>;
92 reg = <0 0x85fc0000 0 0x20000>;
98 reg = <0x0 0x85fe0000 0 0x20000>;
103 reg = <0x0 0x86000000 0 0x200000>;
108 reg = <0 0x86200000 0 0x2d00000>;
114 reg = <0 0x88f00000 0 0x200000>;
122 reg = <0 0x8ab00000 0 0x1400000>;
127 reg = <0 0x8bf00000 0 0x500000>;
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb4/
Dt4_hw.c54 * at the time it indicated completion is stored there. Returns 0 if the
66 return 0; in t4_wait_op_done_val()
68 if (--attempts == 0) in t4_wait_op_done_val()
167 /* Reset ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
169 * ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
172 t4_write_reg(adap, PCIE_CFG_SPACE_REQ_A, 0); in t4_hw_pci_read_cfg4()
247 log->cursor = 0; in t4_record_mbox()
249 for (i = 0; i < size / 8; i++) in t4_record_mbox()
252 entry->cmd[i++] = 0; in t4_record_mbox()
277 * The return value is 0 on success or a negative errno on failure. A
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb4/
Dt4_hw.c54 * at the time it indicated completion is stored there. Returns 0 if the
66 return 0; in t4_wait_op_done_val()
68 if (--attempts == 0) in t4_wait_op_done_val()
167 /* Reset ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
169 * ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
172 t4_write_reg(adap, PCIE_CFG_SPACE_REQ_A, 0); in t4_hw_pci_read_cfg4()
247 log->cursor = 0; in t4_record_mbox()
249 for (i = 0; i < size / 8; i++) in t4_record_mbox()
252 entry->cmd[i++] = 0; in t4_record_mbox()
277 * The return value is 0 on success or a negative errno on failure. A
[all …]