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/kernel/linux/linux-6.6/drivers/power/supply/
Dmax17040_battery.c22 #define MAX17040_VCELL 0x02
23 #define MAX17040_SOC 0x04
24 #define MAX17040_MODE 0x06
25 #define MAX17040_VER 0x08
26 #define MAX17040_CONFIG 0x0C
27 #define MAX17040_STATUS 0x1A
28 #define MAX17040_CMD 0xFE
33 #define MAX17040_RCOMP_DEFAULT 0x9700
35 #define MAX17040_ATHD_MASK 0x3f
36 #define MAX17040_ALSC_MASK 0x40
[all …]
/kernel/linux/linux-5.10/drivers/misc/habanalabs/include/gaudi/asic_reg/
Dgaudi_blocks.h16 #define mmNIC0_PHY0_BASE 0x0ull
17 #define NIC0_PHY0_MAX_OFFSET 0x9F13
18 #define mmMME0_ACC_BASE 0x7FFC020000ull
19 #define MME0_ACC_MAX_OFFSET 0x5C00
20 #define MME0_ACC_SECTION 0x20000
21 #define mmMME0_SBAB_BASE 0x7FFC040000ull
22 #define MME0_SBAB_MAX_OFFSET 0x5800
23 #define MME0_SBAB_SECTION 0x1000
24 #define mmMME0_PRTN_BASE 0x7FFC041000ull
25 #define MME0_PRTN_MAX_OFFSET 0x5000
[all …]
/kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi/asic_reg/
Dgaudi_blocks.h16 #define mmNIC0_PHY0_BASE 0x0ull
17 #define NIC0_PHY0_MAX_OFFSET 0x9F13
18 #define mmMME0_ACC_BASE 0x7FFC020000ull
19 #define MME0_ACC_MAX_OFFSET 0x5C00
20 #define MME0_ACC_SECTION 0x20000
21 #define mmMME0_SBAB_BASE 0x7FFC040000ull
22 #define MME0_SBAB_MAX_OFFSET 0x5800
23 #define MME0_SBAB_SECTION 0x1000
24 #define mmMME0_PRTN_BASE 0x7FFC041000ull
25 #define MME0_PRTN_MAX_OFFSET 0x5000
[all …]
/kernel/linux/linux-5.10/drivers/power/supply/
Dmax17040_battery.c23 #define MAX17040_VCELL 0x02
24 #define MAX17040_SOC 0x04
25 #define MAX17040_MODE 0x06
26 #define MAX17040_VER 0x08
27 #define MAX17040_CONFIG 0x0C
28 #define MAX17040_STATUS 0x1A
29 #define MAX17040_CMD 0xFE
34 #define MAX17040_RCOMP_DEFAULT 0x9700
36 #define MAX17040_ATHD_MASK 0x3f
37 #define MAX17040_ALSC_MASK 0x40
[all …]
/kernel/linux/linux-6.6/drivers/bus/
Domap_l3_smx.h14 #define L3_COMPONENT 0x000
15 #define L3_CORE 0x018
16 #define L3_AGENT_CONTROL 0x020
17 #define L3_AGENT_STATUS 0x028
18 #define L3_ERROR_LOG 0x058
23 #define L3_ERROR_LOG_ADDR 0x060
26 #define L3_SI_CONTROL 0x020
27 #define L3_SI_FLAG_STATUS_0 0x510
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
95 #define L3_SI_FLAG_STATUS_1 0x530
[all …]
/kernel/linux/linux-5.10/drivers/bus/
Domap_l3_smx.h14 #define L3_COMPONENT 0x000
15 #define L3_CORE 0x018
16 #define L3_AGENT_CONTROL 0x020
17 #define L3_AGENT_STATUS 0x028
18 #define L3_ERROR_LOG 0x058
23 #define L3_ERROR_LOG_ADDR 0x060
26 #define L3_SI_CONTROL 0x020
27 #define L3_SI_FLAG_STATUS_0 0x510
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
95 #define L3_SI_FLAG_STATUS_1 0x530
[all …]
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dlgdt3305.h16 LGDT3305_MPEG_PARALLEL = 0,
21 LGDT3305_TPCLK_RISING_EDGE = 0,
26 LGDT3305_TPCLK_GATED = 0,
31 LGDT3305_TP_VALID_LOW = 0,
36 LGDT3305 = 0,
48 u16 usref_8vsb; /* default: 0x32c4 */
49 u16 usref_qam64; /* default: 0x5400 */
50 u16 usref_qam256; /* default: 0x2a80 */
52 /* disable i2c repeater - 0:repeater enabled 1:repeater disabled */
55 /* spectral inversion - 0:disabled 1:enabled */
[all …]
Dstv6111.c46 { 2572, 0 },
82 { 1548, 0 },
118 { 4870, 0x3000 },
119 { 4850, 0x3C00 },
120 { 4800, 0x4500 },
121 { 4750, 0x4800 },
122 { 4700, 0x4B00 },
123 { 4650, 0x4D00 },
124 { 4600, 0x4F00 },
125 { 4550, 0x5100 },
[all …]
/kernel/linux/linux-6.6/drivers/media/dvb-frontends/
Dlgdt3305.h16 LGDT3305_MPEG_PARALLEL = 0,
21 LGDT3305_TPCLK_RISING_EDGE = 0,
26 LGDT3305_TPCLK_GATED = 0,
31 LGDT3305_TP_VALID_LOW = 0,
36 LGDT3305 = 0,
48 u16 usref_8vsb; /* default: 0x32c4 */
49 u16 usref_qam64; /* default: 0x5400 */
50 u16 usref_qam256; /* default: 0x2a80 */
52 /* disable i2c repeater - 0:repeater enabled 1:repeater disabled */
55 /* spectral inversion - 0:disabled 1:enabled */
[all …]
Dstv6111.c37 { 2572, 0 },
73 { 1548, 0 },
109 { 4870, 0x3000 },
110 { 4850, 0x3C00 },
111 { 4800, 0x4500 },
112 { 4750, 0x4800 },
113 { 4700, 0x4B00 },
114 { 4650, 0x4D00 },
115 { 4600, 0x4F00 },
116 { 4550, 0x5100 },
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Damlogic,aiu.yaml90 reg = <0x5400 0x2ac>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Damlogic,aiu.yaml95 reg = <0x5400 0x2ac>;
/kernel/linux/linux-6.6/drivers/media/usb/gspca/
Dw996Xcf.c53 Return 0 on success, -1 otherwise.
61 if (sd->gspca_dev.usb_err < 0) in w9968cf_write_fsb()
69 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0, in w9968cf_write_fsb()
71 value, 0x06, sd->gspca_dev.usb_buf, 6, 500); in w9968cf_write_fsb()
72 if (ret < 0) { in w9968cf_write_fsb()
80 Return 0 on success, a negative number otherwise.
86 if (sd->gspca_dev.usb_err < 0) in w9968cf_write_sb()
95 usb_sndctrlpipe(sd->gspca_dev.dev, 0), in w9968cf_write_sb()
96 0, in w9968cf_write_sb()
98 value, 0x01, NULL, 0, 500); in w9968cf_write_sb()
[all …]
/kernel/linux/linux-5.10/drivers/media/usb/gspca/
Dw996Xcf.c54 Return 0 on success, -1 otherwise.
62 if (sd->gspca_dev.usb_err < 0) in w9968cf_write_fsb()
70 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0, in w9968cf_write_fsb()
72 value, 0x06, sd->gspca_dev.usb_buf, 6, 500); in w9968cf_write_fsb()
73 if (ret < 0) { in w9968cf_write_fsb()
81 Return 0 on success, a negative number otherwise.
87 if (sd->gspca_dev.usb_err < 0) in w9968cf_write_sb()
96 usb_sndctrlpipe(sd->gspca_dev.dev, 0), in w9968cf_write_sb()
97 0, in w9968cf_write_sb()
99 value, 0x01, NULL, 0, 500); in w9968cf_write_sb()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/amlogic/
Dmeson.dtsi28 reg = <0xc1100000 0x200000>;
31 ranges = <0x0 0xc1100000 0x200000>;
37 reg = <0x4000 0x400>;
44 reg = <0x5400 0x2ac>;
53 reg = <0x7c00 0x200>;
58 reg = <0x8100 0x8>;
63 reg = <0x84c0 0x18>;
71 reg = <0x84dc 0x18>;
78 reg = <0x8500 0x20>;
81 #size-cells = <0>;
[all …]
/kernel/linux/linux-6.6/drivers/regulator/
Dqcom_spmi-regulator.c25 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00
26 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01
27 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02
28 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04
29 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08
30 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10
33 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00
34 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01
35 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02
36 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04
[all …]
/kernel/linux/linux-6.6/arch/mips/include/asm/
Dcpu.h16 register 15, select 0) is defined in this (backwards compatible) way:
24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
28 #define PRID_OPT_MASK 0xff000000
34 #define PRID_COMP_MASK 0xff0000
36 #define PRID_COMP_LEGACY 0x000000
37 #define PRID_COMP_MIPS 0x010000
38 #define PRID_COMP_BROADCOM 0x020000
39 #define PRID_COMP_ALCHEMY 0x030000
40 #define PRID_COMP_SIBYTE 0x040000
41 #define PRID_COMP_SANDCRAFT 0x050000
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/
Dcpu.h16 register 15, select 0) is defined in this (backwards compatible) way:
24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
28 #define PRID_OPT_MASK 0xff000000
34 #define PRID_COMP_MASK 0xff0000
36 #define PRID_COMP_LEGACY 0x000000
37 #define PRID_COMP_MIPS 0x010000
38 #define PRID_COMP_BROADCOM 0x020000
39 #define PRID_COMP_ALCHEMY 0x030000
40 #define PRID_COMP_SIBYTE 0x040000
41 #define PRID_COMP_SANDCRAFT 0x050000
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/amd/
Dariadne.h17 * Publication #16907, Rev. B, Amendment/0, May 1994
62 #define CSR0 0x0000 /* - PCnet-ISA Controller Status */
63 #define CSR1 0x0100 /* - IADR[15:0] */
64 #define CSR2 0x0200 /* - IADR[23:16] */
65 #define CSR3 0x0300 /* - Interrupt Masks and Deferral Control */
66 #define CSR4 0x0400 /* - Test and Features Control */
67 #define CSR6 0x0600 /* RCV/XMT Descriptor Table Length */
68 #define CSR8 0x0800 /* - Logical Address Filter, LADRF[15:0] */
69 #define CSR9 0x0900 /* - Logical Address Filter, LADRF[31:16] */
70 #define CSR10 0x0a00 /* - Logical Address Filter, LADRF[47:32] */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/amd/
Dariadne.h17 * Publication #16907, Rev. B, Amendment/0, May 1994
62 #define CSR0 0x0000 /* - PCnet-ISA Controller Status */
63 #define CSR1 0x0100 /* - IADR[15:0] */
64 #define CSR2 0x0200 /* - IADR[23:16] */
65 #define CSR3 0x0300 /* - Interrupt Masks and Deferral Control */
66 #define CSR4 0x0400 /* - Test and Features Control */
67 #define CSR6 0x0600 /* RCV/XMT Descriptor Table Length */
68 #define CSR8 0x0800 /* - Logical Address Filter, LADRF[15:0] */
69 #define CSR9 0x0900 /* - Logical Address Filter, LADRF[31:16] */
70 #define CSR10 0x0a00 /* - Logical Address Filter, LADRF[47:32] */
[all …]
/kernel/linux/linux-6.6/sound/soc/codecs/
Drt1016.c31 {RT1016_VOL_CTRL_3, 0x8900},
32 {RT1016_ANA_CTRL_1, 0xa002},
33 {RT1016_ANA_CTRL_2, 0x0002},
34 {RT1016_CLOCK_4, 0x6700},
35 {RT1016_CLASSD_3, 0xdc55},
36 {RT1016_CLASSD_4, 0x376a},
37 {RT1016_CLASSD_5, 0x009f},
41 {0x00, 0x0000},
42 {0x01, 0x5400},
43 {0x02, 0x5506},
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Drt1016.c32 {RT1016_VOL_CTRL_3, 0x8900},
33 {RT1016_ANA_CTRL_1, 0xa002},
34 {RT1016_ANA_CTRL_2, 0x0002},
35 {RT1016_CLOCK_4, 0x6700},
36 {RT1016_CLASSD_3, 0xdc55},
37 {RT1016_CLASSD_4, 0x376a},
38 {RT1016_CLASSD_5, 0x009f},
42 {0x00, 0x0000},
43 {0x01, 0x5400},
44 {0x02, 0x5506},
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/mvpp2/
Dmvpp2.h28 #define MVPP2_XDP_PASS 0
29 #define MVPP2_XDP_DROPPED BIT(0)
34 #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
35 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port))
36 #define MVPP2_RX_MIN_PKT_SIZE_REG 0x60
37 #define MVPP2_RX_FIFO_INIT_REG 0x64
38 #define MVPP22_TX_FIFO_THRESH_REG(port) (0x8840 + 4 * (port))
39 #define MVPP22_TX_FIFO_SIZE_REG(port) (0x8860 + 4 * (port))
42 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port))
43 #define MVPP2_RX_LOW_LATENCY_PKT_SIZE(s) (((s) & 0xfff) << 16)
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/mvpp2/
Dmvpp2.h28 #define MVPP2_XDP_PASS 0
29 #define MVPP2_XDP_DROPPED BIT(0)
34 #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
35 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port))
36 #define MVPP2_RX_MIN_PKT_SIZE_REG 0x60
37 #define MVPP2_RX_FIFO_INIT_REG 0x64
38 #define MVPP22_TX_FIFO_THRESH_REG(port) (0x8840 + 4 * (port))
39 #define MVPP22_TX_FIFO_SIZE_REG(port) (0x8860 + 4 * (port))
42 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port))
43 #define MVPP2_RX_LOW_LATENCY_PKT_SIZE(s) (((s) & 0xfff) << 16)
[all …]
/kernel/linux/linux-5.10/drivers/regulator/
Dqcom_spmi-regulator.c24 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00
25 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01
26 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02
27 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04
28 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08
29 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10
32 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00
33 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01
34 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02
35 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04
[all …]

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