| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | stm32mp157.dtsi | 13 reg = <0x59000000 0x800>; 22 reg = <0x5a000000 0x800>; 28 #size-cells = <0>; 33 #size-cells = <0>;
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| D | uniphier-sld8.dtsi | 17 #size-cells = <0>; 19 cpu@0 { 22 reg = <0>; 36 #clock-cells = <0>; 41 #clock-cells = <0>; 56 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 57 <0x506c0000 0x400>; 58 interrupts = <0 174 4>, <0 175 4>; 69 reg = <0x54006000 0x100>; 71 #size-cells = <0>; [all …]
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| D | uniphier-ld4.dtsi | 17 #size-cells = <0>; 19 cpu@0 { 22 reg = <0>; 36 #clock-cells = <0>; 41 #clock-cells = <0>; 56 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 57 <0x506c0000 0x400>; 58 interrupts = <0 174 4>, <0 175 4>; 69 reg = <0x54006000 0x100>; 71 #size-cells = <0>; [all …]
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| /kernel/linux/linux-5.10/arch/h8300/include/asm/ |
| D | traps.h | 22 #define JMP_OP 0x5a000000 23 #define JSR_OP 0x5e000000 26 #define CPU_VECTOR ((unsigned long *)0x000000) 27 #define ADDR_MASK (0xffffff)
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | stm32mp157.dtsi | 13 reg = <0x59000000 0x800>; 22 reg = <0x5a000000 0x800>; 32 #size-cells = <0>; 34 port@0 { 35 reg = <0>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | samsung,s3cmci.txt | 21 - pinctrl-0: Should specify pin control groups used for this controller. 34 pinctrl-0 = <&sdi_pins>; 35 reg = <0x5a000000 0x100000>; 36 interrupts = <0 0 21 3>;
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| D | cdns,sdhci.yaml | 34 # sampling clock. The delay starts from 5ns (for delay parameter equal to 0) 40 minimum: 0 41 maximum: 0x1f 46 minimum: 0 47 maximum: 0x1f 52 minimum: 0 53 maximum: 0x1f 58 minimum: 0 59 maximum: 0x1f 64 minimum: 0 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | socionext,uniphier-mio-dmac.yaml | 52 // In the example below, "interrupts = <0 68 4>, <0 68 4>, ..." is not a 57 reg = <0x5a000000 0x1000>; 58 interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, 59 <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | socionext,uniphier-mio-dmac.yaml | 52 // In the example below, "interrupts = <0 68 4>, <0 68 4>, ..." is not a 57 reg = <0x5a000000 0x1000>; 58 interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, 59 <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | imx8-ss-dma.dtsi | 14 ranges = <0x5a000000 0x0 0x5a000000 0x1000000>; 18 #clock-cells = <0>; 25 reg = <0x5a000000 0x10000>; 27 #size-cells = <0>; 30 clocks = <&spi0_lpcg 0>, 41 reg = <0x5a010000 0x10000>; 43 #size-cells = <0>; 46 clocks = <&spi1_lpcg 0>, 57 reg = <0x5a020000 0x10000>; 59 #size-cells = <0>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | st,stm32-dsi.yaml | 61 port@0: 90 reg = <0x5a000000 0x800>; 98 #size-cells = <0>; 102 #size-cells = <0>; 104 port@0 { 105 reg = <0>; 119 panel-dsi@0 { 121 reg = <0>;
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| /kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
| D | map-s3c24xx.h | 19 #define S3C2410_PA_IRQ (0x4A000000) 23 #define S3C2410_PA_MEMCTRL (0x48000000) 27 #define S3C2410_PA_TIMER (0x51000000) 34 #define S3C2410_PA_USBDEV (0x52000000) 38 #define S3C2410_PA_WATCHDOG (0x53000000) 52 #define S3C2410_PA_USBHOST (0x49000000) 55 #define S3C2416_PA_HSUDC (0x49800000) 59 #define S3C2410_PA_DMA (0x4B000000) 63 #define S3C2410_PA_CLKPWR (0x4C000000) 66 #define S3C2410_PA_LCD (0x4D000000) [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ |
| D | st,stm32-dsi.yaml | 55 port@0: 93 reg = <0x5a000000 0x800>; 101 #size-cells = <0>; 105 #size-cells = <0>; 107 port@0 { 108 reg = <0>; 122 panel@0 { 124 reg = <0>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/ |
| D | cdns,sdhci.yaml | 36 # sampling clock. The delay starts from 5ns (for delay parameter equal to 0) 42 minimum: 0 43 maximum: 0x1f 48 minimum: 0 49 maximum: 0x1f 54 minimum: 0 55 maximum: 0x1f 60 minimum: 0 61 maximum: 0x1f 66 minimum: 0 [all …]
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| /kernel/linux/linux-6.6/crypto/ |
| D | michael_mic.c | 30 return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8); in xswap() 44 } while (0) 51 mctx->pending_len = 0; in michael_init() 55 return 0; in michael_init() 74 return 0; in michael_update() 78 mctx->pending_len = 0; in michael_update() 88 if (len > 0) { in michael_update() 93 return 0; in michael_update() 102 /* Last block and padding (0x5a, 4..7 x 0) */ in michael_final() 104 case 0: in michael_final() [all …]
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| /kernel/linux/linux-5.10/crypto/ |
| D | michael_mic.c | 30 return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8); in xswap() 44 } while (0) 51 mctx->pending_len = 0; in michael_init() 55 return 0; in michael_init() 74 return 0; in michael_update() 78 mctx->pending_len = 0; in michael_update() 88 if (len > 0) { in michael_update() 93 return 0; in michael_update() 102 /* Last block and padding (0x5a, 4..7 x 0) */ in michael_final() 104 case 0: in michael_final() [all …]
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| /kernel/linux/linux-5.10/drivers/watchdog/ |
| D | bcm2835_wdt.c | 23 #define PM_RSTC 0x1c 24 #define PM_RSTS 0x20 25 #define PM_WDOG 0x24 27 #define PM_PASSWORD 0x5a000000 29 #define PM_WDOG_TIME_SET 0x000fffff 30 #define PM_RSTC_WRCFG_CLR 0xffffffcf 31 #define PM_RSTS_HADWRH_SET 0x00000040 32 #define PM_RSTC_WRCFG_SET 0x00000030 33 #define PM_RSTC_WRCFG_FULL_RESET 0x00000020 34 #define PM_RSTC_RESET 0x00000102 [all …]
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| /kernel/linux/linux-6.6/drivers/watchdog/ |
| D | bcm2835_wdt.c | 23 #define PM_RSTC 0x1c 24 #define PM_RSTS 0x20 25 #define PM_WDOG 0x24 27 #define PM_PASSWORD 0x5a000000 29 #define PM_WDOG_TIME_SET 0x000fffff 30 #define PM_RSTC_WRCFG_CLR 0xffffffcf 31 #define PM_RSTS_HADWRH_SET 0x00000040 32 #define PM_RSTC_WRCFG_SET 0x00000030 33 #define PM_RSTC_WRCFG_FULL_RESET 0x00000020 34 #define PM_RSTC_RESET 0x00000102 [all …]
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| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | cs35l45.h | 20 #define CS35L45_DEVID 0x00000000 21 #define CS35L45_REVID 0x00000004 22 #define CS35L45_RELID 0x0000000C 23 #define CS35L45_OTPID 0x00000010 24 #define CS35L45_SFT_RESET 0x00000020 25 #define CS35L45_GLOBAL_ENABLES 0x00002014 26 #define CS35L45_BLOCK_ENABLES 0x00002018 27 #define CS35L45_BLOCK_ENABLES2 0x0000201C 28 #define CS35L45_ERROR_RELEASE 0x00002034 29 #define CS35L45_SYNC_GPIO1 0x00002430 [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | omap4.dtsi | 40 #size-cells = <0>; 42 cpu@0 { 46 reg = <0x0>; 57 reg = <0x1>; 67 reg = <0x40304000 0xa000>; /* 40k */ 74 reg = <0x48241000 0x1000>, 75 <0x48240100 0x0100>; 81 reg = <0x48242000 0x1000>; 89 reg = <0x48240600 0x20>; 98 reg = <0x48281000 0x1000>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/socionext/ |
| D | uniphier-ld4.dtsi | 18 #size-cells = <0>; 20 cpu@0 { 23 reg = <0>; 37 #clock-cells = <0>; 42 #clock-cells = <0>; 57 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 58 <0x506c0000 0x400>; 71 reg = <0x54006000 0x100>; 73 #size-cells = <0>; 76 pinctrl-0 = <&pinctrl_spi0>; [all …]
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| D | uniphier-sld8.dtsi | 18 #size-cells = <0>; 20 cpu@0 { 23 reg = <0>; 37 #clock-cells = <0>; 42 #clock-cells = <0>; 57 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 58 <0x506c0000 0x400>; 71 reg = <0x54006000 0x100>; 73 #size-cells = <0>; 76 pinctrl-0 = <&pinctrl_spi0>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/mach-omap2/ |
| D | iomap.h | 33 #define OMAP2_L3_IO_OFFSET 0x90000000 36 #define OMAP2_L4_IO_OFFSET 0xb2000000 39 #define OMAP4_L3_IO_OFFSET 0xb4000000 42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000 45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000 48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */ 58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/ 61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */ 65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */ 70 /* 0x6e000000 --> 0xfe000000 */ [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | iomap.h | 33 #define OMAP2_L3_IO_OFFSET 0x90000000 36 #define OMAP2_L4_IO_OFFSET 0xb2000000 39 #define OMAP4_L3_IO_OFFSET 0xb4000000 42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000 45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000 48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */ 58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/ 61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */ 65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */ 70 /* 0x6e000000 --> 0xfe000000 */ [all …]
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| /kernel/linux/linux-6.6/drivers/pmdomain/bcm/ |
| D | bcm2835-power.c | 19 #define PM_GNRIC 0x00 20 #define PM_AUDIO 0x04 21 #define PM_STATUS 0x18 22 #define PM_RSTC 0x1c 23 #define PM_RSTS 0x20 24 #define PM_WDOG 0x24 25 #define PM_PADS0 0x28 26 #define PM_PADS2 0x2c 27 #define PM_PADS3 0x30 28 #define PM_PADS4 0x34 [all …]
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