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/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Dvr1000.h14 #define VR1000_CPLD_CTRL2_RAMWEN (0x04) /* SRAM Write Enable */
28 #define VR1000_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000))
32 #define VR1000_VA_CTRL1 VR1000_IOADDR(0x00000000) /* 0x01300000 */
33 #define VR1000_PA_CTRL1 (S3C2410_CS5 | 0x7800000)
35 #define VR1000_VA_CTRL2 VR1000_IOADDR(0x00100000) /* 0x01400000 */
36 #define VR1000_PA_CTRL2 (S3C2410_CS1 | 0x6000000)
38 #define VR1000_VA_CTRL3 VR1000_IOADDR(0x00200000) /* 0x01500000 */
39 #define VR1000_PA_CTRL3 (S3C2410_CS1 | 0x6800000)
41 #define VR1000_VA_CTRL4 VR1000_IOADDR(0x00300000) /* 0x01600000 */
42 #define VR1000_PA_CTRL4 (S3C2410_CS1 | 0x7000000)
[all …]
Dbast.h16 #define BAST_CPLD_CTRL1_LRCOFF (0x00)
17 #define BAST_CPLD_CTRL1_LRCADC (0x01)
18 #define BAST_CPLD_CTRL1_LRCDAC (0x02)
19 #define BAST_CPLD_CTRL1_LRCARM (0x03)
20 #define BAST_CPLD_CTRL1_LRMASK (0x03)
24 #define BAST_CPLD_CTRL2_WNAND (0x04)
25 #define BAST_CPLD_CTLR2_IDERST (0x08)
29 #define BAST_CPLD_CTRL3_IDMASK (0x0e)
30 #define BAST_CPLD_CTRL3_ROMWEN (0x01)
34 #define BAST_CPLD_CTRL4_LLAT (0x01)
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dopenbmc-flash-layout-128.dtsi8 u-boot@0 {
9 reg = <0x0 0xe0000>; // 896KB
14 reg = <0xe0000 0x20000>; // 128KB
19 reg = <0x100000 0x900000>; // 9MB
24 reg = <0xa00000 0x5600000>; // 86MB
29 reg = <0x6000000 0x2000000>; // 32MB
Darmada-385-linksys-rango.dts20 wan_amber@0 {
22 reg = <0x0>;
27 reg = <0x1>;
32 reg = <0x5>;
37 reg = <0x6>;
42 reg = <0x7>;
47 reg = <0x8>;
52 reg = <0x9>;
89 partition@0 {
91 reg = <0x0000000 0x200000>; /* 2MiB */
[all …]
Dstih410.dtsi16 usb2_picophy1: phy2@0 {
18 reg = <0 0>;
19 #phy-cells = <0>;
20 st,syscfg = <&syscfg_core 0xf8 0xf4>;
28 usb2_picophy2: phy3@0 {
30 reg = <0 0>;
31 #phy-cells = <0>;
32 st,syscfg = <&syscfg_core 0xfc 0xf4>;
42 reg = <0x9a03c00 0x100>;
57 reg = <0x9a03e00 0x100>;
[all …]
Domap3-ldp.dts17 reg = <0x80000000 0x8000000>; /* 128 MB */
21 cpu@0 {
29 pinctrl-0 = <&gpio_key_pins>;
97 ranges = <0 0 0x30000000 0x1000000>, /* CS0 space, 16MB */
98 <1 0 0x08000000 0x1000000>; /* CS1 space, 16MB */
100 nand@0,0 {
102 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
104 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
111 gpmc,sync-clk-ps = <0>;
112 gpmc,cs-on-ns = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/
Dopenbmc-flash-layout-128.dtsi8 u-boot@0 {
9 reg = <0x0 0xe0000>; // 896KB
14 reg = <0xe0000 0x20000>; // 128KB
19 reg = <0x100000 0x900000>; // 9MB
24 reg = <0xa00000 0x5600000>; // 86MB
29 reg = <0x6000000 0x2000000>; // 32MB
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Dst,st-hva.txt18 reg = <0x8c85000 0x400>, <0x6000000 0x40000>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dst,st-hva.txt18 reg = <0x8c85000 0x400>, <0x6000000 0x40000>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dcdns,usb3.yaml85 reg = <0x00 0x6000000 0x00 0x10000>,
86 <0x00 0x6010000 0x00 0x10000>,
87 <0x00 0x6020000 0x00 0x10000>;
Dti,j721e-usb.yaml38 If present, it restricts the controller to USB2.0 mode of
85 reg = <0x00 0x4104000 0x00 0x100>;
96 reg = <0x00 0x6000000 0x00 0x10000>,
97 <0x00 0x6010000 0x00 0x10000>,
98 <0x00 0x6020000 0x00 0x10000>;
100 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
102 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dcdns,usb3.yaml91 reg = <0x00 0x6000000 0x00 0x10000>,
92 <0x00 0x6010000 0x00 0x10000>,
93 <0x00 0x6020000 0x00 0x10000>;
Dti,j721e-usb.yaml45 If present, it restricts the controller to USB2.0 mode of
88 reg = <0x00 0x4104000 0x00 0x100>;
99 reg = <0x00 0x6000000 0x00 0x10000>,
100 <0x00 0x6010000 0x00 0x10000>,
101 <0x00 0x6020000 0x00 0x10000>;
103 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
105 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
/kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/
Dat91-lmu5000.dts20 reg = <0x20000000 0x4000000>;
28 main_clock: clock@0 {
43 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
48 reg = <0x3 0x0 0x800000>;
62 kernel@0 {
64 reg = <0x0 0x400000>;
69 reg = <0x400000 0x3C00000>;
74 reg = <0x4000000 0x2000000>;
79 reg = <0x6000000 0x2000000>;
107 pinctrl-0 = <&pinctrl_ssc0_tx>;
[all …]
/kernel/liteos_a/testsuites/unittest/basic/mem/vm/smoke/
Doom_test_001.cpp33 #define MAX_MEM_SIZE 0x6000000
43 if (ret == 0) { in Testcase()
44 …ptr = (unsigned int *)mmap(0, MAX_MEM_SIZE, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0); in Testcase()
47 for (int i = 0; i < MAX_MEM_SIZE / PAGE_SIZE; i++) { in Testcase()
48 *(ptr + i * PAGE_SIZE / sizeof(unsigned int)) = 0; in Testcase()
52 ICUNIT_ASSERT_EQUAL(1, 0, 1); in Testcase()
55 ret = waitpid(pid, &status, 0); in Testcase()
61 return 0; in Testcase()
/kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/
Darmada-385-linksys-rango.dts20 wan_amber@0 {
22 reg = <0x0>;
27 reg = <0x1>;
32 reg = <0x5>;
37 reg = <0x6>;
42 reg = <0x7>;
47 reg = <0x8>;
52 reg = <0x9>;
89 partition@0 {
91 reg = <0x0000000 0x200000>; /* 2MiB */
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-ux500/
Ddb8500-regs.h10 #define U8500_ESRAM_BASE 0x40000000
11 #define U8500_ESRAM_BANK_SIZE 0x00020000
21 #define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000
28 #define U8500_PER3_BASE 0x80000000
29 #define U8500_STM_BASE 0x80100000
30 #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000)
31 #define U8500_PER2_BASE 0x80110000
32 #define U8500_PER1_BASE 0x80120000
33 #define U8500_B2R2_BASE 0x80130000
34 #define U8500_HSEM_BASE 0x80140000
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/etnaviv/
Detnaviv_hwdb.c10 .model = 0x400,
11 .revision = 0x4652,
12 .product_id = 0x70001,
13 .customer_id = 0x100,
14 .eco_id = 0,
19 .nn_core_count = 0,
25 .buffer_size = 0,
27 .features = 0xa0e9e004,
28 .minor_features0 = 0xe1299fff,
29 .minor_features1 = 0xbe13b219,
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstih410.dtsi17 #phy-cells = <0>;
18 st,syscfg = <&syscfg_core 0xf8 0xf4>;
28 #phy-cells = <0>;
29 st,syscfg = <&syscfg_core 0xfc 0xf4>;
40 reg = <0x9a03c00 0x100>;
55 reg = <0x9a03e00 0x100>;
58 pinctrl-0 = <&pinctrl_usb0>;
72 reg = <0x9a83c00 0x100>;
87 reg = <0x9a83e00 0x100>;
90 pinctrl-0 = <&pinctrl_usb1>;
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE_MASK 0x8
36 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE__SHIFT 0x3
[all …]
Dgfx_8_0_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1
36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE_MASK 0x8
36 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE__SHIFT 0x3
[all …]
Dgfx_8_0_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1
36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0
[all …]
/kernel/linux/linux-6.6/sound/soc/fsl/
Dfsl_rpmsg.c26 /* 192kHz/32bit/2ch/60s size is 0x574e00 */
27 #define LPA_LARGE_BUFFER_SIZE (0x6000000)
47 int ret = 0; in fsl_rpmsg_hw_params()
66 if (ret < 0) in fsl_rpmsg_hw_params()
95 return 0; in fsl_rpmsg_hw_free()
103 ret = snd_pcm_hw_constraint_list(substream->runtime, 0, in fsl_rpmsg_startup()
248 0); in fsl_rpmsg_probe()
255 return 0; in fsl_rpmsg_probe()
290 return 0; in fsl_rpmsg_runtime_resume()
305 return 0; in fsl_rpmsg_runtime_suspend()
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Domap3-ldp.dts17 reg = <0x80000000 0x8000000>; /* 128 MB */
21 cpu@0 {
29 pinctrl-0 = <&gpio_key_pins>;
97 ranges = <0 0 0x30000000 0x1000000>, /* CS0 space, 16MB */
98 <1 0 0x08000000 0x1000000>; /* CS1 space, 16MB */
100 nand@0,0 {
102 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
104 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
111 gpmc,sync-clk-ps = <0>;
112 gpmc,cs-on-ns = <0>;
[all …]

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