| /kernel/linux/linux-5.10/scripts/ |
| D | extract_xc3028.pl | 25 my $debug=0;
50 while ($length > 0) {
66 my $msb = ($val >> 8) &0xff;
67 my $lsb = $val & 0xff;
75 my $l3 = ($val >> 24) & 0xff;
76 my $l2 = ($val >> 16) & 0xff;
77 my $l1 = ($val >> 8) & 0xff;
78 my $l0 = $val & 0xff;
87 my $l7 = ($msb_val >> 24) & 0xff;
88 my $l6 = ($msb_val >> 16) & 0xff;
[all …]
|
| /kernel/linux/linux-6.6/scripts/ |
| D | extract_xc3028.pl | 25 my $debug=0;
50 while ($length > 0) {
66 my $msb = ($val >> 8) &0xff;
67 my $lsb = $val & 0xff;
75 my $l3 = ($val >> 24) & 0xff;
76 my $l2 = ($val >> 16) & 0xff;
77 my $l1 = ($val >> 8) & 0xff;
78 my $l0 = $val & 0xff;
87 my $l7 = ($msb_val >> 24) & 0xff;
88 my $l6 = ($msb_val >> 16) & 0xff;
[all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/lib/ |
| D | feature-fixups.c | 67 return 0; in patch_alt_instruction()
83 return 0; in patch_feature_section()
98 return 0; in patch_feature_section()
131 instrs[0] = 0x60000000; /* nop */ in do_stf_entry_barrier_fixups()
132 instrs[1] = 0x60000000; /* nop */ in do_stf_entry_barrier_fixups()
133 instrs[2] = 0x60000000; /* nop */ in do_stf_entry_barrier_fixups()
135 i = 0; in do_stf_entry_barrier_fixups()
137 instrs[i++] = 0x7d4802a6; /* mflr r10 */ in do_stf_entry_barrier_fixups()
138 instrs[i++] = 0x60000000; /* branch patched below */ in do_stf_entry_barrier_fixups()
139 instrs[i++] = 0x7d4803a6; /* mtlr r10 */ in do_stf_entry_barrier_fixups()
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | spear300.dtsi | 15 ranges = <0x60000000 0x60000000 0x50000000
16 0xd0000000 0xd0000000 0x30000000>;
20 reg = <0x99000000 0x1000>;
25 reg = <0x60000000 0x1000>;
34 reg = <0x94000000 0x1000 /* FSMC Register */
35 0x80000000 0x0010 /* NAND Base DATA */
36 0x80020000 0x0010 /* NAND Base ADDR */
37 0x80010000 0x0010>; /* NAND Base CMD */
44 reg = <0x70000000 0x100>;
49 shirq: interrupt-controller@0x50000000 {
[all …]
|
| D | versatile-pb.dts | 11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x10000
48 0x42000000 0x100000>;
49 bus-range = <0 0xff>;
54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
[all …]
|
| D | ep7209.dtsi | 26 #address-cells = <0>;
27 #size-cells = <0>;
45 reg = <0x80000000 0xc000>;
51 reg = <0x80000000 0x4000>;
58 reg = <0x80000000 0x1 0x80000040 0x1>;
65 reg = <0x80000001 0x1 0x80000041 0x1>;
72 reg = <0x80000003 0x1 0x80000043 0x1>;
79 reg = <0x80000083 0x1 0x800000c3 0x1>;
86 reg = <0x80000100 0x80>;
94 reg = <0x80000180 0x80>;
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | spear300.dtsi | 15 ranges = <0x60000000 0x60000000 0x50000000
16 0xd0000000 0xd0000000 0x30000000>;
20 reg = <0x99000000 0x1000>;
25 reg = <0x60000000 0x1000>;
34 reg = <0x94000000 0x1000 /* FSMC Register */
35 0x80000000 0x0010 /* NAND Base DATA */
36 0x80020000 0x0010 /* NAND Base ADDR */
37 0x80010000 0x0010>; /* NAND Base CMD */
44 reg = <0x70000000 0x100>;
51 reg = <0x50000000 0x1000>;
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/sprd/ |
| D | sp9860g-1h10.dts | 29 reg = <0x0 0x80000000 0 0x60000000>,
30 <0x1 0x80000000 0 0x60000000>;
50 ocv-capacity-table-0 = <4185000 100>, <4113000 95>, <4066000 90>,
56 <3680000 10>, <3605000 5>, <3400000 0>;
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/sprd/ |
| D | sp9860g-1h10.dts | 29 reg = <0x0 0x80000000 0 0x60000000>,
30 <0x1 0x80000000 0 0x60000000>;
50 ocv-capacity-table-0 = <4185000 100>, <4113000 95>, <4066000 90>,
56 <3680000 10>, <3605000 5>, <3400000 0>;
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | xlnx,axi-pcie-host.yaml | 41 const: 0
71 reg = <0x50000000 0x1000000>;
77 interrupt-map-mask = <0 0 0 7>;
78 interrupt-map = <0 0 0 1 &pcie_intc 1>,
79 <0 0 0 2 &pcie_intc 2>,
80 <0 0 0 3 &pcie_intc 3>,
81 <0 0 0 4 &pcie_intc 4>;
82 ranges = <0x02000000 0 0x60000000 0x60000000 0 0x10000000>;
85 #address-cells = <0>;
|
| D | versatile.yaml | 38 - const: 0x1800
39 - const: 0
40 - const: 0
58 reg = <0x10001000 0x1000>,
59 <0x41000000 0x10000>,
60 <0x42000000 0x100000>;
61 bus-range = <0 0xff>;
67 <0x01000000 0 0x00000000 0x43000000 0 0x00010000>, /* downstream I/O */
68 <0x02000000 0 0x50000000 0x50000000 0 0x10000000>, /* non-prefetchable memory */
69 <0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
[all …]
|
| D | mediatek,mt7621-pcie.yaml | 26 - description: pcie port 0 RC control registers
34 '^pcie@[0-2],0$':
49 pattern: '^pcie-phy[0-2]$'
81 reg = <0x1e140000 0x100>,
82 <0x1e142000 0x100>,
83 <0x1e143000 0x100>,
84 <0x1e144000 0x100>;
89 pinctrl-0 = <&pcie_pins>;
91 ranges = <0x02000000 0 0x60000000 0x60000000 0 0x10000000>, /* pci memory */
92 <0x01000000 0 0x1e160000 0x1e160000 0 0x00010000>; /* io space */
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | versatile.yaml | 38 - const: 0x1800
39 - const: 0
40 - const: 0
58 reg = <0x10001000 0x1000>,
59 <0x41000000 0x10000>,
60 <0x42000000 0x100000>;
61 bus-range = <0 0xff>;
67 <0x01000000 0 0x00000000 0x43000000 0 0x00010000>, /* downstream I/O */
68 <0x02000000 0 0x50000000 0x50000000 0 0x10000000>, /* non-prefetchable memory */
69 <0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
[all …]
|
| D | xilinx-pcie.txt | 28 address. The value must be 0.
47 reg = < 0x50000000 0x1000000 >;
49 interrupts = < 0 52 4 >;
50 interrupt-map-mask = <0 0 0 7>;
51 interrupt-map = <0 0 0 1 &pcie_intc 1>,
52 <0 0 0 2 &pcie_intc 2>,
53 <0 0 0 3 &pcie_intc 3>,
54 <0 0 0 4 &pcie_intc 4>;
55 ranges = < 0x02000000 0 0x60000000 0x60000000 0 0x10000000 >;
59 #address-cells = <0>;
[all …]
|
| /kernel/linux/linux-6.6/arch/m68k/include/asm/ |
| D | contregs.h | 15 #define AC_IDPROM 0x00000000 /* 34 ID PROM, R/O, byte, 32 bytes */
16 #define AC_PAGEMAP 0x10000000 /* 3 Pagemap R/W, long */
17 #define AC_SEGMAP 0x20000000 /* 3 Segment map, byte */
18 #define AC_CONTEXT 0x30000000 /* 34c current mmu-context */
19 #define AC_SENABLE 0x40000000 /* 34c system dvma/cache/reset enable reg*/
20 #define AC_UDVMA_ENB 0x50000000 /* 34 Not used on Sun boards, byte */
21 #define AC_BUS_ERROR 0x60000000 /* 34 Not cleared on read, byte. */
22 #define AC_SYNC_ERR 0x60000000 /* c fault type */
23 #define AC_SYNC_VA 0x60000004 /* c fault virtual address */
24 #define AC_ASYNC_ERR 0x60000008 /* c asynchronous fault type */
[all …]
|
| D | sun3mmu.h | 25 #define SUN3_CONTROL_MASK (0x0FFFFFFC)
29 #define AC_IDPROM 0x00000000 /* 34 ID PROM, R/O, byte, 32 bytes */
30 #define AC_PAGEMAP 0x10000000 /* 3 Pagemap R/W, long */
31 #define AC_SEGMAP 0x20000000 /* 3 Segment map, byte */
32 #define AC_CONTEXT 0x30000000 /* 34c current mmu-context */
33 #define AC_SENABLE 0x40000000 /* 34c system dvma/cache/reset enable reg*/
34 #define AC_UDVMA_ENB 0x50000000 /* 34 Not used on Sun boards, byte */
35 #define AC_BUS_ERROR 0x60000000 /* 34 Cleared on read, byte. */
36 #define AC_SYNC_ERR 0x60000000 /* c fault type */
37 #define AC_SYNC_VA 0x60000004 /* c fault virtual address */
[all …]
|
| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | contregs.h | 15 #define AC_IDPROM 0x00000000 /* 34 ID PROM, R/O, byte, 32 bytes */
16 #define AC_PAGEMAP 0x10000000 /* 3 Pagemap R/W, long */
17 #define AC_SEGMAP 0x20000000 /* 3 Segment map, byte */
18 #define AC_CONTEXT 0x30000000 /* 34c current mmu-context */
19 #define AC_SENABLE 0x40000000 /* 34c system dvma/cache/reset enable reg*/
20 #define AC_UDVMA_ENB 0x50000000 /* 34 Not used on Sun boards, byte */
21 #define AC_BUS_ERROR 0x60000000 /* 34 Not cleared on read, byte. */
22 #define AC_SYNC_ERR 0x60000000 /* c fault type */
23 #define AC_SYNC_VA 0x60000004 /* c fault virtual address */
24 #define AC_ASYNC_ERR 0x60000008 /* c asynchronous fault type */
[all …]
|
| D | sun3mmu.h | 25 #define SUN3_CONTROL_MASK (0x0FFFFFFC)
29 #define AC_IDPROM 0x00000000 /* 34 ID PROM, R/O, byte, 32 bytes */
30 #define AC_PAGEMAP 0x10000000 /* 3 Pagemap R/W, long */
31 #define AC_SEGMAP 0x20000000 /* 3 Segment map, byte */
32 #define AC_CONTEXT 0x30000000 /* 34c current mmu-context */
33 #define AC_SENABLE 0x40000000 /* 34c system dvma/cache/reset enable reg*/
34 #define AC_UDVMA_ENB 0x50000000 /* 34 Not used on Sun boards, byte */
35 #define AC_BUS_ERROR 0x60000000 /* 34 Cleared on read, byte. */
36 #define AC_SYNC_ERR 0x60000000 /* c fault type */
37 #define AC_SYNC_VA 0x60000004 /* c fault virtual address */
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/arm/ |
| D | versatile-pb.dts | 11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x10000
48 0x42000000 0x100000>;
49 bus-range = <0 0xff>;
54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
[all …]
|
| /kernel/linux/linux-6.6/arch/mips/pci/ |
| D | pci-rc32434.c | 36 #define PCI_ACCESS_READ 0
53 .start = 0x50000000,
54 .end = 0x5FFFFFFF,
62 .start = 0x60000000,
63 .end = 0x6FFFFFFF,
72 .start = 0x18800000,
73 .end = 0x188FFFFF,
97 .mem_offset = 0,
98 .io_offset = 0,
105 #define PCI_ENDIAN_FLAG 0
[all …]
|
| /kernel/linux/linux-5.10/arch/mips/pci/ |
| D | pci-rc32434.c | 36 #define PCI_ACCESS_READ 0
53 .start = 0x50000000,
54 .end = 0x5FFFFFFF,
62 .start = 0x60000000,
63 .end = 0x6FFFFFFF,
72 .start = 0x18800000,
73 .end = 0x188FFFFF,
97 .mem_offset = 0,
98 .io_offset = 0,
105 #define PCI_ENDIAN_FLAG 0
[all …]
|
| /kernel/linux/linux-6.6/arch/x86/realmode/rm/ |
| D | reboot.S | 17 * This code is called with the restart type (0 = BIOS, 1 = APM) in
87 * actual BIOS entry point, anyway (that is at 0xfffffff0).
99 andl $0x00000011, %edx
100 orl $0x60000000, %edx
104 testl $0x60000000, %edx /* If no cache bits -> no wbinvd */
108 andb $0x10, %dl
116 movw $0x1000, %ax
118 movw $0xf000, %sp
119 movw $0x5307, %ax
120 movw $0x0001, %bx
[all …]
|
| /kernel/linux/linux-5.10/arch/x86/realmode/rm/ |
| D | reboot.S | 17 * This code is called with the restart type (0 = BIOS, 1 = APM) in
87 * actual BIOS entry point, anyway (that is at 0xfffffff0).
99 andl $0x00000011, %edx
100 orl $0x60000000, %edx
104 testl $0x60000000, %edx /* If no cache bits -> no wbinvd */
108 andb $0x10, %dl
116 movw $0x1000, %ax
118 movw $0xf000, %sp
119 movw $0x5307, %ax
120 movw $0x0001, %bx
[all …]
|
| /kernel/linux/linux-5.10/arch/sh/include/cpu-sh2a/cpu/ |
| D | addrspace.h | 5 #define P0SEG 0x00000000
6 #define P1SEG 0x00000000
7 #define P2SEG 0x20000000
8 #define P3SEG 0x40000000
9 #define P4SEG 0x60000000
|
| /kernel/linux/linux-6.6/arch/sh/include/cpu-sh2a/cpu/ |
| D | addrspace.h | 5 #define P0SEG 0x00000000
6 #define P1SEG 0x00000000
7 #define P2SEG 0x20000000
8 #define P3SEG 0x40000000
9 #define P4SEG 0x60000000
|