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/kernel/linux/linux-6.6/arch/arm/mach-imx/
Dhardware.h21 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
35 * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff]
41 * IO 0x00200000+0x100000 -> 0xf4000000+0x100000
43 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
44 * SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000
45 * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000
47 * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
48 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
49 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
51 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
[all …]
Dmx35.h5 #define MX35_AIPS1_BASE_ADDR 0x43f00000
7 #define MX35_SPBA0_BASE_ADDR 0x50000000
9 #define MX35_AIPS2_BASE_ADDR 0x53f00000
11 #define MX35_AVIC_BASE_ADDR 0x68000000
13 #define MX35_X_MEMC_BASE_ADDR 0xb8000000
Dmx31.h5 #define MX31_AIPS1_BASE_ADDR 0x43f00000
7 #define MX31_SPBA0_BASE_ADDR 0x50000000
9 #define MX31_AIPS2_BASE_ADDR 0x53f00000
11 #define MX31_AVIC_BASE_ADDR 0x68000000
13 #define MX31_X_MEMC_BASE_ADDR 0xb8000000
/kernel/linux/linux-5.10/arch/arm/mach-imx/
Dhardware.h21 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
35 * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff]
41 * IO 0x00200000+0x100000 -> 0xf4000000+0x100000
43 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
44 * SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000
45 * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000
47 * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
48 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
49 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
51 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
[all …]
Dmx35.h5 #define MX35_AIPS1_BASE_ADDR 0x43f00000
7 #define MX35_SPBA0_BASE_ADDR 0x50000000
9 #define MX35_AIPS2_BASE_ADDR 0x53f00000
11 #define MX35_AVIC_BASE_ADDR 0x68000000
13 #define MX35_X_MEMC_BASE_ADDR 0xb8000000
Dmx31.h5 #define MX31_AIPS1_BASE_ADDR 0x43f00000
7 #define MX31_SPBA0_BASE_ADDR 0x50000000
9 #define MX31_AIPS2_BASE_ADDR 0x53f00000
11 #define MX31_AVIC_BASE_ADDR 0x68000000
13 #define MX31_X_MEMC_BASE_ADDR 0xb8000000
/kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/
Dk3-am64.dtsi53 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
57 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
58 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
59 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
60 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
62 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dfaraday,fotg210.txt29 reg = <0x68000000 0x1000>;
Docteon-usb.txt49 reg = <0x11800 0x68000000 0x0 0x1000>;
58 reg = <0x16f00 0x10000000 0x0 0x80000>;
59 interrupts = <0 56>;
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Domap34xx.h17 #define L4_34XX_BASE 0x48000000
18 #define L4_WK_34XX_BASE 0x48300000
19 #define L4_PER_34XX_BASE 0x49000000
20 #define L4_EMU_34XX_BASE 0x54000000
21 #define L3_34XX_BASE 0x68000000
23 #define L4_WK_AM33XX_BASE 0x44C00000
25 #define OMAP3430_32KSYNCT_BASE 0x48320000
26 #define OMAP3430_CM_BASE 0x48004800
27 #define OMAP3430_PRM_BASE 0x48306800
28 #define OMAP343X_SMS_BASE 0x6C000000
[all …]
Domap24xx.h19 #define L4_24XX_BASE 0x48000000
20 #define L4_WK_243X_BASE 0x49000000
21 #define L3_24XX_BASE 0x68000000
24 #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
25 #define OMAP24XX_IVA_INTC_BASE 0x40000000
28 #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
29 #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
30 #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
32 #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
33 #define OMAP2420_SMS_BASE 0x68008000
[all …]
Diomap.h33 #define OMAP2_L3_IO_OFFSET 0x90000000
36 #define OMAP2_L4_IO_OFFSET 0xb2000000
39 #define OMAP4_L3_IO_OFFSET 0xb4000000
42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
70 /* 0x6e000000 --> 0xfe000000 */
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
Domap34xx.h17 #define L4_34XX_BASE 0x48000000
18 #define L4_WK_34XX_BASE 0x48300000
19 #define L4_PER_34XX_BASE 0x49000000
20 #define L4_EMU_34XX_BASE 0x54000000
21 #define L3_34XX_BASE 0x68000000
23 #define L4_WK_AM33XX_BASE 0x44C00000
25 #define OMAP3430_32KSYNCT_BASE 0x48320000
26 #define OMAP3430_CM_BASE 0x48004800
27 #define OMAP3430_PRM_BASE 0x48306800
28 #define OMAP343X_SMS_BASE 0x6C000000
[all …]
Domap24xx.h19 #define L4_24XX_BASE 0x48000000
20 #define L4_WK_243X_BASE 0x49000000
21 #define L3_24XX_BASE 0x68000000
24 #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
25 #define OMAP24XX_IVA_INTC_BASE 0x40000000
28 #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
29 #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
30 #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
32 #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
33 #define OMAP2420_SMS_BASE 0x68008000
[all …]
Diomap.h33 #define OMAP2_L3_IO_OFFSET 0x90000000
36 #define OMAP2_L4_IO_OFFSET 0xb2000000
39 #define OMAP4_L3_IO_OFFSET 0xb4000000
42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
70 /* 0x6e000000 --> 0xfe000000 */
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dbcm53340-ubnt-unifi-switch8.dts22 memory@0 {
24 reg = <0x00000000 0x08000000>,
25 <0x68000000 0x08000000>;
35 bspi-sel = <0>;
37 flash: m25p80@0 {
39 reg = <0>;
46 partition@0 {
48 reg = <0x0 0xc0000>;
53 reg = <0xc0000 0x10000>;
58 reg = <0xd0000 0x10000>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm53340-ubnt-unifi-switch8.dts22 memory@0 {
24 reg = <0x00000000 0x08000000>,
25 <0x68000000 0x08000000>;
35 bspi-sel = <0>;
37 flash: flash@0 {
39 reg = <0>;
46 partition@0 {
48 reg = <0x0 0xc0000>;
53 reg = <0xc0000 0x10000>;
58 reg = <0xd0000 0x10000>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Docteon-usb.txt49 reg = <0x11800 0x68000000 0x0 0x1000>;
58 reg = <0x16f00 0x10000000 0x0 0x80000>;
59 interrupts = <0 56>;
Dfaraday,fotg210.yaml71 reg = <0x68000000 0x1000>;
/kernel/linux/linux-6.6/arch/arm/mach-davinci/
Dda8xx.h33 #define DA8XX_CP_INTC_BASE 0xfffee000
37 #define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000)
39 #define DA8XX_JTAG_ID_REG 0x18
40 #define DA8XX_HOST1CFG_REG 0x44
41 #define DA8XX_CHIPSIG_REG 0x174
42 #define DA8XX_CFGCHIP0_REG 0x17c
43 #define DA8XX_CFGCHIP1_REG 0x180
44 #define DA8XX_CFGCHIP2_REG 0x184
45 #define DA8XX_CFGCHIP3_REG 0x188
46 #define DA8XX_CFGCHIP4_REG 0x18c
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Ddavinci-nand.txt23 Can be in the range [0-3].
31 If not set equal to 0x08.
37 If not set equal to 0x10.
80 reg = <0x62000000 0x807ff
81 0x68000000 0x8000>;
83 ti,davinci-mask-ale = <0>;
84 ti,davinci-mask-cle = <0>;
85 ti,davinci-mask-chipsel = <0>;
92 reg = <0x180000 0x7e80000>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Ddavinci-nand.txt23 Can be in the range [0-3].
31 If not set equal to 0x08.
37 If not set equal to 0x10.
80 reg = <0x62000000 0x807ff
81 0x68000000 0x8000>;
83 ti,davinci-mask-ale = <0>;
84 ti,davinci-mask-cle = <0>;
85 ti,davinci-mask-chipsel = <0>;
92 reg = <0x180000 0x7e80000>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dst,stm32-fmc2-ebi.yaml46 <bank-number> 0 <address of the bank> <size>
49 "^.*@[0-4],[a-f0-9]+$":
73 reg = <0x58002000 0x1000>;
77 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
78 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
79 <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
80 <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
81 <4 0 0x80000000 0x10000000>; /* NAND */
83 psram@0,0 {
85 reg = <0 0x00000000 0x100000>;
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Da4m072.dts27 ranges = <0 0xf0000000 0x0000c000>;
28 reg = <0xf0000000 0x00000100>;
29 bus-frequency = <0>; /* From boot loader */
30 system-frequency = <0>; /* From boot loader */
33 fsl,init-ext-48mhz-en = <0x0>;
34 fsl,init-fd-enable = <0x01>;
35 fsl,init-fd-counters = <0x3333>;
44 reg = <0x2000 0x100>;
45 interrupts = <2 1 0>;
50 reg = <0x2200 0x100>;
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Da4m072.dts27 ranges = <0 0xf0000000 0x0000c000>;
28 reg = <0xf0000000 0x00000100>;
29 bus-frequency = <0>; /* From boot loader */
30 system-frequency = <0>; /* From boot loader */
33 fsl,init-ext-48mhz-en = <0x0>;
34 fsl,init-fd-enable = <0x01>;
35 fsl,init-fd-counters = <0x3333>;
44 reg = <0x2000 0x100>;
45 interrupts = <2 1 0>;
50 reg = <0x2200 0x100>;
[all …]

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