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/kernel/linux/linux-6.6/tools/testing/selftests/kvm/include/x86_64/
Dprocessor.h25 #define NMI_VECTOR 0x02
29 #define X86_CR4_VME (1ul << 0)
60 u8 extended_state_area[0];
63 #define XFEATURE_MASK_FP BIT_ULL(0)
113 kvm_static_assert((fn & 0xc0000000) == 0 || \
114 (fn & 0xc0000000) == 0x40000000 || \
115 (fn & 0xc0000000) == 0x80000000 || \
116 (fn & 0xc0000000) == 0xc0000000); \
124 #define X86_FEATURE_MWAIT KVM_X86_CPU_FEATURE(0x1, 0, ECX, 3)
125 #define X86_FEATURE_VMX KVM_X86_CPU_FEATURE(0x1, 0, ECX, 5)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra124-mc.yaml44 "^emc-timings-[0-9]+$":
53 "^timing-[0-9]+$":
114 reg = <0x70019000 0x1000>;
118 interrupts = <0 77 4>;
130 0x40040001 /* MC_EMEM_ARB_CFG */
131 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
132 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
133 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
134 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
135 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra124-mc.yaml47 "^emc-timings-[0-9]+$":
56 "^timing-[0-9]+$":
118 reg = <0x70019000 0x1000>;
122 interrupts = <0 77 4>;
135 0x40040001 /* MC_EMEM_ARB_CFG */
136 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
137 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
138 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
139 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
140 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
[all …]
/kernel/linux/linux-5.10/tools/testing/selftests/kvm/include/x86_64/
Dsvm.h98 u64 avic_backing_page; /* Offset 0xe0 */
99 u8 reserved_6[8]; /* Offset 0xe8 */
100 u64 avic_logical_id; /* Offset 0xf0 */
101 u64 avic_physical_id; /* Offset 0xf8 */
106 #define TLB_CONTROL_DO_NOTHING 0
111 #define V_TPR_MASK 0x0f
120 #define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)
134 #define LBR_CTL_ENABLE_MASK BIT_ULL(0)
150 #define SVM_VM_CR_VALID_MASK 0x001fULL
151 #define SVM_VM_CR_SVM_LOCK_MASK 0x0008ULL
[all …]
/kernel/linux/linux-6.6/fs/smb/common/
Dsmbfsctl.h35 #define FSCTL_DEVICE_DFS (0x0006 << 16)
36 #define FSCTL_DEVICE_FILE_SYSTEM (0x0009 << 16)
37 #define FSCTL_DEVICE_NAMED_PIPE (0x0011 << 16)
38 #define FSCTL_DEVICE_NETWORK_FILE_SYSTEM (0x0014 << 16)
39 #define FSCTL_DEVICE_MASK 0xffff0000
41 #define FSCTL_DEVICE_ACCESS_FILE_ANY_ACCESS (0x00 << 14)
42 #define FSCTL_DEVICE_ACCESS_FILE_READ_ACCESS (0x01 << 14)
43 #define FSCTL_DEVICE_ACCESS_FILE_WRITE_ACCESS (0x02 << 14)
44 #define FSCTL_DEVICE_ACCESS_FILE_READ_WRITE_ACCESS (0x03 << 14)
45 #define FSCTL_DEVICE_ACCESS_MASK 0x0000c000
[all …]
/kernel/linux/linux-5.10/fs/cifs/
Dsmbfsctl.h44 #define FSCTL_DEVICE_DFS (0x0006 << 16)
45 #define FSCTL_DEVICE_FILE_SYSTEM (0x0009 << 16)
46 #define FSCTL_DEVICE_NAMED_PIPE (0x0011 << 16)
47 #define FSCTL_DEVICE_NETWORK_FILE_SYSTEM (0x0014 << 16)
48 #define FSCTL_DEVICE_MASK 0xffff0000
50 #define FSCTL_DEVICE_ACCESS_FILE_ANY_ACCESS (0x00 << 14)
51 #define FSCTL_DEVICE_ACCESS_FILE_READ_ACCESS (0x01 << 14)
52 #define FSCTL_DEVICE_ACCESS_FILE_WRITE_ACCESS (0x02 << 14)
53 #define FSCTL_DEVICE_ACCESS_FILE_READ_WRITE_ACCESS (0x03 << 14)
54 #define FSCTL_DEVICE_ACCESS_MASK 0x0000c000
[all …]
/kernel/linux/linux-6.6/arch/x86/kvm/
Dreverse_cpuid.h38 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */
39 #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0)
43 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
49 /* CPUID level 0x80000007 (EDX). */
52 /* CPUID level 0x80000022 (EAX) */
53 #define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
62 [CPUID_1_EDX] = { 1, 0, CPUID_EDX},
63 [CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX},
64 [CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX},
65 [CPUID_1_ECX] = { 1, 0, CPUID_ECX},
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/include/nvif/
Dclass.h6 #define NVIF_CLASS_CLIENT /* if0000.h */ -0x00000000
8 #define NVIF_CLASS_CONTROL /* if0001.h */ -0x00000001
10 #define NVIF_CLASS_PERFMON /* if0002.h */ -0x00000002
11 #define NVIF_CLASS_PERFDOM /* if0003.h */ -0x00000003
13 #define NVIF_CLASS_SW_NV04 /* if0004.h */ -0x00000004
14 #define NVIF_CLASS_SW_NV10 /* if0005.h */ -0x00000005
15 #define NVIF_CLASS_SW_NV50 /* if0005.h */ -0x00000006
16 #define NVIF_CLASS_SW_GF100 /* if0005.h */ -0x00000007
18 #define NVIF_CLASS_MMU /* if0008.h */ 0x80000008
19 #define NVIF_CLASS_MMU_NV04 /* if0008.h */ 0x80000009
[all …]
/kernel/linux/linux-5.10/arch/x86/include/asm/
Dsvm.h14 INTERCEPT_CR = 0,
24 /* Byte offset 000h (word 0) */
25 INTERCEPT_CR0_READ = 0,
143 u64 avic_backing_page; /* Offset 0xe0 */
144 u8 reserved_6[8]; /* Offset 0xe8 */
145 u64 avic_logical_id; /* Offset 0xf0 */
146 u64 avic_physical_id; /* Offset 0xf8 */
150 #define TLB_CONTROL_DO_NOTHING 0
155 #define V_TPR_MASK 0x0f
164 #define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)
[all …]
Dcpufeatures.h28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
29 #define X86_FEATURE_FPU ( 0*32+ 0) /* Onboard FPU */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* Virtual Mode Extensions */
31 #define X86_FEATURE_DE ( 0*32+ 2) /* Debugging Extensions */
32 #define X86_FEATURE_PSE ( 0*32+ 3) /* Page Size Extensions */
33 #define X86_FEATURE_TSC ( 0*32+ 4) /* Time Stamp Counter */
34 #define X86_FEATURE_MSR ( 0*32+ 5) /* Model-Specific Registers */
35 #define X86_FEATURE_PAE ( 0*32+ 6) /* Physical Address Extensions */
36 #define X86_FEATURE_MCE ( 0*32+ 7) /* Machine Check Exception */
37 #define X86_FEATURE_CX8 ( 0*32+ 8) /* CMPXCHG8 instruction */
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvif/
Dclass.h6 #define NVIF_CLASS_CLIENT /* if0000.h */ -0x00000000
8 #define NVIF_CLASS_CONTROL /* if0001.h */ -0x00000001
10 #define NVIF_CLASS_PERFMON /* if0002.h */ -0x00000002
11 #define NVIF_CLASS_PERFDOM /* if0003.h */ -0x00000003
13 #define NVIF_CLASS_SW_NV04 /* if0004.h */ -0x00000004
14 #define NVIF_CLASS_SW_NV10 /* if0005.h */ -0x00000005
15 #define NVIF_CLASS_SW_NV50 /* if0005.h */ -0x00000006
16 #define NVIF_CLASS_SW_GF100 /* if0005.h */ -0x00000007
18 #define NVIF_CLASS_MMU /* if0008.h */ 0x80000008
19 #define NVIF_CLASS_MMU_NV04 /* if0008.h */ 0x80000009
[all …]
/kernel/linux/linux-5.10/arch/x86/kvm/
Dcpuid.h51 [CPUID_1_EDX] = { 1, 0, CPUID_EDX},
52 [CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX},
53 [CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX},
54 [CPUID_1_ECX] = { 1, 0, CPUID_ECX},
55 [CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX},
56 [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX},
57 [CPUID_7_0_EBX] = { 7, 0, CPUID_EBX},
58 [CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX},
59 [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX},
60 [CPUID_6_EAX] = { 6, 0, CPUID_EAX},
[all …]
Dcpuid.c36 int feature_bit = 0; in xstate_required_size()
41 if (xstate_bv & 0x1) { in xstate_required_size()
43 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx); in xstate_required_size()
63 for (i = 0; i < nent; i++) { in cpuid_entry2_find()
82 best = cpuid_entry2_find(entries, nent, 0x80000008, 0); in kvm_check_cpuid()
84 int vaddr_bits = (best->eax & 0xff00) >> 8; in kvm_check_cpuid()
86 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0) in kvm_check_cpuid()
90 return 0; in kvm_check_cpuid()
97 best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0); in kvm_update_pv_runtime()
111 best = kvm_find_cpuid_entry(vcpu, 1, 0); in kvm_update_cpuid_runtime()
[all …]
/kernel/linux/linux-6.6/arch/x86/include/asm/
Dsvm.h16 INTERCEPT_CR = 0,
26 /* Byte offset 000h (word 0) */
27 INTERCEPT_CR0_READ = 0,
155 u64 avic_backing_page; /* Offset 0xe0 */
156 u8 reserved_6[8]; /* Offset 0xe8 */
157 u64 avic_logical_id; /* Offset 0xf0 */
158 u64 avic_physical_id; /* Offset 0xf8 */
163 * Offset 0x3e0, 32 bytes reserved
173 #define TLB_CONTROL_DO_NOTHING 0
178 #define V_TPR_MASK 0x0f
[all …]
Dcpufeatures.h28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
29 #define X86_FEATURE_FPU ( 0*32+ 0) /* Onboard FPU */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* Virtual Mode Extensions */
31 #define X86_FEATURE_DE ( 0*32+ 2) /* Debugging Extensions */
32 #define X86_FEATURE_PSE ( 0*32+ 3) /* Page Size Extensions */
33 #define X86_FEATURE_TSC ( 0*32+ 4) /* Time Stamp Counter */
34 #define X86_FEATURE_MSR ( 0*32+ 5) /* Model-Specific Registers */
35 #define X86_FEATURE_PAE ( 0*32+ 6) /* Physical Address Extensions */
36 #define X86_FEATURE_MCE ( 0*32+ 7) /* Machine Check Exception */
37 #define X86_FEATURE_CX8 ( 0*32+ 8) /* CMPXCHG8 instruction */
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dtegra124-nyan-blaze-emc.dtsi78 nvidia,emc-auto-cal-config = <0xa1430000>;
79 nvidia,emc-auto-cal-config2 = <0x00000000>;
80 nvidia,emc-auto-cal-config3 = <0x00000000>;
81 nvidia,emc-auto-cal-interval = <0x001fffff>;
82 nvidia,emc-bgbias-ctl0 = <0x00000008>;
83 nvidia,emc-cfg = <0x73240000>;
84 nvidia,emc-cfg-2 = <0x000008c5>;
85 nvidia,emc-ctt-term-ctrl = <0x00000802>;
86 nvidia,emc-mode-1 = <0x80100003>;
87 nvidia,emc-mode-2 = <0x80200008>;
[all …]
Dtegra124-apalis-emc.dtsi94 nvidia,emc-auto-cal-config = <0xa1430000>;
95 nvidia,emc-auto-cal-config2 = <0x00000000>;
96 nvidia,emc-auto-cal-config3 = <0x00000000>;
97 nvidia,emc-auto-cal-interval = <0x001fffff>;
98 nvidia,emc-bgbias-ctl0 = <0x00000008>;
99 nvidia,emc-cfg = <0x73240000>;
100 nvidia,emc-cfg-2 = <0x000008c5>;
101 nvidia,emc-ctt-term-ctrl = <0x00000802>;
102 nvidia,emc-mode-1 = <0x80100003>;
103 nvidia,emc-mode-2 = <0x80200008>;
[all …]
Dtegra124-jetson-tk1-emc.dtsi89 nvidia,emc-auto-cal-config = <0xa1430000>;
90 nvidia,emc-auto-cal-config2 = <0x00000000>;
91 nvidia,emc-auto-cal-config3 = <0x00000000>;
92 nvidia,emc-auto-cal-interval = <0x001fffff>;
93 nvidia,emc-bgbias-ctl0 = <0x00000008>;
94 nvidia,emc-cfg = <0x73240000>;
95 nvidia,emc-cfg-2 = <0x000008c5>;
96 nvidia,emc-ctt-term-ctrl = <0x00000802>;
97 nvidia,emc-mode-1 = <0x80100003>;
98 nvidia,emc-mode-2 = <0x80200008>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra124-nyan-blaze-emc.dtsi92 0x40040001
93 0x8000000a
94 0x00000001
95 0x00000001
96 0x00000002
97 0x00000000
98 0x00000002
99 0x00000001
100 0x00000002
101 0x00000008
[all …]
Dtegra124-jetson-tk1-emc.dtsi104 0x40040001
105 0x8000000a
106 0x00000001
107 0x00000001
108 0x00000002
109 0x00000000
110 0x00000002
111 0x00000001
112 0x00000003
113 0x00000008
[all …]
Dtegra124-apalis-emc.dtsi108 0x40040001 0x8000000a
109 0x00000001 0x00000001
110 0x00000002 0x00000000
111 0x00000002 0x00000001
112 0x00000003 0x00000008
113 0x00000003 0x00000002
114 0x00000003 0x00000006
115 0x06030203 0x000a0502
116 0x77e30303 0x70000f03
117 0x001f0000
[all …]
/kernel/linux/linux-5.10/tools/arch/x86/include/asm/
Dcpufeatures.h28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
29 #define X86_FEATURE_FPU ( 0*32+ 0) /* Onboard FPU */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* Virtual Mode Extensions */
31 #define X86_FEATURE_DE ( 0*32+ 2) /* Debugging Extensions */
32 #define X86_FEATURE_PSE ( 0*32+ 3) /* Page Size Extensions */
33 #define X86_FEATURE_TSC ( 0*32+ 4) /* Time Stamp Counter */
34 #define X86_FEATURE_MSR ( 0*32+ 5) /* Model-Specific Registers */
35 #define X86_FEATURE_PAE ( 0*32+ 6) /* Physical Address Extensions */
36 #define X86_FEATURE_MCE ( 0*32+ 7) /* Machine Check Exception */
37 #define X86_FEATURE_CX8 ( 0*32+ 8) /* CMPXCHG8 instruction */
[all …]
/kernel/linux/linux-6.6/arch/x86/kernel/cpu/
Dcommon.c202 [GDT_ENTRY_KERNEL32_CS] = GDT_ENTRY_INIT(0xc09b, 0, 0xfffff),
203 [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(0xa09b, 0, 0xfffff),
204 [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(0xc093, 0, 0xfffff),
205 [GDT_ENTRY_DEFAULT_USER32_CS] = GDT_ENTRY_INIT(0xc0fb, 0, 0xfffff),
206 [GDT_ENTRY_DEFAULT_USER_DS] = GDT_ENTRY_INIT(0xc0f3, 0, 0xfffff),
207 [GDT_ENTRY_DEFAULT_USER_CS] = GDT_ENTRY_INIT(0xa0fb, 0, 0xfffff),
209 [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(0xc09a, 0, 0xfffff),
210 [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(0xc092, 0, 0xfffff),
211 [GDT_ENTRY_DEFAULT_USER_CS] = GDT_ENTRY_INIT(0xc0fa, 0, 0xfffff),
212 [GDT_ENTRY_DEFAULT_USER_DS] = GDT_ENTRY_INIT(0xc0f2, 0, 0xfffff),
[all …]
/kernel/linux/linux-5.10/arch/x86/kernel/cpu/
Dcommon.c130 [GDT_ENTRY_KERNEL32_CS] = GDT_ENTRY_INIT(0xc09b, 0, 0xfffff),
131 [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(0xa09b, 0, 0xfffff),
132 [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(0xc093, 0, 0xfffff),
133 [GDT_ENTRY_DEFAULT_USER32_CS] = GDT_ENTRY_INIT(0xc0fb, 0, 0xfffff),
134 [GDT_ENTRY_DEFAULT_USER_DS] = GDT_ENTRY_INIT(0xc0f3, 0, 0xfffff),
135 [GDT_ENTRY_DEFAULT_USER_CS] = GDT_ENTRY_INIT(0xa0fb, 0, 0xfffff),
137 [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(0xc09a, 0, 0xfffff),
138 [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(0xc092, 0, 0xfffff),
139 [GDT_ENTRY_DEFAULT_USER_CS] = GDT_ENTRY_INIT(0xc0fa, 0, 0xfffff),
140 [GDT_ENTRY_DEFAULT_USER_DS] = GDT_ENTRY_INIT(0xc0f2, 0, 0xfffff),
[all …]
/kernel/linux/linux-6.6/tools/arch/x86/include/asm/
Dcpufeatures.h28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
29 #define X86_FEATURE_FPU ( 0*32+ 0) /* Onboard FPU */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* Virtual Mode Extensions */
31 #define X86_FEATURE_DE ( 0*32+ 2) /* Debugging Extensions */
32 #define X86_FEATURE_PSE ( 0*32+ 3) /* Page Size Extensions */
33 #define X86_FEATURE_TSC ( 0*32+ 4) /* Time Stamp Counter */
34 #define X86_FEATURE_MSR ( 0*32+ 5) /* Model-Specific Registers */
35 #define X86_FEATURE_PAE ( 0*32+ 6) /* Physical Address Extensions */
36 #define X86_FEATURE_MCE ( 0*32+ 7) /* Machine Check Exception */
37 #define X86_FEATURE_CX8 ( 0*32+ 8) /* CMPXCHG8 instruction */
[all …]

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