Home
last modified time | relevance | path

Searched +full:0 +full:x801 (Results 1 – 25 of 122) sorted by relevance

12345

/kernel/linux/linux-5.10/drivers/media/i2c/cx25840/
Dcx25840-firmware.c34 /* DL_ADDR_LB=0 DL_ADDR_HB=0 */ in start_fw_load()
35 cx25840_write(client, 0x800, 0x00); in start_fw_load()
36 cx25840_write(client, 0x801, 0x00); in start_fw_load()
37 // DL_MAP=3 DL_AUTO_INC=0 DL_ENABLE=1 in start_fw_load()
38 cx25840_write(client, 0x803, 0x0b); in start_fw_load()
40 cx25840_write(client, 0x000, 0x20); in start_fw_load()
45 /* AUTO_INC_DIS=0 */ in end_fw_load()
46 cx25840_write(client, 0x000, 0x00); in end_fw_load()
47 /* DL_ENABLE=0 */ in end_fw_load()
48 cx25840_write(client, 0x803, 0x03); in end_fw_load()
[all …]
/kernel/linux/linux-6.6/drivers/media/i2c/cx25840/
Dcx25840-firmware.c34 /* DL_ADDR_LB=0 DL_ADDR_HB=0 */ in start_fw_load()
35 cx25840_write(client, 0x800, 0x00); in start_fw_load()
36 cx25840_write(client, 0x801, 0x00); in start_fw_load()
37 // DL_MAP=3 DL_AUTO_INC=0 DL_ENABLE=1 in start_fw_load()
38 cx25840_write(client, 0x803, 0x0b); in start_fw_load()
40 cx25840_write(client, 0x000, 0x20); in start_fw_load()
45 /* AUTO_INC_DIS=0 */ in end_fw_load()
46 cx25840_write(client, 0x000, 0x00); in end_fw_load()
47 /* DL_ENABLE=0 */ in end_fw_load()
48 cx25840_write(client, 0x803, 0x03); in end_fw_load()
[all …]
/kernel/linux/linux-5.10/arch/m68k/mac/
Dmacboing.c23 static __u8 mac_asc_wave_tab[ 0x800 ];
26 * Alan's original sine table; needs interpolating to 0x800
27 * (hint: interpolate or hardwire [0 -> Pi/2[, it's symmetric)
30 0, 39, 75, 103, 121, 127, 121, 103, 75, 39,
31 0, -39, -75, -103, -121, -127, -121, -103, -75, -39
37 static volatile __u8* mac_asc_regs = ( void* )0x50F14000;
44 static unsigned long mac_bell_phase; /* 0..2*Pi -> 0..0x800 (wavetable size) */
74 * mac_asc_regs[ 0x800 ] & 0xF0 != 0 in mac_init_asc()
84 mac_asc_regs = ( void* )0x50010000; in mac_init_asc()
147 for ( i = 0; i < 0x400; i++ ) in mac_init_asc()
[all …]
/kernel/linux/linux-6.6/arch/m68k/mac/
Dmacboing.c23 static __u8 mac_asc_wave_tab[ 0x800 ];
26 * Alan's original sine table; needs interpolating to 0x800
27 * (hint: interpolate or hardwire [0 -> Pi/2[, it's symmetric)
30 0, 39, 75, 103, 121, 127, 121, 103, 75, 39,
31 0, -39, -75, -103, -121, -127, -121, -103, -75, -39
37 static volatile __u8* mac_asc_regs = ( void* )0x50F14000;
44 static unsigned long mac_bell_phase; /* 0..2*Pi -> 0..0x800 (wavetable size) */
74 * mac_asc_regs[ 0x800 ] & 0xF0 != 0 in mac_init_asc()
84 mac_asc_regs = ( void* )0x50010000; in mac_init_asc()
147 for ( i = 0; i < 0x400; i++ ) in mac_init_asc()
[all …]
/kernel/linux/linux-5.10/arch/m68k/include/asm/
Dmac_asc.h13 #define ASC_BUF_BASE 0x00 /* RAM buffer offset */
14 #define ASC_BUF_SIZE 0x800
16 #define ASC_CONTROL 0x800
17 #define ASC_CONTROL_OFF 0x00
18 #define ASC_FREQ(chan,byte) ((0x810)+((chan)<<3)+(byte))
19 #define ASC_ENABLE 0x801
20 #define ASC_ENABLE_SAMPLE 0x02
21 #define ASC_MODE 0x802
22 #define ASC_MODE_SAMPLE 0x02
24 #define ASC_VOLUME 0x806
[all …]
/kernel/linux/linux-6.6/arch/m68k/include/asm/
Dmac_asc.h13 #define ASC_BUF_BASE 0x00 /* RAM buffer offset */
14 #define ASC_BUF_SIZE 0x800
16 #define ASC_CONTROL 0x800
17 #define ASC_CONTROL_OFF 0x00
18 #define ASC_FREQ(chan,byte) ((0x810)+((chan)<<3)+(byte))
19 #define ASC_ENABLE 0x801
20 #define ASC_ENABLE_SAMPLE 0x02
21 #define ASC_MODE 0x802
22 #define ASC_MODE_SAMPLE 0x02
24 #define ASC_VOLUME 0x806
[all …]
/kernel/linux/linux-5.10/arch/arm/configs/
Dnetwinder_defconfig8 CONFIG_ZBOOT_ROM_TEXT=0x0
9 CONFIG_ZBOOT_ROM_BSS=0x0
10 CONFIG_CMDLINE="root=0x801"
/kernel/linux/linux-6.6/arch/arm/configs/
Dnetwinder_defconfig8 CONFIG_CMDLINE="root=0x801"
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Dcs553x_nand.c11 * mtd-id for command line partitioning is cs553x_nand_cs[0-3]
12 * where 0-3 reflects the chip select for NAND.
30 #define MSR_DIVIL_GLD_CAP 0x51400000 /* DIVIL capabilitiies */
31 #define CAP_CS5535 0x2df000ULL
32 #define CAP_CS5536 0x5df500ULL
35 #define MSR_NANDF_DATA 0x5140001b /* NAND Flash Data Timing MSR */
36 #define MSR_NANDF_CTL 0x5140001c /* NAND Flash Control Timing */
37 #define MSR_NANDF_RSVD 0x5140001d /* Reserved */
40 #define MSR_DIVIL_LBAR_FLSH0 0x51400010 /* Flash Chip Select 0 */
41 #define MSR_DIVIL_LBAR_FLSH1 0x51400011 /* Flash Chip Select 1 */
[all …]
/kernel/linux/linux-6.6/drivers/mtd/nand/raw/
Dcs553x_nand.c11 * mtd-id for command line partitioning is cs553x_nand_cs[0-3]
12 * where 0-3 reflects the chip select for NAND.
29 #define MSR_DIVIL_GLD_CAP 0x51400000 /* DIVIL capabilitiies */
30 #define CAP_CS5535 0x2df000ULL
31 #define CAP_CS5536 0x5df500ULL
34 #define MSR_NANDF_DATA 0x5140001b /* NAND Flash Data Timing MSR */
35 #define MSR_NANDF_CTL 0x5140001c /* NAND Flash Control Timing */
36 #define MSR_NANDF_RSVD 0x5140001d /* Reserved */
39 #define MSR_DIVIL_LBAR_FLSH0 0x51400010 /* Flash Chip Select 0 */
40 #define MSR_DIVIL_LBAR_FLSH1 0x51400011 /* Flash Chip Select 1 */
[all …]
/kernel/linux/linux-5.10/arch/parisc/kernel/
Dhardware.c32 {HPHW_NPROC,0x01,0x4,0x0,"Indigo (840, 930)"},
33 {HPHW_NPROC,0x8,0x4,0x01,"Firefox(825,925)"},
34 {HPHW_NPROC,0xA,0x4,0x01,"Top Gun (835,834,935,635)"},
35 {HPHW_NPROC,0xB,0x4,0x01,"Technical Shogun (845, 645)"},
36 {HPHW_NPROC,0xF,0x4,0x01,"Commercial Shogun (949)"},
37 {HPHW_NPROC,0xC,0x4,0x01,"Cheetah (850, 950)"},
38 {HPHW_NPROC,0x80,0x4,0x01,"Cheetah (950S)"},
39 {HPHW_NPROC,0x81,0x4,0x01,"Jaguar (855, 955)"},
40 {HPHW_NPROC,0x82,0x4,0x01,"Cougar (860, 960)"},
41 {HPHW_NPROC,0x83,0x4,0x13,"Panther (865, 870, 980)"},
[all …]
/kernel/linux/linux-6.6/arch/parisc/kernel/
Dhardware.c29 {HPHW_NPROC,0x01,0x4,0x0,"Indigo (840, 930)"},
30 {HPHW_NPROC,0x8,0x4,0x01,"Firefox(825,925)"},
31 {HPHW_NPROC,0xA,0x4,0x01,"Top Gun (835,834,935,635)"},
32 {HPHW_NPROC,0xB,0x4,0x01,"Technical Shogun (845, 645)"},
33 {HPHW_NPROC,0xF,0x4,0x01,"Commercial Shogun (949)"},
34 {HPHW_NPROC,0xC,0x4,0x01,"Cheetah (850, 950)"},
35 {HPHW_NPROC,0x80,0x4,0x01,"Cheetah (950S)"},
36 {HPHW_NPROC,0x81,0x4,0x01,"Jaguar (855, 955)"},
37 {HPHW_NPROC,0x82,0x4,0x01,"Cougar (860, 960)"},
38 {HPHW_NPROC,0x83,0x4,0x13,"Panther (865, 870, 980)"},
[all …]
/kernel/linux/linux-5.10/drivers/mfd/
Dwm5110-tables.c22 { 0x80, 0x3 },
23 { 0x44, 0x20 },
24 { 0x45, 0x40 },
25 { 0x46, 0x60 },
26 { 0x47, 0x80 },
27 { 0x48, 0xa0 },
28 { 0x51, 0x13 },
29 { 0x52, 0x33 },
30 { 0x53, 0x53 },
31 { 0x54, 0x73 },
[all …]
/kernel/linux/linux-6.6/drivers/mfd/
Dwm5110-tables.c22 { 0x80, 0x3 },
23 { 0x44, 0x20 },
24 { 0x45, 0x40 },
25 { 0x46, 0x60 },
26 { 0x47, 0x80 },
27 { 0x48, 0xa0 },
28 { 0x51, 0x13 },
29 { 0x52, 0x33 },
30 { 0x53, 0x53 },
31 { 0x54, 0x73 },
[all …]
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
Delf.h23 #define PT_NULL 0
31 #define PT_LOOS 0x60000000
32 #define PT_HIOS 0x6fffffff
33 #define PT_LOPROC 0x70000000
34 #define PT_HIPROC 0x7fffffff
35 #define PT_GNU_EH_FRAME 0x6474e550
36 #define PT_GNU_STACK (PT_LOOS + 0x474e551)
37 #define PN_XNUM 0xffff
38 #define ET_NONE 0
43 #define ET_LOPROC 0xff00
[all …]
/kernel/linux/linux-5.10/arch/arm64/include/asm/
Dcputype.h10 #define MPIDR_UP_BITMASK (0x1 << 30)
11 #define MPIDR_MT_BITMASK (0x1 << 24)
12 #define MPIDR_HWID_BITMASK UL(0xff00ffffff)
24 #define MIDR_REVISION_MASK 0xf
27 #define MIDR_PARTNUM_MASK (0xfff << MIDR_PARTNUM_SHIFT)
31 #define MIDR_ARCHITECTURE_MASK (0xf << MIDR_ARCHITECTURE_SHIFT)
35 #define MIDR_VARIANT_MASK (0xf << MIDR_VARIANT_SHIFT)
39 #define MIDR_IMPLEMENTOR_MASK (0xff << MIDR_IMPLEMENTOR_SHIFT)
45 (0xf << MIDR_ARCHITECTURE_SHIFT) | \
54 #define ARM_CPU_IMP_ARM 0x41
[all …]
/kernel/linux/linux-6.6/arch/arm64/include/asm/
Dcputype.h10 #define MPIDR_UP_BITMASK (0x1 << 30)
11 #define MPIDR_MT_BITMASK (0x1 << 24)
12 #define MPIDR_HWID_BITMASK UL(0xff00ffffff)
24 #define MIDR_REVISION_MASK 0xf
27 #define MIDR_PARTNUM_MASK (0xfff << MIDR_PARTNUM_SHIFT)
31 #define MIDR_ARCHITECTURE_MASK (0xf << MIDR_ARCHITECTURE_SHIFT)
35 #define MIDR_VARIANT_MASK (0xf << MIDR_VARIANT_SHIFT)
39 #define MIDR_IMPLEMENTOR_MASK (0xffU << MIDR_IMPLEMENTOR_SHIFT)
45 (0xf << MIDR_ARCHITECTURE_SHIFT) | \
54 #define ARM_CPU_IMP_ARM 0x41
[all …]
/kernel/linux/linux-6.6/tools/arch/arm64/include/asm/
Dcputype.h10 #define MPIDR_UP_BITMASK (0x1 << 30)
11 #define MPIDR_MT_BITMASK (0x1 << 24)
12 #define MPIDR_HWID_BITMASK UL(0xff00ffffff)
24 #define MIDR_REVISION_MASK 0xf
27 #define MIDR_PARTNUM_MASK (0xfff << MIDR_PARTNUM_SHIFT)
31 #define MIDR_ARCHITECTURE_MASK (0xf << MIDR_ARCHITECTURE_SHIFT)
35 #define MIDR_VARIANT_MASK (0xf << MIDR_VARIANT_SHIFT)
39 #define MIDR_IMPLEMENTOR_MASK (0xffU << MIDR_IMPLEMENTOR_SHIFT)
45 (0xf << MIDR_ARCHITECTURE_SHIFT) | \
54 #define ARM_CPU_IMP_ARM 0x41
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Dqcom,sm8250-camss.yaml113 port@0:
308 reg = <0 0xac6a000 0 0x2000>,
309 <0 0xac6c000 0 0x2000>,
310 <0 0xac6e000 0 0x1000>,
311 <0 0xac70000 0 0x1000>,
312 <0 0xac72000 0 0x1000>,
313 <0 0xac74000 0 0x1000>,
314 <0 0xacb4000 0 0xd000>,
315 <0 0xacc3000 0 0xd000>,
316 <0 0xacd9000 0 0x2200>,
[all …]
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/
Delf.h36 #define PT_NULL 0
44 #define PT_LOOS 0x60000000
45 #define PT_HIOS 0x6fffffff
46 #define PT_LOPROC 0x70000000
47 #define PT_HIPROC 0x7fffffff
48 #define PT_GNU_EH_FRAME 0x6474e550
49 #define PT_GNU_PROPERTY 0x6474e553
50 #define PT_GNU_STACK (PT_LOOS + 0x474e551)
51 #define PN_XNUM 0xffff
52 #define ET_NONE 0
[all …]
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
Delf.h36 #define PT_NULL 0
44 #define PT_LOOS 0x60000000
45 #define PT_HIOS 0x6fffffff
46 #define PT_LOPROC 0x70000000
47 #define PT_HIPROC 0x7fffffff
48 #define PT_GNU_EH_FRAME 0x6474e550
49 #define PT_GNU_PROPERTY 0x6474e553
50 #define PT_GNU_STACK (PT_LOOS + 0x474e551)
51 #define PN_XNUM 0xffff
52 #define ET_NONE 0
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/apple/
Dt6002.dtsi70 reg = <0x0 0x800>;
72 cpu-release-addr = <0 0>; /* To be filled by loader */
74 i-cache-size = <0x20000>;
75 d-cache-size = <0x10000>;
84 reg = <0x0 0x801>;
86 cpu-release-addr = <0 0>; /* To be filled by loader */
88 i-cache-size = <0x20000>;
89 d-cache-size = <0x10000>;
98 reg = <0x0 0x10900>;
100 cpu-release-addr = <0 0>; /* To be filled by loader */
[all …]
/kernel/linux/linux-5.10/drivers/input/keyboard/
Dhilkbd.c44 #define HIL_DATA 0x800
45 #define HIL_CMD 0x801
52 #define HILBASE 0xf0428000UL /* HP300 (m68k) port address */
53 #define HIL_DATA 0x1
54 #define HIL_CMD 0x3
70 #define hil_command(x) do { hil_writeb((x), HILBASE + HIL_CMD); } while (0)
72 #define hil_write_data(x) do { hil_writeb((x), HILBASE + HIL_DATA); } while (0)
76 #define HIL_BUSY 0x02
77 #define HIL_DATA_RDY 0x01
79 #define HIL_SETARD 0xA0 /* set auto-repeat delay */
[all …]
/kernel/linux/linux-6.6/drivers/input/keyboard/
Dhilkbd.c44 #define HIL_DATA 0x800
45 #define HIL_CMD 0x801
52 #define HILBASE 0xf0428000UL /* HP300 (m68k) port address */
53 #define HIL_DATA 0x1
54 #define HIL_CMD 0x3
70 #define hil_command(x) do { hil_writeb((x), HILBASE + HIL_CMD); } while (0)
72 #define hil_write_data(x) do { hil_writeb((x), HILBASE + HIL_DATA); } while (0)
76 #define HIL_BUSY 0x02
77 #define HIL_DATA_RDY 0x01
79 #define HIL_SETARD 0xA0 /* set auto-repeat delay */
[all …]
/kernel/linux/linux-6.6/drivers/media/pci/cx18/
Dcx18-av-core.h32 CX18_AV_SVIDEO_LUMA1 = 0x10,
33 CX18_AV_SVIDEO_LUMA2 = 0x20,
34 CX18_AV_SVIDEO_LUMA3 = 0x30,
35 CX18_AV_SVIDEO_LUMA4 = 0x40,
36 CX18_AV_SVIDEO_LUMA5 = 0x50,
37 CX18_AV_SVIDEO_LUMA6 = 0x60,
38 CX18_AV_SVIDEO_LUMA7 = 0x70,
39 CX18_AV_SVIDEO_LUMA8 = 0x80,
40 CX18_AV_SVIDEO_CHROMA4 = 0x400,
41 CX18_AV_SVIDEO_CHROMA5 = 0x500,
[all …]

12345